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Quinn Jensen52c543f2007-07-09 22:06:53 +01001/*
Anson Huangdf595742014-01-17 11:39:05 +08002 * Copyright 2004-2014 Freescale Semiconductor, Inc. All Rights Reserved.
Quinn Jensen52c543f2007-07-09 22:06:53 +01003 */
4
5/*
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 */
10
11#ifndef __ASM_ARCH_MXC_COMMON_H__
12#define __ASM_ARCH_MXC_COMMON_H__
13
Robin Holt7b6d8642013-07-08 16:01:40 -070014#include <linux/reboot.h>
15
Shawn Guod48866f2013-10-16 19:52:00 +080016struct irq_data;
Sascha Hauer282b13d2008-09-09 10:19:40 +020017struct platform_device;
Shawn Guo009e63f2013-05-08 21:05:53 +080018struct pt_regs;
Sascha Hauer30c730f2009-02-16 14:36:49 +010019struct clk;
Gilles Chanteperdrix876292d2014-04-05 17:57:45 +020020struct device_node;
Shawn Guoa1f1c7e2011-09-06 15:08:40 +080021enum mxc_cpu_pwr_mode;
Steffen Trumtrare57e4ab2014-07-07 11:41:26 +020022struct of_device_id;
Sascha Hauer282b13d2008-09-09 10:19:40 +020023
Shawn Guo803648d2013-10-16 21:05:35 +080024void mx1_map_io(void);
25void mx21_map_io(void);
Shawn Guo803648d2013-10-16 21:05:35 +080026void mx27_map_io(void);
27void mx31_map_io(void);
28void mx35_map_io(void);
Shawn Guo803648d2013-10-16 21:05:35 +080029void imx1_init_early(void);
30void imx21_init_early(void);
Shawn Guo803648d2013-10-16 21:05:35 +080031void imx27_init_early(void);
32void imx31_init_early(void);
33void imx35_init_early(void);
Shawn Guo803648d2013-10-16 21:05:35 +080034void mxc_init_irq(void __iomem *);
Shawn Guo803648d2013-10-16 21:05:35 +080035void mx1_init_irq(void);
36void mx21_init_irq(void);
Shawn Guo803648d2013-10-16 21:05:35 +080037void mx27_init_irq(void);
38void mx31_init_irq(void);
39void mx35_init_irq(void);
Shawn Guo803648d2013-10-16 21:05:35 +080040void imx1_soc_init(void);
41void imx21_soc_init(void);
Shawn Guo803648d2013-10-16 21:05:35 +080042void imx27_soc_init(void);
43void imx31_soc_init(void);
44void imx35_soc_init(void);
Shawn Guo803648d2013-10-16 21:05:35 +080045void epit_timer_init(void __iomem *base, int irq);
Shawn Guo803648d2013-10-16 21:05:35 +080046int mx1_clocks_init(unsigned long fref);
47int mx21_clocks_init(unsigned long lref, unsigned long fref);
Shawn Guo803648d2013-10-16 21:05:35 +080048int mx27_clocks_init(unsigned long fref);
49int mx31_clocks_init(unsigned long fref);
50int mx35_clocks_init(void);
Shawn Guo803648d2013-10-16 21:05:35 +080051int mx31_clocks_init_dt(void);
52struct platform_device *mxc_register_gpio(char *name, int id,
Shawn Guob78d8e52011-06-06 00:07:55 +080053 resource_size_t iobase, resource_size_t iosize, int irq, int irq_high);
Shawn Guo803648d2013-10-16 21:05:35 +080054void mxc_set_cpu_type(unsigned int type);
55void mxc_restart(enum reboot_mode, const char *);
56void mxc_arch_reset_init(void __iomem *);
Arnd Bergmann6f98cb22016-06-24 12:49:56 +020057void imx1_reset_init(void __iomem *);
Shawn Guo803648d2013-10-16 21:05:35 +080058void imx_set_aips(void __iomem *);
Steffen Trumtrare57e4ab2014-07-07 11:41:26 +020059void imx_aips_allow_unprivileged_access(const char *compat);
Shawn Guo803648d2013-10-16 21:05:35 +080060int mxc_device_init(void);
Shawn Guobfefdff2013-08-13 13:54:02 +080061void imx_set_soc_revision(unsigned int rev);
Shawn Guof1c6f312013-08-13 14:59:43 +080062void imx_init_revision_from_anatop(void);
Shawn Guoa2887542013-08-13 16:59:28 +080063struct device *imx_soc_device_init(void);
Anson Huang05136f02014-12-17 12:24:12 +080064void imx6_enable_rbc(bool enable);
Marc Zyngier14517562015-03-13 16:05:37 +000065void imx_gpc_check_dt(void);
Anson Huang05136f02014-12-17 12:24:12 +080066void imx_gpc_set_arm_power_in_lpm(bool power_off);
67void imx_gpc_set_arm_power_up_timing(u32 sw2iso, u32 sw);
68void imx_gpc_set_arm_power_down_timing(u32 sw2iso, u32 sw);
Fabio Estevam8c4300c2016-02-02 19:45:38 -020069void imx25_pm_init(void);
Arnd Bergmann48e076d2016-06-28 10:22:16 +080070void imx27_pm_init(void);
Shawn Guo73d2b4c2011-10-17 08:42:16 +080071
Shawn Guo41e7daf2011-09-28 17:16:06 +080072enum mxc_cpu_pwr_mode {
73 WAIT_CLOCKED, /* wfi only */
74 WAIT_UNCLOCKED, /* WAIT */
75 WAIT_UNCLOCKED_POWER_OFF, /* WAIT + SRPG */
76 STOP_POWER_ON, /* just STOP */
77 STOP_POWER_OFF, /* STOP + SRPG */
78};
79
Fabio Estevam3ac804e2012-02-02 20:02:32 -020080enum mx3_cpu_pwr_mode {
81 MX3_RUN,
82 MX3_WAIT,
83 MX3_DOZE,
84 MX3_SLEEP,
85};
86
Shawn Guo803648d2013-10-16 21:05:35 +080087void mx3_cpu_lp_set(enum mx3_cpu_pwr_mode mode);
Sascha Hauerb6de9432011-09-20 14:28:17 +020088
Shawn Guo803648d2013-10-16 21:05:35 +080089void imx_enable_cpu(int cpu, bool enable);
90void imx_set_cpu_jump(int cpu, void *jump_addr);
91u32 imx_get_cpu_arg(int cpu);
92void imx_set_cpu_arg(int cpu, u32 arg);
Shawn Guo69c31b72011-09-06 14:59:40 +080093#ifdef CONFIG_SMP
Shawn Guo803648d2013-10-16 21:05:35 +080094void v7_secondary_startup(void);
95void imx_scu_map_io(void);
96void imx_smp_prepare(void);
Shawn Guo13eed982011-09-06 15:05:25 +080097#else
98static inline void imx_scu_map_io(void) {}
Shawn Guoa1f1c7e2011-09-06 15:08:40 +080099static inline void imx_smp_prepare(void) {}
Shawn Guo69c31b72011-09-06 14:59:40 +0800100#endif
Shawn Guo803648d2013-10-16 21:05:35 +0800101void imx_src_init(void);
Anson Huang80c0ecd2014-06-23 16:42:44 +0800102void imx_gpc_pre_suspend(bool arm_power_off);
Shawn Guo803648d2013-10-16 21:05:35 +0800103void imx_gpc_post_resume(void);
104void imx_gpc_mask_all(void);
105void imx_gpc_restore_all(void);
Marc Zyngier65bb6882014-12-02 16:05:26 +0000106void imx_gpc_hwirq_mask(unsigned int hwirq);
107void imx_gpc_hwirq_unmask(unsigned int hwirq);
Shawn Guo803648d2013-10-16 21:05:35 +0800108void imx_anatop_init(void);
109void imx_anatop_pre_suspend(void);
110void imx_anatop_post_resume(void);
Shawn Guo8fb76a02015-04-25 22:59:19 +0800111int imx6_set_lpm(enum mxc_cpu_pwr_mode mode);
Anson Huang8765caa2016-08-29 21:49:56 +0800112void imx6_set_int_mem_clk_lpm(bool enable);
Anson Huang751f7e92014-01-09 16:03:16 +0800113void imx6sl_set_wait_clk(bool enter);
Anson Huangec336b22014-09-17 11:11:45 +0800114int imx_mmdc_get_ddr_type(void);
Eric Miao46ec1b22011-12-21 22:38:23 +0800115
Shawn Guo803648d2013-10-16 21:05:35 +0800116void imx_cpu_die(unsigned int cpu);
117int imx_cpu_kill(unsigned int cpu);
Marc Zyngiere4f2d972011-09-08 13:15:22 +0100118
Shawn Guoc356bdb2014-02-26 19:48:33 +0800119#ifdef CONFIG_SUSPEND
120void v7_cpu_resume(void);
Martin Fuzzey1579c7b2015-05-12 15:31:03 +0200121void imx53_suspend(void __iomem *ocram_vbase);
122extern const u32 imx53_suspend_sz;
Anson Huangdf595742014-01-17 11:39:05 +0800123void imx6_suspend(void __iomem *ocram_vbase);
Shawn Guoc356bdb2014-02-26 19:48:33 +0800124#else
125static inline void v7_cpu_resume(void) {}
Martin Fuzzey1579c7b2015-05-12 15:31:03 +0200126static inline void imx53_suspend(void __iomem *ocram_vbase) {}
127static const u32 imx53_suspend_sz;
Shawn Guoc356bdb2014-02-26 19:48:33 +0800128static inline void imx6_suspend(void __iomem *ocram_vbase) {}
129#endif
130
Shawn Guo35e29162015-04-29 13:07:03 +0800131void imx6_pm_ccm_init(const char *ccm_compat);
Shawn Guo803648d2013-10-16 21:05:35 +0800132void imx6q_pm_init(void);
Anson Huangdf595742014-01-17 11:39:05 +0800133void imx6dl_pm_init(void);
134void imx6sl_pm_init(void);
Anson Huangff843d62014-06-20 13:20:54 +0800135void imx6sx_pm_init(void);
Anson Huangee4a5f82015-08-05 01:48:37 +0800136void imx6ul_pm_init(void);
Anson Huangdf595742014-01-17 11:39:05 +0800137
Shawn Guo28a9f3b2014-02-18 10:35:05 +0800138#ifdef CONFIG_PM
Shawn Guo36b66c32014-05-20 14:55:15 +0800139void imx51_pm_init(void);
140void imx53_pm_init(void);
Eric Miao46ec1b22011-12-21 22:38:23 +0800141#else
Shawn Guo36b66c32014-05-20 14:55:15 +0800142static inline void imx51_pm_init(void) {}
143static inline void imx53_pm_init(void) {}
Eric Miao46ec1b22011-12-21 22:38:23 +0800144#endif
145
Shawn Guo8321b752012-04-26 11:42:34 +0800146#ifdef CONFIG_NEON
Shawn Guo803648d2013-10-16 21:05:35 +0800147int mx51_neon_fixup(void);
Shawn Guo8321b752012-04-26 11:42:34 +0800148#else
149static inline int mx51_neon_fixup(void) { return 0; }
150#endif
151
Shawn Guoe6a07562013-07-08 21:45:20 +0800152#ifdef CONFIG_CACHE_L2X0
Shawn Guo803648d2013-10-16 21:05:35 +0800153void imx_init_l2cache(void);
Shawn Guoe6a07562013-07-08 21:45:20 +0800154#else
155static inline void imx_init_l2cache(void) {}
156#endif
157
Masahiro Yamada75305272015-11-15 10:39:53 +0900158extern const struct smp_operations imx_smp_ops;
159extern const struct smp_operations ls1021a_smp_ops;
Marc Zyngiere4f2d972011-09-08 13:15:22 +0100160
Quinn Jensen52c543f2007-07-09 22:06:53 +0100161#endif