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Tony Lindgren1dbae812005-11-10 14:26:51 +00001/*
2 * linux/arch/arm/mach-omap2/io.c
3 *
4 * OMAP2 I/O mapping code
5 *
6 * Copyright (C) 2005 Nokia Corporation
Santosh Shilimkar44169072009-05-28 14:16:04 -07007 * Copyright (C) 2007-2009 Texas Instruments
Tony Lindgren646e3ed2008-10-06 15:49:36 +03008 *
9 * Author:
10 * Juha Yrjola <juha.yrjola@nokia.com>
11 * Syed Khasim <x0khasim@ti.com>
Tony Lindgren1dbae812005-11-10 14:26:51 +000012 *
Santosh Shilimkar44169072009-05-28 14:16:04 -070013 * Added OMAP4 support - Santosh Shilimkar <santosh.shilimkar@ti.com>
14 *
Tony Lindgren1dbae812005-11-10 14:26:51 +000015 * This program is free software; you can redistribute it and/or modify
16 * it under the terms of the GNU General Public License version 2 as
17 * published by the Free Software Foundation.
18 */
Tony Lindgren1dbae812005-11-10 14:26:51 +000019#include <linux/module.h>
20#include <linux/kernel.h>
21#include <linux/init.h>
Russell Kingfced80c2008-09-06 12:10:45 +010022#include <linux/io.h>
Paul Walmsley2f135ea2009-06-19 19:08:25 -060023#include <linux/clk.h>
Tony Lindgren1dbae812005-11-10 14:26:51 +000024
Tony Lindgren120db2c2006-04-02 17:46:27 +010025#include <asm/tlb.h>
Tony Lindgren120db2c2006-04-02 17:46:27 +010026#include <asm/mach/map.h>
27
Lokesh Vutla2b6c4e72012-10-15 14:04:53 -070028#include <plat-omap/dma-omap.h>
Tony Lindgren646e3ed2008-10-06 15:49:36 +030029
Tony Lindgren622297f2012-10-02 14:19:52 -070030#include "../plat-omap/sram.h"
31
Tony Lindgrendc843282012-10-03 11:23:43 -070032#include "omap_hwmod.h"
Tony Lindgrendbc04162012-08-31 10:59:07 -070033#include "soc.h"
Tony Lindgrenee0839c2012-02-24 10:34:35 -080034#include "iomap.h"
35#include "voltage.h"
36#include "powerdomain.h"
37#include "clockdomain.h"
38#include "common.h"
Vaibhav Hiremathe30384a2012-05-29 15:26:41 +053039#include "clock.h"
Paul Walmsleye80a9722010-01-26 20:13:12 -070040#include "clock2xxx.h"
Paul Walmsley657ebfa2010-02-22 22:09:20 -070041#include "clock3xxx.h"
Paul Walmsleye80a9722010-01-26 20:13:12 -070042#include "clock44xx.h"
Tony Lindgren1d5aef42012-10-03 16:36:40 -070043#include "omap-pm.h"
Paul Walmsley3e6ece12012-10-17 00:46:45 +000044#include "sdrc.h"
Paul Walmsleyb6a42262012-10-29 20:50:21 -060045#include "control.h"
Tony Lindgren3d82cbb2012-10-15 12:50:46 -070046#include "serial.h"
Paul Walmsleyc4ceedc2012-10-29 20:56:29 -060047#include "cm2xxx.h"
48#include "cm3xxx.h"
Paul Walmsleyd9a16f92012-10-29 20:57:39 -060049#include "prm.h"
50#include "cm.h"
51#include "prcm_mpu44xx.h"
52#include "prminst44xx.h"
53#include "cminst44xx.h"
Paul Walmsley63a293e2012-11-21 16:15:16 -070054#include "prm2xxx.h"
55#include "prm3xxx.h"
56#include "prm44xx.h"
57
Tony Lindgren1dbae812005-11-10 14:26:51 +000058/*
59 * The machine specific code may provide the extra mapping besides the
60 * default mapping provided here.
61 */
Syed Mohammed, Khasimcc26b3b2008-10-09 17:51:41 +030062
Tony Lindgrene48f8142012-03-06 11:49:22 -080063#if defined(CONFIG_SOC_OMAP2420) || defined(CONFIG_SOC_OMAP2430)
Syed Mohammed, Khasimcc26b3b2008-10-09 17:51:41 +030064static struct map_desc omap24xx_io_desc[] __initdata = {
Tony Lindgren1dbae812005-11-10 14:26:51 +000065 {
66 .virtual = L3_24XX_VIRT,
67 .pfn = __phys_to_pfn(L3_24XX_PHYS),
68 .length = L3_24XX_SIZE,
69 .type = MT_DEVICE
70 },
Kyungmin Park09f21ed2008-02-20 15:30:06 -080071 {
Syed Mohammed, Khasimcc26b3b2008-10-09 17:51:41 +030072 .virtual = L4_24XX_VIRT,
73 .pfn = __phys_to_pfn(L4_24XX_PHYS),
74 .length = L4_24XX_SIZE,
Syed Mohammed Khasim72d0f1c2006-12-06 17:14:05 -080075 .type = MT_DEVICE
76 },
Syed Mohammed, Khasimcc26b3b2008-10-09 17:51:41 +030077};
78
Tony Lindgren59b479e2011-01-27 16:39:40 -080079#ifdef CONFIG_SOC_OMAP2420
Syed Mohammed, Khasimcc26b3b2008-10-09 17:51:41 +030080static struct map_desc omap242x_io_desc[] __initdata = {
Tony Lindgren1dbae812005-11-10 14:26:51 +000081 {
Paul Walmsley7adb9982010-01-08 15:23:05 -070082 .virtual = DSP_MEM_2420_VIRT,
83 .pfn = __phys_to_pfn(DSP_MEM_2420_PHYS),
84 .length = DSP_MEM_2420_SIZE,
Tony Lindgrenc40fae952006-12-07 13:58:10 -080085 .type = MT_DEVICE
86 },
87 {
Paul Walmsley7adb9982010-01-08 15:23:05 -070088 .virtual = DSP_IPI_2420_VIRT,
89 .pfn = __phys_to_pfn(DSP_IPI_2420_PHYS),
90 .length = DSP_IPI_2420_SIZE,
Tony Lindgrenc40fae952006-12-07 13:58:10 -080091 .type = MT_DEVICE
92 },
93 {
Paul Walmsley7adb9982010-01-08 15:23:05 -070094 .virtual = DSP_MMU_2420_VIRT,
95 .pfn = __phys_to_pfn(DSP_MMU_2420_PHYS),
96 .length = DSP_MMU_2420_SIZE,
Tony Lindgren1dbae812005-11-10 14:26:51 +000097 .type = MT_DEVICE
Syed Mohammed, Khasimcc26b3b2008-10-09 17:51:41 +030098 },
Tony Lindgren1dbae812005-11-10 14:26:51 +000099};
100
Syed Mohammed, Khasimcc26b3b2008-10-09 17:51:41 +0300101#endif
102
Tony Lindgren59b479e2011-01-27 16:39:40 -0800103#ifdef CONFIG_SOC_OMAP2430
Syed Mohammed, Khasimcc26b3b2008-10-09 17:51:41 +0300104static struct map_desc omap243x_io_desc[] __initdata = {
105 {
106 .virtual = L4_WK_243X_VIRT,
107 .pfn = __phys_to_pfn(L4_WK_243X_PHYS),
108 .length = L4_WK_243X_SIZE,
109 .type = MT_DEVICE
110 },
111 {
112 .virtual = OMAP243X_GPMC_VIRT,
113 .pfn = __phys_to_pfn(OMAP243X_GPMC_PHYS),
114 .length = OMAP243X_GPMC_SIZE,
115 .type = MT_DEVICE
116 },
117 {
118 .virtual = OMAP243X_SDRC_VIRT,
119 .pfn = __phys_to_pfn(OMAP243X_SDRC_PHYS),
120 .length = OMAP243X_SDRC_SIZE,
121 .type = MT_DEVICE
122 },
123 {
124 .virtual = OMAP243X_SMS_VIRT,
125 .pfn = __phys_to_pfn(OMAP243X_SMS_PHYS),
126 .length = OMAP243X_SMS_SIZE,
127 .type = MT_DEVICE
128 },
129};
130#endif
131#endif
132
Tony Lindgrena8eb7ca2010-02-12 12:26:48 -0800133#ifdef CONFIG_ARCH_OMAP3
Syed Mohammed, Khasimcc26b3b2008-10-09 17:51:41 +0300134static struct map_desc omap34xx_io_desc[] __initdata = {
135 {
136 .virtual = L3_34XX_VIRT,
137 .pfn = __phys_to_pfn(L3_34XX_PHYS),
138 .length = L3_34XX_SIZE,
139 .type = MT_DEVICE
140 },
141 {
142 .virtual = L4_34XX_VIRT,
143 .pfn = __phys_to_pfn(L4_34XX_PHYS),
144 .length = L4_34XX_SIZE,
145 .type = MT_DEVICE
146 },
147 {
Syed Mohammed, Khasimcc26b3b2008-10-09 17:51:41 +0300148 .virtual = OMAP34XX_GPMC_VIRT,
149 .pfn = __phys_to_pfn(OMAP34XX_GPMC_PHYS),
150 .length = OMAP34XX_GPMC_SIZE,
151 .type = MT_DEVICE
152 },
153 {
154 .virtual = OMAP343X_SMS_VIRT,
155 .pfn = __phys_to_pfn(OMAP343X_SMS_PHYS),
156 .length = OMAP343X_SMS_SIZE,
157 .type = MT_DEVICE
158 },
159 {
160 .virtual = OMAP343X_SDRC_VIRT,
161 .pfn = __phys_to_pfn(OMAP343X_SDRC_PHYS),
162 .length = OMAP343X_SDRC_SIZE,
163 .type = MT_DEVICE
164 },
165 {
166 .virtual = L4_PER_34XX_VIRT,
167 .pfn = __phys_to_pfn(L4_PER_34XX_PHYS),
168 .length = L4_PER_34XX_SIZE,
169 .type = MT_DEVICE
170 },
171 {
172 .virtual = L4_EMU_34XX_VIRT,
173 .pfn = __phys_to_pfn(L4_EMU_34XX_PHYS),
174 .length = L4_EMU_34XX_SIZE,
175 .type = MT_DEVICE
176 },
Tony Lindgrena4f57b82010-04-30 12:57:14 -0700177#if defined(CONFIG_DEBUG_LL) && \
178 (defined(CONFIG_MACH_OMAP_ZOOM2) || defined(CONFIG_MACH_OMAP_ZOOM3))
179 {
180 .virtual = ZOOM_UART_VIRT,
181 .pfn = __phys_to_pfn(ZOOM_UART_BASE),
182 .length = SZ_1M,
183 .type = MT_DEVICE
184 },
185#endif
Syed Mohammed, Khasimcc26b3b2008-10-09 17:51:41 +0300186};
187#endif
Hemant Pedanekar01001712011-02-16 08:31:39 -0800188
Kevin Hilman33959552012-05-10 11:10:07 -0700189#ifdef CONFIG_SOC_TI81XX
Hemant Pedanekara9203602011-12-13 10:46:44 -0800190static struct map_desc omapti81xx_io_desc[] __initdata = {
Hemant Pedanekar01001712011-02-16 08:31:39 -0800191 {
192 .virtual = L4_34XX_VIRT,
193 .pfn = __phys_to_pfn(L4_34XX_PHYS),
194 .length = L4_34XX_SIZE,
195 .type = MT_DEVICE
Afzal Mohammed1e6cb142011-12-13 10:46:43 -0800196 }
197};
198#endif
199
Kevin Hilmanbb6abcf2012-05-10 11:10:07 -0700200#ifdef CONFIG_SOC_AM33XX
Afzal Mohammed1e6cb142011-12-13 10:46:43 -0800201static struct map_desc omapam33xx_io_desc[] __initdata = {
Hemant Pedanekar01001712011-02-16 08:31:39 -0800202 {
203 .virtual = L4_34XX_VIRT,
204 .pfn = __phys_to_pfn(L4_34XX_PHYS),
205 .length = L4_34XX_SIZE,
206 .type = MT_DEVICE
207 },
Afzal Mohammed1e6cb142011-12-13 10:46:43 -0800208 {
209 .virtual = L4_WK_AM33XX_VIRT,
210 .pfn = __phys_to_pfn(L4_WK_AM33XX_PHYS),
211 .length = L4_WK_AM33XX_SIZE,
212 .type = MT_DEVICE
213 }
Hemant Pedanekar01001712011-02-16 08:31:39 -0800214};
215#endif
216
Santosh Shilimkar44169072009-05-28 14:16:04 -0700217#ifdef CONFIG_ARCH_OMAP4
218static struct map_desc omap44xx_io_desc[] __initdata = {
219 {
220 .virtual = L3_44XX_VIRT,
221 .pfn = __phys_to_pfn(L3_44XX_PHYS),
222 .length = L3_44XX_SIZE,
223 .type = MT_DEVICE,
224 },
225 {
226 .virtual = L4_44XX_VIRT,
227 .pfn = __phys_to_pfn(L4_44XX_PHYS),
228 .length = L4_44XX_SIZE,
229 .type = MT_DEVICE,
230 },
231 {
Santosh Shilimkar44169072009-05-28 14:16:04 -0700232 .virtual = L4_PER_44XX_VIRT,
233 .pfn = __phys_to_pfn(L4_PER_44XX_PHYS),
234 .length = L4_PER_44XX_SIZE,
235 .type = MT_DEVICE,
236 },
Santosh Shilimkar137d1052011-06-25 18:04:31 -0700237#ifdef CONFIG_OMAP4_ERRATA_I688
238 {
239 .virtual = OMAP4_SRAM_VA,
240 .pfn = __phys_to_pfn(OMAP4_SRAM_PA),
241 .length = PAGE_SIZE,
242 .type = MT_MEMORY_SO,
243 },
244#endif
245
Santosh Shilimkar44169072009-05-28 14:16:04 -0700246};
247#endif
Syed Mohammed, Khasimcc26b3b2008-10-09 17:51:41 +0300248
R Sricharan05e152c2012-06-05 16:21:32 +0530249#ifdef CONFIG_SOC_OMAP5
250static struct map_desc omap54xx_io_desc[] __initdata = {
251 {
252 .virtual = L3_54XX_VIRT,
253 .pfn = __phys_to_pfn(L3_54XX_PHYS),
254 .length = L3_54XX_SIZE,
255 .type = MT_DEVICE,
256 },
257 {
258 .virtual = L4_54XX_VIRT,
259 .pfn = __phys_to_pfn(L4_54XX_PHYS),
260 .length = L4_54XX_SIZE,
261 .type = MT_DEVICE,
262 },
263 {
264 .virtual = L4_WK_54XX_VIRT,
265 .pfn = __phys_to_pfn(L4_WK_54XX_PHYS),
266 .length = L4_WK_54XX_SIZE,
267 .type = MT_DEVICE,
268 },
269 {
270 .virtual = L4_PER_54XX_VIRT,
271 .pfn = __phys_to_pfn(L4_PER_54XX_PHYS),
272 .length = L4_PER_54XX_SIZE,
273 .type = MT_DEVICE,
274 },
275};
276#endif
277
Tony Lindgren59b479e2011-01-27 16:39:40 -0800278#ifdef CONFIG_SOC_OMAP2420
Paul Walmsleyb6a42262012-10-29 20:50:21 -0600279void __init omap242x_map_io(void)
Tony Lindgren6fbd55d2010-02-12 12:26:47 -0800280{
281 iotable_init(omap24xx_io_desc, ARRAY_SIZE(omap24xx_io_desc));
282 iotable_init(omap242x_io_desc, ARRAY_SIZE(omap242x_io_desc));
Tony Lindgren6fbd55d2010-02-12 12:26:47 -0800283}
284#endif
285
Tony Lindgren59b479e2011-01-27 16:39:40 -0800286#ifdef CONFIG_SOC_OMAP2430
Paul Walmsleyb6a42262012-10-29 20:50:21 -0600287void __init omap243x_map_io(void)
Tony Lindgren6fbd55d2010-02-12 12:26:47 -0800288{
289 iotable_init(omap24xx_io_desc, ARRAY_SIZE(omap24xx_io_desc));
290 iotable_init(omap243x_io_desc, ARRAY_SIZE(omap243x_io_desc));
Tony Lindgren6fbd55d2010-02-12 12:26:47 -0800291}
292#endif
293
Tony Lindgrena8eb7ca2010-02-12 12:26:48 -0800294#ifdef CONFIG_ARCH_OMAP3
Paul Walmsleyb6a42262012-10-29 20:50:21 -0600295void __init omap3_map_io(void)
Tony Lindgren6fbd55d2010-02-12 12:26:47 -0800296{
297 iotable_init(omap34xx_io_desc, ARRAY_SIZE(omap34xx_io_desc));
Tony Lindgren6fbd55d2010-02-12 12:26:47 -0800298}
299#endif
300
Kevin Hilman33959552012-05-10 11:10:07 -0700301#ifdef CONFIG_SOC_TI81XX
Paul Walmsleyb6a42262012-10-29 20:50:21 -0600302void __init ti81xx_map_io(void)
Hemant Pedanekar01001712011-02-16 08:31:39 -0800303{
Hemant Pedanekara9203602011-12-13 10:46:44 -0800304 iotable_init(omapti81xx_io_desc, ARRAY_SIZE(omapti81xx_io_desc));
Hemant Pedanekar01001712011-02-16 08:31:39 -0800305}
306#endif
307
Kevin Hilmanbb6abcf2012-05-10 11:10:07 -0700308#ifdef CONFIG_SOC_AM33XX
Paul Walmsleyb6a42262012-10-29 20:50:21 -0600309void __init am33xx_map_io(void)
Afzal Mohammed1e6cb142011-12-13 10:46:43 -0800310{
311 iotable_init(omapam33xx_io_desc, ARRAY_SIZE(omapam33xx_io_desc));
Tony Lindgren6fbd55d2010-02-12 12:26:47 -0800312}
313#endif
314
315#ifdef CONFIG_ARCH_OMAP4
Paul Walmsleyb6a42262012-10-29 20:50:21 -0600316void __init omap4_map_io(void)
Tony Lindgren6fbd55d2010-02-12 12:26:47 -0800317{
318 iotable_init(omap44xx_io_desc, ARRAY_SIZE(omap44xx_io_desc));
Santosh Shilimkar2ec1fc42012-02-02 19:33:55 +0530319 omap_barriers_init();
Tony Lindgren6fbd55d2010-02-12 12:26:47 -0800320}
321#endif
322
R Sricharan05e152c2012-06-05 16:21:32 +0530323#ifdef CONFIG_SOC_OMAP5
Paul Walmsleyb6a42262012-10-29 20:50:21 -0600324void __init omap5_map_io(void)
R Sricharan05e152c2012-06-05 16:21:32 +0530325{
326 iotable_init(omap54xx_io_desc, ARRAY_SIZE(omap54xx_io_desc));
327}
328#endif
Paul Walmsley2f135ea2009-06-19 19:08:25 -0600329/*
330 * omap2_init_reprogram_sdrc - reprogram SDRC timing parameters
331 *
332 * Sets the CORE DPLL3 M2 divider to the same value that it's at
333 * currently. This has the effect of setting the SDRC SDRAM AC timing
334 * registers to the values currently defined by the kernel. Currently
335 * only defined for OMAP3; will return 0 if called on OMAP2. Returns
336 * -EINVAL if the dpll3_m2_ck cannot be found, 0 if called on OMAP2,
337 * or passes along the return value of clk_set_rate().
338 */
339static int __init _omap2_init_reprogram_sdrc(void)
340{
341 struct clk *dpll3_m2_ck;
342 int v = -EINVAL;
343 long rate;
344
345 if (!cpu_is_omap34xx())
346 return 0;
347
348 dpll3_m2_ck = clk_get(NULL, "dpll3_m2_ck");
Aaro Koskinene281f7e2010-11-30 14:17:58 +0000349 if (IS_ERR(dpll3_m2_ck))
Paul Walmsley2f135ea2009-06-19 19:08:25 -0600350 return -EINVAL;
351
352 rate = clk_get_rate(dpll3_m2_ck);
353 pr_info("Reprogramming SDRC clock to %ld Hz\n", rate);
354 v = clk_set_rate(dpll3_m2_ck, rate);
355 if (v)
356 pr_err("dpll3_m2_clk rate change failed: %d\n", v);
357
358 clk_put(dpll3_m2_ck);
359
360 return v;
361}
362
Paul Walmsley2092e5c2010-12-14 12:42:35 -0700363static int _set_hwmod_postsetup_state(struct omap_hwmod *oh, void *data)
364{
365 return omap_hwmod_set_postsetup_state(oh, *(u8 *)data);
366}
367
Tony Lindgren7b250af2011-10-04 18:26:28 -0700368static void __init omap_common_init_early(void)
369{
Arnd Bergmanndf804422011-11-01 13:47:27 +0100370 omap_init_consistent_dma_size();
Tony Lindgren7b250af2011-10-04 18:26:28 -0700371}
372
373static void __init omap_hwmod_init_postsetup(void)
Tony Lindgren120db2c2006-04-02 17:46:27 +0100374{
Paul Walmsley2092e5c2010-12-14 12:42:35 -0700375 u8 postsetup_state;
376
Paul Walmsley2092e5c2010-12-14 12:42:35 -0700377 /* Set the default postsetup state for all hwmods */
378#ifdef CONFIG_PM_RUNTIME
379 postsetup_state = _HWMOD_STATE_IDLE;
380#else
381 postsetup_state = _HWMOD_STATE_ENABLED;
382#endif
383 omap_hwmod_for_each(_set_hwmod_postsetup_state, &postsetup_state);
Benoit Cousson55d2cb02010-05-12 17:54:36 +0200384
Kevin Hilman53da4ce22010-12-09 09:13:48 -0600385 omap_pm_if_early_init();
Paul Walmsley48057342010-12-21 15:25:10 -0700386}
387
Paul Walmsley16110792012-01-25 12:57:46 -0700388#ifdef CONFIG_SOC_OMAP2420
Tony Lindgren8f5b5a42011-08-22 23:57:24 -0700389void __init omap2420_init_early(void)
390{
Paul Walmsleyb6a42262012-10-29 20:50:21 -0600391 omap2_set_globals_tap(OMAP242X_CLASS, OMAP2_L4_IO_ADDRESS(0x48014000));
392 omap2_set_globals_sdrc(OMAP2_L3_IO_ADDRESS(OMAP2420_SDRC_BASE),
393 OMAP2_L3_IO_ADDRESS(OMAP2420_SMS_BASE));
394 omap2_set_globals_control(OMAP2_L4_IO_ADDRESS(OMAP242X_CTRL_BASE),
395 NULL);
Paul Walmsleyd9a16f92012-10-29 20:57:39 -0600396 omap2_set_globals_prm(OMAP2_L4_IO_ADDRESS(OMAP2420_PRM_BASE));
397 omap2_set_globals_cm(OMAP2_L4_IO_ADDRESS(OMAP2420_CM_BASE), NULL);
Vaibhav Hiremath4de34f32011-12-19 15:50:15 +0530398 omap2xxx_check_revision();
Paul Walmsley63a293e2012-11-21 16:15:16 -0700399 omap2xxx_prm_init();
Paul Walmsleyc4ceedc2012-10-29 20:56:29 -0600400 omap2xxx_cm_init();
Tony Lindgren7b250af2011-10-04 18:26:28 -0700401 omap_common_init_early();
402 omap2xxx_voltagedomains_init();
403 omap242x_powerdomains_init();
404 omap242x_clockdomains_init();
405 omap2420_hwmod_init();
406 omap_hwmod_init_postsetup();
407 omap2420_clk_init();
Tony Lindgren8f5b5a42011-08-22 23:57:24 -0700408}
Shawn Guobbd707a2012-04-26 16:06:50 +0800409
410void __init omap2420_init_late(void)
411{
412 omap_mux_late_init();
413 omap2_common_pm_late_init();
414 omap2_pm_init();
Rajendra Nayak23fb8ba2012-06-01 14:02:49 +0530415 omap2_clk_enable_autoidle_all();
Shawn Guobbd707a2012-04-26 16:06:50 +0800416}
Paul Walmsley16110792012-01-25 12:57:46 -0700417#endif
Tony Lindgren8f5b5a42011-08-22 23:57:24 -0700418
Paul Walmsley16110792012-01-25 12:57:46 -0700419#ifdef CONFIG_SOC_OMAP2430
Tony Lindgren8f5b5a42011-08-22 23:57:24 -0700420void __init omap2430_init_early(void)
421{
Paul Walmsleyb6a42262012-10-29 20:50:21 -0600422 omap2_set_globals_tap(OMAP243X_CLASS, OMAP2_L4_IO_ADDRESS(0x4900a000));
423 omap2_set_globals_sdrc(OMAP2_L3_IO_ADDRESS(OMAP243X_SDRC_BASE),
424 OMAP2_L3_IO_ADDRESS(OMAP243X_SMS_BASE));
425 omap2_set_globals_control(OMAP2_L4_IO_ADDRESS(OMAP243X_CTRL_BASE),
426 NULL);
Paul Walmsleyd9a16f92012-10-29 20:57:39 -0600427 omap2_set_globals_prm(OMAP2_L4_IO_ADDRESS(OMAP2430_PRM_BASE));
428 omap2_set_globals_cm(OMAP2_L4_IO_ADDRESS(OMAP2430_CM_BASE), NULL);
Vaibhav Hiremath4de34f32011-12-19 15:50:15 +0530429 omap2xxx_check_revision();
Paul Walmsley63a293e2012-11-21 16:15:16 -0700430 omap2xxx_prm_init();
Paul Walmsleyc4ceedc2012-10-29 20:56:29 -0600431 omap2xxx_cm_init();
Tony Lindgren7b250af2011-10-04 18:26:28 -0700432 omap_common_init_early();
433 omap2xxx_voltagedomains_init();
434 omap243x_powerdomains_init();
435 omap243x_clockdomains_init();
436 omap2430_hwmod_init();
437 omap_hwmod_init_postsetup();
438 omap2430_clk_init();
439}
Shawn Guobbd707a2012-04-26 16:06:50 +0800440
441void __init omap2430_init_late(void)
442{
443 omap_mux_late_init();
444 omap2_common_pm_late_init();
445 omap2_pm_init();
Rajendra Nayak23fb8ba2012-06-01 14:02:49 +0530446 omap2_clk_enable_autoidle_all();
Shawn Guobbd707a2012-04-26 16:06:50 +0800447}
Sanjeev Premic4e2d242011-10-13 21:44:10 +0530448#endif
Tony Lindgren7b250af2011-10-04 18:26:28 -0700449
450/*
451 * Currently only board-omap3beagle.c should call this because of the
452 * same machine_id for 34xx and 36xx beagle.. Will get fixed with DT.
453 */
Sanjeev Premic4e2d242011-10-13 21:44:10 +0530454#ifdef CONFIG_ARCH_OMAP3
Tony Lindgren7b250af2011-10-04 18:26:28 -0700455void __init omap3_init_early(void)
456{
Paul Walmsleyb6a42262012-10-29 20:50:21 -0600457 omap2_set_globals_tap(OMAP343X_CLASS, OMAP2_L4_IO_ADDRESS(0x4830A000));
458 omap2_set_globals_sdrc(OMAP2_L3_IO_ADDRESS(OMAP343X_SDRC_BASE),
459 OMAP2_L3_IO_ADDRESS(OMAP343X_SMS_BASE));
460 omap2_set_globals_control(OMAP2_L4_IO_ADDRESS(OMAP343X_CTRL_BASE),
461 NULL);
Paul Walmsleyd9a16f92012-10-29 20:57:39 -0600462 omap2_set_globals_prm(OMAP2_L4_IO_ADDRESS(OMAP3430_PRM_BASE));
463 omap2_set_globals_cm(OMAP2_L4_IO_ADDRESS(OMAP3430_CM_BASE), NULL);
Vaibhav Hiremath4de34f32011-12-19 15:50:15 +0530464 omap3xxx_check_revision();
465 omap3xxx_check_features();
Paul Walmsley63a293e2012-11-21 16:15:16 -0700466 omap3xxx_prm_init();
Paul Walmsleyc4ceedc2012-10-29 20:56:29 -0600467 omap3xxx_cm_init();
Tony Lindgren7b250af2011-10-04 18:26:28 -0700468 omap_common_init_early();
469 omap3xxx_voltagedomains_init();
470 omap3xxx_powerdomains_init();
471 omap3xxx_clockdomains_init();
472 omap3xxx_hwmod_init();
473 omap_hwmod_init_postsetup();
474 omap3xxx_clk_init();
Tony Lindgren8f5b5a42011-08-22 23:57:24 -0700475}
476
477void __init omap3430_init_early(void)
478{
Tony Lindgren7b250af2011-10-04 18:26:28 -0700479 omap3_init_early();
Tony Lindgren8f5b5a42011-08-22 23:57:24 -0700480}
481
482void __init omap35xx_init_early(void)
483{
Tony Lindgren7b250af2011-10-04 18:26:28 -0700484 omap3_init_early();
Tony Lindgren8f5b5a42011-08-22 23:57:24 -0700485}
486
487void __init omap3630_init_early(void)
488{
Tony Lindgren7b250af2011-10-04 18:26:28 -0700489 omap3_init_early();
Tony Lindgren8f5b5a42011-08-22 23:57:24 -0700490}
491
492void __init am35xx_init_early(void)
493{
Tony Lindgren7b250af2011-10-04 18:26:28 -0700494 omap3_init_early();
Tony Lindgren8f5b5a42011-08-22 23:57:24 -0700495}
496
Hemant Pedanekara9203602011-12-13 10:46:44 -0800497void __init ti81xx_init_early(void)
Tony Lindgren8f5b5a42011-08-22 23:57:24 -0700498{
Paul Walmsleyb6a42262012-10-29 20:50:21 -0600499 omap2_set_globals_tap(OMAP343X_CLASS,
500 OMAP2_L4_IO_ADDRESS(TI81XX_TAP_BASE));
501 omap2_set_globals_control(OMAP2_L4_IO_ADDRESS(TI81XX_CTRL_BASE),
502 NULL);
Paul Walmsleyd9a16f92012-10-29 20:57:39 -0600503 omap2_set_globals_prm(OMAP2_L4_IO_ADDRESS(TI81XX_PRCM_BASE));
504 omap2_set_globals_cm(OMAP2_L4_IO_ADDRESS(TI81XX_PRCM_BASE), NULL);
Vaibhav Hiremath4de34f32011-12-19 15:50:15 +0530505 omap3xxx_check_revision();
506 ti81xx_check_features();
Tony Lindgren4c3cf902011-10-04 18:17:41 -0700507 omap_common_init_early();
508 omap3xxx_voltagedomains_init();
509 omap3xxx_powerdomains_init();
510 omap3xxx_clockdomains_init();
511 omap3xxx_hwmod_init();
512 omap_hwmod_init_postsetup();
513 omap3xxx_clk_init();
Tony Lindgren8f5b5a42011-08-22 23:57:24 -0700514}
Shawn Guobbd707a2012-04-26 16:06:50 +0800515
516void __init omap3_init_late(void)
517{
518 omap_mux_late_init();
519 omap2_common_pm_late_init();
520 omap3_pm_init();
Rajendra Nayak23fb8ba2012-06-01 14:02:49 +0530521 omap2_clk_enable_autoidle_all();
Shawn Guobbd707a2012-04-26 16:06:50 +0800522}
523
524void __init omap3430_init_late(void)
525{
526 omap_mux_late_init();
527 omap2_common_pm_late_init();
528 omap3_pm_init();
Rajendra Nayak23fb8ba2012-06-01 14:02:49 +0530529 omap2_clk_enable_autoidle_all();
Shawn Guobbd707a2012-04-26 16:06:50 +0800530}
531
532void __init omap35xx_init_late(void)
533{
534 omap_mux_late_init();
535 omap2_common_pm_late_init();
536 omap3_pm_init();
Rajendra Nayak23fb8ba2012-06-01 14:02:49 +0530537 omap2_clk_enable_autoidle_all();
Shawn Guobbd707a2012-04-26 16:06:50 +0800538}
539
540void __init omap3630_init_late(void)
541{
542 omap_mux_late_init();
543 omap2_common_pm_late_init();
544 omap3_pm_init();
Rajendra Nayak23fb8ba2012-06-01 14:02:49 +0530545 omap2_clk_enable_autoidle_all();
Shawn Guobbd707a2012-04-26 16:06:50 +0800546}
547
548void __init am35xx_init_late(void)
549{
550 omap_mux_late_init();
551 omap2_common_pm_late_init();
552 omap3_pm_init();
Rajendra Nayak23fb8ba2012-06-01 14:02:49 +0530553 omap2_clk_enable_autoidle_all();
Shawn Guobbd707a2012-04-26 16:06:50 +0800554}
555
556void __init ti81xx_init_late(void)
557{
558 omap_mux_late_init();
559 omap2_common_pm_late_init();
560 omap3_pm_init();
Rajendra Nayak23fb8ba2012-06-01 14:02:49 +0530561 omap2_clk_enable_autoidle_all();
Shawn Guobbd707a2012-04-26 16:06:50 +0800562}
Sanjeev Premic4e2d242011-10-13 21:44:10 +0530563#endif
Tony Lindgren8f5b5a42011-08-22 23:57:24 -0700564
Afzal Mohammed08f30982012-05-11 00:38:49 +0530565#ifdef CONFIG_SOC_AM33XX
566void __init am33xx_init_early(void)
567{
Paul Walmsleyb6a42262012-10-29 20:50:21 -0600568 omap2_set_globals_tap(AM335X_CLASS,
569 AM33XX_L4_WK_IO_ADDRESS(AM33XX_TAP_BASE));
570 omap2_set_globals_control(AM33XX_L4_WK_IO_ADDRESS(AM33XX_CTRL_BASE),
571 NULL);
Paul Walmsleyd9a16f92012-10-29 20:57:39 -0600572 omap2_set_globals_prm(AM33XX_L4_WK_IO_ADDRESS(AM33XX_PRCM_BASE));
573 omap2_set_globals_cm(AM33XX_L4_WK_IO_ADDRESS(AM33XX_PRCM_BASE), NULL);
Afzal Mohammed08f30982012-05-11 00:38:49 +0530574 omap3xxx_check_revision();
575 ti81xx_check_features();
576 omap_common_init_early();
Vaibhav Hiremathce3fc892012-06-18 00:47:26 -0600577 am33xx_voltagedomains_init();
Vaibhav Hiremath3f0ea762012-06-18 00:47:27 -0600578 am33xx_powerdomains_init();
Vaibhav Hiremath9c80f3a2012-06-18 00:47:27 -0600579 am33xx_clockdomains_init();
Vaibhav Hirematha2cfc502012-07-25 13:51:13 -0600580 am33xx_hwmod_init();
581 omap_hwmod_init_postsetup();
Vaibhav Hiremathe30384a2012-05-29 15:26:41 +0530582 am33xx_clk_init();
Afzal Mohammed08f30982012-05-11 00:38:49 +0530583}
584#endif
585
Sanjeev Premic4e2d242011-10-13 21:44:10 +0530586#ifdef CONFIG_ARCH_OMAP4
Tony Lindgren8f5b5a42011-08-22 23:57:24 -0700587void __init omap4430_init_early(void)
588{
Paul Walmsleyb6a42262012-10-29 20:50:21 -0600589 omap2_set_globals_tap(OMAP443X_CLASS,
590 OMAP2_L4_IO_ADDRESS(OMAP443X_SCM_BASE));
591 omap2_set_globals_control(OMAP2_L4_IO_ADDRESS(OMAP443X_SCM_BASE),
592 OMAP2_L4_IO_ADDRESS(OMAP443X_CTRL_BASE));
Paul Walmsleyd9a16f92012-10-29 20:57:39 -0600593 omap2_set_globals_prm(OMAP2_L4_IO_ADDRESS(OMAP4430_PRM_BASE));
594 omap2_set_globals_cm(OMAP2_L4_IO_ADDRESS(OMAP4430_CM_BASE),
595 OMAP2_L4_IO_ADDRESS(OMAP4430_CM2_BASE));
596 omap2_set_globals_prcm_mpu(OMAP2_L4_IO_ADDRESS(OMAP4430_PRCM_MPU_BASE));
597 omap_prm_base_init();
598 omap_cm_base_init();
Vaibhav Hiremath4de34f32011-12-19 15:50:15 +0530599 omap4xxx_check_revision();
600 omap4xxx_check_features();
Paul Walmsley63a293e2012-11-21 16:15:16 -0700601 omap44xx_prm_init();
Tony Lindgren7b250af2011-10-04 18:26:28 -0700602 omap_common_init_early();
603 omap44xx_voltagedomains_init();
604 omap44xx_powerdomains_init();
605 omap44xx_clockdomains_init();
606 omap44xx_hwmod_init();
607 omap_hwmod_init_postsetup();
608 omap4xxx_clk_init();
Tony Lindgren8f5b5a42011-08-22 23:57:24 -0700609}
Shawn Guobbd707a2012-04-26 16:06:50 +0800610
611void __init omap4430_init_late(void)
612{
613 omap_mux_late_init();
614 omap2_common_pm_late_init();
615 omap4_pm_init();
Rajendra Nayak23fb8ba2012-06-01 14:02:49 +0530616 omap2_clk_enable_autoidle_all();
Shawn Guobbd707a2012-04-26 16:06:50 +0800617}
Sanjeev Premic4e2d242011-10-13 21:44:10 +0530618#endif
Tony Lindgren8f5b5a42011-08-22 23:57:24 -0700619
R Sricharan05e152c2012-06-05 16:21:32 +0530620#ifdef CONFIG_SOC_OMAP5
621void __init omap5_init_early(void)
622{
Paul Walmsleyb6a42262012-10-29 20:50:21 -0600623 omap2_set_globals_tap(OMAP54XX_CLASS,
624 OMAP2_L4_IO_ADDRESS(OMAP54XX_SCM_BASE));
625 omap2_set_globals_control(OMAP2_L4_IO_ADDRESS(OMAP54XX_SCM_BASE),
626 OMAP2_L4_IO_ADDRESS(OMAP54XX_CTRL_BASE));
Paul Walmsleyd9a16f92012-10-29 20:57:39 -0600627 omap2_set_globals_prm(OMAP2_L4_IO_ADDRESS(OMAP54XX_PRM_BASE));
628 omap2_set_globals_cm(OMAP2_L4_IO_ADDRESS(OMAP54XX_CM_CORE_AON_BASE),
629 OMAP2_L4_IO_ADDRESS(OMAP54XX_CM_CORE_BASE));
630 omap2_set_globals_prcm_mpu(OMAP2_L4_IO_ADDRESS(OMAP54XX_PRCM_MPU_BASE));
631 omap_prm_base_init();
632 omap_cm_base_init();
R Sricharan05e152c2012-06-05 16:21:32 +0530633 omap5xxx_check_revision();
634 omap_common_init_early();
635}
636#endif
637
Tony Lindgrena4ca9db2011-08-22 23:57:23 -0700638void __init omap_sdrc_init(struct omap_sdrc_params *sdrc_cs0,
Paul Walmsley48057342010-12-21 15:25:10 -0700639 struct omap_sdrc_params *sdrc_cs1)
640{
Tony Lindgrena66cb342011-10-04 13:52:57 -0700641 omap_sram_init();
642
Hemant Pedanekar01001712011-02-16 08:31:39 -0800643 if (cpu_is_omap24xx() || omap3_has_sdrc()) {
Kevin Hilmanaa4b1f62010-03-10 17:16:31 +0000644 omap2_sdrc_init(sdrc_cs0, sdrc_cs1);
645 _omap2_init_reprogram_sdrc();
646 }
Tony Lindgren1dbae812005-11-10 14:26:51 +0000647}