Thierry Reding | 5acd351 | 2017-11-10 15:27:25 +0100 | [diff] [blame] | 1 | /* |
| 2 | * Copyright (C) 2017 NVIDIA CORPORATION. All rights reserved. |
| 3 | * |
| 4 | * This program is free software; you can redistribute it and/or modify |
| 5 | * it under the terms of the GNU General Public License version 2 as |
| 6 | * published by the Free Software Foundation. |
| 7 | */ |
| 8 | |
| 9 | #include <drm/drm_atomic.h> |
| 10 | #include <drm/drm_atomic_helper.h> |
| 11 | #include <drm/drm_plane_helper.h> |
| 12 | |
| 13 | #include "dc.h" |
| 14 | #include "plane.h" |
| 15 | |
| 16 | static void tegra_plane_destroy(struct drm_plane *plane) |
| 17 | { |
| 18 | struct tegra_plane *p = to_tegra_plane(plane); |
| 19 | |
| 20 | drm_plane_cleanup(plane); |
| 21 | kfree(p); |
| 22 | } |
| 23 | |
| 24 | static void tegra_plane_reset(struct drm_plane *plane) |
| 25 | { |
Dmitry Osipenko | 3dae08b | 2018-05-04 17:39:59 +0300 | [diff] [blame^] | 26 | struct tegra_plane *p = to_tegra_plane(plane); |
Thierry Reding | 5acd351 | 2017-11-10 15:27:25 +0100 | [diff] [blame] | 27 | struct tegra_plane_state *state; |
| 28 | |
| 29 | if (plane->state) |
| 30 | __drm_atomic_helper_plane_destroy_state(plane->state); |
| 31 | |
| 32 | kfree(plane->state); |
| 33 | plane->state = NULL; |
| 34 | |
| 35 | state = kzalloc(sizeof(*state), GFP_KERNEL); |
| 36 | if (state) { |
| 37 | plane->state = &state->base; |
| 38 | plane->state->plane = plane; |
Dmitry Osipenko | 3dae08b | 2018-05-04 17:39:59 +0300 | [diff] [blame^] | 39 | plane->state->zpos = p->index; |
| 40 | plane->state->normalized_zpos = p->index; |
Thierry Reding | 5acd351 | 2017-11-10 15:27:25 +0100 | [diff] [blame] | 41 | } |
| 42 | } |
| 43 | |
| 44 | static struct drm_plane_state * |
| 45 | tegra_plane_atomic_duplicate_state(struct drm_plane *plane) |
| 46 | { |
| 47 | struct tegra_plane_state *state = to_tegra_plane_state(plane->state); |
| 48 | struct tegra_plane_state *copy; |
Thierry Reding | ebae8d0 | 2017-12-20 09:39:14 +0100 | [diff] [blame] | 49 | unsigned int i; |
Thierry Reding | 5acd351 | 2017-11-10 15:27:25 +0100 | [diff] [blame] | 50 | |
| 51 | copy = kmalloc(sizeof(*copy), GFP_KERNEL); |
| 52 | if (!copy) |
| 53 | return NULL; |
| 54 | |
| 55 | __drm_atomic_helper_plane_duplicate_state(plane, ©->base); |
| 56 | copy->tiling = state->tiling; |
| 57 | copy->format = state->format; |
| 58 | copy->swap = state->swap; |
Thierry Reding | ebae8d0 | 2017-12-20 09:39:14 +0100 | [diff] [blame] | 59 | copy->opaque = state->opaque; |
| 60 | |
Dmitry Osipenko | 3dae08b | 2018-05-04 17:39:59 +0300 | [diff] [blame^] | 61 | for (i = 0; i < 2; i++) |
| 62 | copy->blending[i] = state->blending[i]; |
Thierry Reding | 5acd351 | 2017-11-10 15:27:25 +0100 | [diff] [blame] | 63 | |
| 64 | return ©->base; |
| 65 | } |
| 66 | |
| 67 | static void tegra_plane_atomic_destroy_state(struct drm_plane *plane, |
| 68 | struct drm_plane_state *state) |
| 69 | { |
| 70 | __drm_atomic_helper_plane_destroy_state(state); |
| 71 | kfree(state); |
| 72 | } |
| 73 | |
Thierry Reding | e90124c | 2018-03-15 16:44:04 +0100 | [diff] [blame] | 74 | static bool tegra_plane_format_mod_supported(struct drm_plane *plane, |
| 75 | uint32_t format, |
| 76 | uint64_t modifier) |
| 77 | { |
| 78 | const struct drm_format_info *info = drm_format_info(format); |
| 79 | |
| 80 | if (modifier == DRM_FORMAT_MOD_LINEAR) |
| 81 | return true; |
| 82 | |
| 83 | if (info->num_planes == 1) |
| 84 | return true; |
| 85 | |
| 86 | return false; |
| 87 | } |
| 88 | |
Thierry Reding | 5acd351 | 2017-11-10 15:27:25 +0100 | [diff] [blame] | 89 | const struct drm_plane_funcs tegra_plane_funcs = { |
| 90 | .update_plane = drm_atomic_helper_update_plane, |
| 91 | .disable_plane = drm_atomic_helper_disable_plane, |
| 92 | .destroy = tegra_plane_destroy, |
| 93 | .reset = tegra_plane_reset, |
| 94 | .atomic_duplicate_state = tegra_plane_atomic_duplicate_state, |
| 95 | .atomic_destroy_state = tegra_plane_atomic_destroy_state, |
Thierry Reding | e90124c | 2018-03-15 16:44:04 +0100 | [diff] [blame] | 96 | .format_mod_supported = tegra_plane_format_mod_supported, |
Thierry Reding | 5acd351 | 2017-11-10 15:27:25 +0100 | [diff] [blame] | 97 | }; |
| 98 | |
| 99 | int tegra_plane_state_add(struct tegra_plane *plane, |
| 100 | struct drm_plane_state *state) |
| 101 | { |
| 102 | struct drm_crtc_state *crtc_state; |
| 103 | struct tegra_dc_state *tegra; |
Thierry Reding | 5acd351 | 2017-11-10 15:27:25 +0100 | [diff] [blame] | 104 | int err; |
| 105 | |
| 106 | /* Propagate errors from allocation or locking failures. */ |
| 107 | crtc_state = drm_atomic_get_crtc_state(state->state, state->crtc); |
| 108 | if (IS_ERR(crtc_state)) |
| 109 | return PTR_ERR(crtc_state); |
| 110 | |
Thierry Reding | 5acd351 | 2017-11-10 15:27:25 +0100 | [diff] [blame] | 111 | /* Check plane state for visibility and calculate clipping bounds */ |
Ville Syrjälä | 81af63a | 2018-01-23 19:08:57 +0200 | [diff] [blame] | 112 | err = drm_atomic_helper_check_plane_state(state, crtc_state, |
Thierry Reding | 5acd351 | 2017-11-10 15:27:25 +0100 | [diff] [blame] | 113 | 0, INT_MAX, true, true); |
| 114 | if (err < 0) |
| 115 | return err; |
| 116 | |
| 117 | tegra = to_dc_state(crtc_state); |
| 118 | |
| 119 | tegra->planes |= WIN_A_ACT_REQ << plane->index; |
| 120 | |
| 121 | return 0; |
| 122 | } |
| 123 | |
| 124 | int tegra_plane_format(u32 fourcc, u32 *format, u32 *swap) |
| 125 | { |
| 126 | /* assume no swapping of fetched data */ |
| 127 | if (swap) |
| 128 | *swap = BYTE_SWAP_NOSWAP; |
| 129 | |
| 130 | switch (fourcc) { |
Thierry Reding | 511c702 | 2017-11-14 16:07:40 +0100 | [diff] [blame] | 131 | case DRM_FORMAT_ARGB4444: |
| 132 | *format = WIN_COLOR_DEPTH_B4G4R4A4; |
Thierry Reding | 7772fda | 2017-10-12 17:30:55 +0200 | [diff] [blame] | 133 | break; |
| 134 | |
Thierry Reding | 511c702 | 2017-11-14 16:07:40 +0100 | [diff] [blame] | 135 | case DRM_FORMAT_ARGB1555: |
| 136 | *format = WIN_COLOR_DEPTH_B5G5R5A1; |
Thierry Reding | 5acd351 | 2017-11-10 15:27:25 +0100 | [diff] [blame] | 137 | break; |
| 138 | |
Thierry Reding | 511c702 | 2017-11-14 16:07:40 +0100 | [diff] [blame] | 139 | case DRM_FORMAT_RGB565: |
| 140 | *format = WIN_COLOR_DEPTH_B5G6R5; |
| 141 | break; |
| 142 | |
| 143 | case DRM_FORMAT_RGBA5551: |
| 144 | *format = WIN_COLOR_DEPTH_A1B5G5R5; |
Thierry Reding | 7772fda | 2017-10-12 17:30:55 +0200 | [diff] [blame] | 145 | break; |
| 146 | |
| 147 | case DRM_FORMAT_ARGB8888: |
Thierry Reding | 5acd351 | 2017-11-10 15:27:25 +0100 | [diff] [blame] | 148 | *format = WIN_COLOR_DEPTH_B8G8R8A8; |
| 149 | break; |
| 150 | |
Thierry Reding | 511c702 | 2017-11-14 16:07:40 +0100 | [diff] [blame] | 151 | case DRM_FORMAT_ABGR8888: |
| 152 | *format = WIN_COLOR_DEPTH_R8G8B8A8; |
| 153 | break; |
| 154 | |
| 155 | case DRM_FORMAT_ABGR4444: |
| 156 | *format = WIN_COLOR_DEPTH_R4G4B4A4; |
| 157 | break; |
| 158 | |
| 159 | case DRM_FORMAT_ABGR1555: |
| 160 | *format = WIN_COLOR_DEPTH_R5G5B5A; |
| 161 | break; |
| 162 | |
| 163 | case DRM_FORMAT_BGRA5551: |
| 164 | *format = WIN_COLOR_DEPTH_AR5G5B5; |
| 165 | break; |
| 166 | |
| 167 | case DRM_FORMAT_XRGB1555: |
| 168 | *format = WIN_COLOR_DEPTH_B5G5R5X1; |
| 169 | break; |
| 170 | |
| 171 | case DRM_FORMAT_RGBX5551: |
| 172 | *format = WIN_COLOR_DEPTH_X1B5G5R5; |
| 173 | break; |
| 174 | |
| 175 | case DRM_FORMAT_XBGR1555: |
| 176 | *format = WIN_COLOR_DEPTH_R5G5B5X1; |
| 177 | break; |
| 178 | |
| 179 | case DRM_FORMAT_BGRX5551: |
| 180 | *format = WIN_COLOR_DEPTH_X1R5G5B5; |
| 181 | break; |
| 182 | |
| 183 | case DRM_FORMAT_BGR565: |
| 184 | *format = WIN_COLOR_DEPTH_R5G6B5; |
| 185 | break; |
| 186 | |
| 187 | case DRM_FORMAT_BGRA8888: |
| 188 | *format = WIN_COLOR_DEPTH_A8R8G8B8; |
| 189 | break; |
| 190 | |
| 191 | case DRM_FORMAT_RGBA8888: |
| 192 | *format = WIN_COLOR_DEPTH_A8B8G8R8; |
| 193 | break; |
| 194 | |
| 195 | case DRM_FORMAT_XRGB8888: |
| 196 | *format = WIN_COLOR_DEPTH_B8G8R8X8; |
| 197 | break; |
| 198 | |
| 199 | case DRM_FORMAT_XBGR8888: |
| 200 | *format = WIN_COLOR_DEPTH_R8G8B8X8; |
Thierry Reding | 5acd351 | 2017-11-10 15:27:25 +0100 | [diff] [blame] | 201 | break; |
| 202 | |
| 203 | case DRM_FORMAT_UYVY: |
| 204 | *format = WIN_COLOR_DEPTH_YCbCr422; |
| 205 | break; |
| 206 | |
| 207 | case DRM_FORMAT_YUYV: |
| 208 | if (!swap) |
| 209 | return -EINVAL; |
| 210 | |
| 211 | *format = WIN_COLOR_DEPTH_YCbCr422; |
| 212 | *swap = BYTE_SWAP_SWAP2; |
| 213 | break; |
| 214 | |
| 215 | case DRM_FORMAT_YUV420: |
| 216 | *format = WIN_COLOR_DEPTH_YCbCr420P; |
| 217 | break; |
| 218 | |
| 219 | case DRM_FORMAT_YUV422: |
| 220 | *format = WIN_COLOR_DEPTH_YCbCr422P; |
| 221 | break; |
| 222 | |
| 223 | default: |
| 224 | return -EINVAL; |
| 225 | } |
| 226 | |
| 227 | return 0; |
| 228 | } |
| 229 | |
| 230 | bool tegra_plane_format_is_yuv(unsigned int format, bool *planar) |
| 231 | { |
| 232 | switch (format) { |
| 233 | case WIN_COLOR_DEPTH_YCbCr422: |
| 234 | case WIN_COLOR_DEPTH_YUV422: |
| 235 | if (planar) |
| 236 | *planar = false; |
| 237 | |
| 238 | return true; |
| 239 | |
| 240 | case WIN_COLOR_DEPTH_YCbCr420P: |
| 241 | case WIN_COLOR_DEPTH_YUV420P: |
| 242 | case WIN_COLOR_DEPTH_YCbCr422P: |
| 243 | case WIN_COLOR_DEPTH_YUV422P: |
| 244 | case WIN_COLOR_DEPTH_YCbCr422R: |
| 245 | case WIN_COLOR_DEPTH_YUV422R: |
| 246 | case WIN_COLOR_DEPTH_YCbCr422RA: |
| 247 | case WIN_COLOR_DEPTH_YUV422RA: |
| 248 | if (planar) |
| 249 | *planar = true; |
| 250 | |
| 251 | return true; |
| 252 | } |
| 253 | |
| 254 | if (planar) |
| 255 | *planar = false; |
| 256 | |
| 257 | return false; |
| 258 | } |
Thierry Reding | ebae8d0 | 2017-12-20 09:39:14 +0100 | [diff] [blame] | 259 | |
| 260 | static bool __drm_format_has_alpha(u32 format) |
| 261 | { |
| 262 | switch (format) { |
| 263 | case DRM_FORMAT_ARGB1555: |
| 264 | case DRM_FORMAT_RGBA5551: |
| 265 | case DRM_FORMAT_ABGR8888: |
| 266 | case DRM_FORMAT_ARGB8888: |
| 267 | return true; |
| 268 | } |
| 269 | |
| 270 | return false; |
| 271 | } |
| 272 | |
Dmitry Osipenko | 3dae08b | 2018-05-04 17:39:59 +0300 | [diff] [blame^] | 273 | static int tegra_plane_format_get_alpha(unsigned int opaque, |
| 274 | unsigned int *alpha) |
Thierry Reding | ebae8d0 | 2017-12-20 09:39:14 +0100 | [diff] [blame] | 275 | { |
Thierry Reding | 5467a8b | 2018-01-08 13:40:44 +0100 | [diff] [blame] | 276 | if (tegra_plane_format_is_yuv(opaque, NULL)) { |
| 277 | *alpha = opaque; |
| 278 | return 0; |
| 279 | } |
| 280 | |
Thierry Reding | ebae8d0 | 2017-12-20 09:39:14 +0100 | [diff] [blame] | 281 | switch (opaque) { |
| 282 | case WIN_COLOR_DEPTH_B5G5R5X1: |
| 283 | *alpha = WIN_COLOR_DEPTH_B5G5R5A1; |
| 284 | return 0; |
| 285 | |
| 286 | case WIN_COLOR_DEPTH_X1B5G5R5: |
| 287 | *alpha = WIN_COLOR_DEPTH_A1B5G5R5; |
| 288 | return 0; |
| 289 | |
| 290 | case WIN_COLOR_DEPTH_R8G8B8X8: |
| 291 | *alpha = WIN_COLOR_DEPTH_R8G8B8A8; |
| 292 | return 0; |
| 293 | |
| 294 | case WIN_COLOR_DEPTH_B8G8R8X8: |
| 295 | *alpha = WIN_COLOR_DEPTH_B8G8R8A8; |
| 296 | return 0; |
Thierry Reding | 8a927d6 | 2018-03-15 11:09:35 +0100 | [diff] [blame] | 297 | |
| 298 | case WIN_COLOR_DEPTH_B5G6R5: |
| 299 | *alpha = opaque; |
| 300 | return 0; |
Thierry Reding | ebae8d0 | 2017-12-20 09:39:14 +0100 | [diff] [blame] | 301 | } |
| 302 | |
| 303 | return -EINVAL; |
| 304 | } |
| 305 | |
Dmitry Osipenko | 3dae08b | 2018-05-04 17:39:59 +0300 | [diff] [blame^] | 306 | /* |
| 307 | * This is applicable to Tegra20 and Tegra30 only where the opaque formats can |
| 308 | * be emulated using the alpha formats and alpha blending disabled. |
| 309 | */ |
| 310 | static int tegra_plane_setup_opacity(struct tegra_plane *tegra, |
| 311 | struct tegra_plane_state *state) |
| 312 | { |
| 313 | unsigned int format; |
| 314 | int err; |
| 315 | |
| 316 | switch (state->format) { |
| 317 | case WIN_COLOR_DEPTH_B5G5R5A1: |
| 318 | case WIN_COLOR_DEPTH_A1B5G5R5: |
| 319 | case WIN_COLOR_DEPTH_R8G8B8A8: |
| 320 | case WIN_COLOR_DEPTH_B8G8R8A8: |
| 321 | state->opaque = false; |
| 322 | break; |
| 323 | |
| 324 | default: |
| 325 | err = tegra_plane_format_get_alpha(state->format, &format); |
| 326 | if (err < 0) |
| 327 | return err; |
| 328 | |
| 329 | state->format = format; |
| 330 | state->opaque = true; |
| 331 | break; |
| 332 | } |
| 333 | |
| 334 | return 0; |
| 335 | } |
| 336 | |
| 337 | static int tegra_plane_check_transparency(struct tegra_plane *tegra, |
| 338 | struct tegra_plane_state *state) |
| 339 | { |
| 340 | struct drm_plane_state *old, *plane_state; |
| 341 | struct drm_plane *plane; |
| 342 | |
| 343 | old = drm_atomic_get_old_plane_state(state->base.state, &tegra->base); |
| 344 | |
| 345 | /* check if zpos / transparency changed */ |
| 346 | if (old->normalized_zpos == state->base.normalized_zpos && |
| 347 | to_tegra_plane_state(old)->opaque == state->opaque) |
| 348 | return 0; |
| 349 | |
| 350 | /* include all sibling planes into this commit */ |
| 351 | drm_for_each_plane(plane, tegra->base.dev) { |
| 352 | struct tegra_plane *p = to_tegra_plane(plane); |
| 353 | |
| 354 | /* skip this plane and planes on different CRTCs */ |
| 355 | if (p == tegra || p->dc != tegra->dc) |
| 356 | continue; |
| 357 | |
| 358 | plane_state = drm_atomic_get_plane_state(state->base.state, |
| 359 | plane); |
| 360 | if (IS_ERR(plane_state)) |
| 361 | return PTR_ERR(plane_state); |
| 362 | } |
| 363 | |
| 364 | return 1; |
| 365 | } |
| 366 | |
Dmitry Osipenko | 5e2e86f | 2018-03-15 11:37:05 +0100 | [diff] [blame] | 367 | static unsigned int tegra_plane_get_overlap_index(struct tegra_plane *plane, |
| 368 | struct tegra_plane *other) |
Thierry Reding | ebae8d0 | 2017-12-20 09:39:14 +0100 | [diff] [blame] | 369 | { |
| 370 | unsigned int index = 0, i; |
| 371 | |
| 372 | WARN_ON(plane == other); |
| 373 | |
| 374 | for (i = 0; i < 3; i++) { |
| 375 | if (i == plane->index) |
| 376 | continue; |
| 377 | |
| 378 | if (i == other->index) |
| 379 | break; |
| 380 | |
| 381 | index++; |
| 382 | } |
| 383 | |
| 384 | return index; |
| 385 | } |
| 386 | |
Dmitry Osipenko | 3dae08b | 2018-05-04 17:39:59 +0300 | [diff] [blame^] | 387 | static void tegra_plane_update_transparency(struct tegra_plane *tegra, |
| 388 | struct tegra_plane_state *state) |
Thierry Reding | ebae8d0 | 2017-12-20 09:39:14 +0100 | [diff] [blame] | 389 | { |
Dmitry Osipenko | 3dae08b | 2018-05-04 17:39:59 +0300 | [diff] [blame^] | 390 | struct drm_plane_state *new; |
Thierry Reding | ebae8d0 | 2017-12-20 09:39:14 +0100 | [diff] [blame] | 391 | struct drm_plane *plane; |
Thierry Reding | ebae8d0 | 2017-12-20 09:39:14 +0100 | [diff] [blame] | 392 | unsigned int i; |
| 393 | |
Dmitry Osipenko | 3dae08b | 2018-05-04 17:39:59 +0300 | [diff] [blame^] | 394 | for_each_new_plane_in_state(state->base.state, plane, new, i) { |
Thierry Reding | ebae8d0 | 2017-12-20 09:39:14 +0100 | [diff] [blame] | 395 | struct tegra_plane *p = to_tegra_plane(plane); |
| 396 | unsigned index; |
| 397 | |
| 398 | /* skip this plane and planes on different CRTCs */ |
Dmitry Osipenko | 3dae08b | 2018-05-04 17:39:59 +0300 | [diff] [blame^] | 399 | if (p == tegra || p->dc != tegra->dc) |
Thierry Reding | ebae8d0 | 2017-12-20 09:39:14 +0100 | [diff] [blame] | 400 | continue; |
| 401 | |
| 402 | index = tegra_plane_get_overlap_index(tegra, p); |
| 403 | |
Dmitry Osipenko | 3dae08b | 2018-05-04 17:39:59 +0300 | [diff] [blame^] | 404 | if (new->fb && __drm_format_has_alpha(new->fb->format->format)) |
| 405 | state->blending[index].alpha = true; |
| 406 | else |
| 407 | state->blending[index].alpha = false; |
| 408 | |
| 409 | if (new->normalized_zpos > state->base.normalized_zpos) |
| 410 | state->blending[index].top = true; |
| 411 | else |
| 412 | state->blending[index].top = false; |
Dmitry Osipenko | 4851923 | 2018-03-15 04:00:24 +0300 | [diff] [blame] | 413 | |
Thierry Reding | ebae8d0 | 2017-12-20 09:39:14 +0100 | [diff] [blame] | 414 | /* |
Dmitry Osipenko | 3dae08b | 2018-05-04 17:39:59 +0300 | [diff] [blame^] | 415 | * Missing framebuffer means that plane is disabled, in this |
| 416 | * case mark B / C window as top to be able to differentiate |
| 417 | * windows indices order in regards to zPos for the middle |
| 418 | * window X / Y registers programming. |
Thierry Reding | ebae8d0 | 2017-12-20 09:39:14 +0100 | [diff] [blame] | 419 | */ |
Dmitry Osipenko | 3dae08b | 2018-05-04 17:39:59 +0300 | [diff] [blame^] | 420 | if (!new->fb) |
| 421 | state->blending[index].top = (index == 1); |
Thierry Reding | ebae8d0 | 2017-12-20 09:39:14 +0100 | [diff] [blame] | 422 | } |
Dmitry Osipenko | 3dae08b | 2018-05-04 17:39:59 +0300 | [diff] [blame^] | 423 | } |
| 424 | |
| 425 | static int tegra_plane_setup_transparency(struct tegra_plane *tegra, |
| 426 | struct tegra_plane_state *state) |
| 427 | { |
| 428 | struct tegra_plane_state *tegra_state; |
| 429 | struct drm_plane_state *new; |
| 430 | struct drm_plane *plane; |
| 431 | int err; |
Thierry Reding | ebae8d0 | 2017-12-20 09:39:14 +0100 | [diff] [blame] | 432 | |
| 433 | /* |
Dmitry Osipenko | 3dae08b | 2018-05-04 17:39:59 +0300 | [diff] [blame^] | 434 | * If planes zpos / transparency changed, sibling planes blending |
| 435 | * state may require adjustment and in this case they will be included |
| 436 | * into this atom commit, otherwise blending state is unchanged. |
Thierry Reding | ebae8d0 | 2017-12-20 09:39:14 +0100 | [diff] [blame] | 437 | */ |
Dmitry Osipenko | 3dae08b | 2018-05-04 17:39:59 +0300 | [diff] [blame^] | 438 | err = tegra_plane_check_transparency(tegra, state); |
| 439 | if (err <= 0) |
| 440 | return err; |
Thierry Reding | ebae8d0 | 2017-12-20 09:39:14 +0100 | [diff] [blame] | 441 | |
| 442 | /* |
Dmitry Osipenko | 3dae08b | 2018-05-04 17:39:59 +0300 | [diff] [blame^] | 443 | * All planes are now in the atomic state, walk them up and update |
| 444 | * transparency state for each plane. |
Thierry Reding | ebae8d0 | 2017-12-20 09:39:14 +0100 | [diff] [blame] | 445 | */ |
Dmitry Osipenko | 3dae08b | 2018-05-04 17:39:59 +0300 | [diff] [blame^] | 446 | drm_for_each_plane(plane, tegra->base.dev) { |
| 447 | struct tegra_plane *p = to_tegra_plane(plane); |
| 448 | |
| 449 | /* skip planes on different CRTCs */ |
| 450 | if (p->dc != tegra->dc) |
| 451 | continue; |
| 452 | |
| 453 | new = drm_atomic_get_new_plane_state(state->base.state, plane); |
| 454 | tegra_state = to_tegra_plane_state(new); |
| 455 | |
| 456 | /* |
| 457 | * There is no need to update blending state for the disabled |
| 458 | * plane. |
| 459 | */ |
| 460 | if (new->fb) |
| 461 | tegra_plane_update_transparency(p, tegra_state); |
Thierry Reding | ebae8d0 | 2017-12-20 09:39:14 +0100 | [diff] [blame] | 462 | } |
Dmitry Osipenko | 3dae08b | 2018-05-04 17:39:59 +0300 | [diff] [blame^] | 463 | |
| 464 | return 0; |
| 465 | } |
| 466 | |
| 467 | int tegra_plane_setup_legacy_state(struct tegra_plane *tegra, |
| 468 | struct tegra_plane_state *state) |
| 469 | { |
| 470 | int err; |
| 471 | |
| 472 | err = tegra_plane_setup_opacity(tegra, state); |
| 473 | if (err < 0) |
| 474 | return err; |
| 475 | |
| 476 | err = tegra_plane_setup_transparency(tegra, state); |
| 477 | if (err < 0) |
| 478 | return err; |
| 479 | |
| 480 | return 0; |
Thierry Reding | ebae8d0 | 2017-12-20 09:39:14 +0100 | [diff] [blame] | 481 | } |