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gerrit.openfyde.cn / github.com / raspberrypi / raspberrypi-kernel / 03f56e42d03eb7d0a47e40e9ae72a3ac0afeff08 / . / include / linux / msi.h
blob: f6630a53be7009b68369365cbbefac62062a4e23 [file] [log] [blame]
Eric W. Biederman3b7d1922006-10-04 02:16:59 -0700[diff] [blame]1#ifndef LINUX_MSI_H
2#define LINUX_MSI_H
3
Neil Hormanb50cac52011-10-06 14:08:18 -0400[diff] [blame]4#include <linux/kobject.h>
Michael Ellerman4aa9bc92007-04-05 17:19:10 +1000[diff] [blame]5#include <linux/list.h>
6
Eric W. Biederman3b7d1922006-10-04 02:16:59 -0700[diff] [blame]7struct msi_msg {
8 u32 address_lo; /* low 32 bits of msi message address */
9 u32 address_hi; /* high 32 bits of msi message address */
10 u32 data; /* 16 bits of msi message data */
11};
12
Yijing Wang38737d82014-10-27 10:44:36 +0800[diff] [blame]13extern int pci_msi_ignore_mask;
Satoru Takeuchic54c1872007-01-18 13:50:05 +0900[diff] [blame]14/* Helper functions */
Thomas Gleixner1c9db522010-09-28 16:46:51 +0200[diff] [blame]15struct irq_data;
Thomas Gleixner39431ac2010-09-28 19:09:51 +0200[diff] [blame]16struct msi_desc;
Bjorn Helgaas2366d062013-04-18 10:55:46 -0600[diff] [blame]17void mask_msi_irq(struct irq_data *data);
18void unmask_msi_irq(struct irq_data *data);
19void __read_msi_msg(struct msi_desc *entry, struct msi_msg *msg);
20void __get_cached_msi_msg(struct msi_desc *entry, struct msi_msg *msg);
21void __write_msi_msg(struct msi_desc *entry, struct msi_msg *msg);
22void read_msi_msg(unsigned int irq, struct msi_msg *msg);
23void get_cached_msi_msg(unsigned int irq, struct msi_msg *msg);
24void write_msi_msg(unsigned int irq, struct msi_msg *msg);
Yijing Wang03f56e42014-10-27 10:44:37 +0800[diff] [blame^]25u32 __msix_mask_irq(struct msi_desc *desc, u32 flag);
26u32 __msi_mask_irq(struct msi_desc *desc, u32 mask, u32 flag);
Eric W. Biederman3b7d1922006-10-04 02:16:59 -0700[diff] [blame]27
28struct msi_desc {
29 struct {
Matthew Wilcox24d275532009-03-17 08:54:06 -0400[diff] [blame]30 __u8 is_msix : 1;
Yijing Wang31ea5d42014-06-19 16:30:30 +0800[diff] [blame]31 __u8 multiple: 3; /* log2 num of messages allocated */
32 __u8 multi_cap : 3; /* log2 num of messages supported */
Bjorn Helgaasf7625982013-11-14 11:28:18 -0700[diff] [blame]33 __u8 maskbit : 1; /* mask-pending bit supported ? */
34 __u8 is_64 : 1; /* Address size: 0=32bit 1=64bit */
Bjorn Helgaasf7625982013-11-14 11:28:18 -0700[diff] [blame]35 __u16 entry_nr; /* specific enabled entry */
36 unsigned default_irq; /* default pre-assigned irq */
Matthew Wilcoxf2440d92009-03-17 08:54:09 -0400[diff] [blame]37 } msi_attrib;
Eric W. Biederman3b7d1922006-10-04 02:16:59 -0700[diff] [blame]38
Matthew Wilcoxf2440d92009-03-17 08:54:09 -0400[diff] [blame]39 u32 masked; /* mask bits */
Michael Ellerman4aa9bc92007-04-05 17:19:10 +1000[diff] [blame]40 unsigned int irq;
Alexander Gordeev65f6ae62013-05-13 11:05:48 +0200[diff] [blame]41 unsigned int nvec_used; /* number of messages */
Michael Ellerman4aa9bc92007-04-05 17:19:10 +1000[diff] [blame]42 struct list_head list;
Eric W. Biederman3b7d1922006-10-04 02:16:59 -0700[diff] [blame]43
Matthew Wilcox264d9ca2009-03-17 08:54:08 -0400[diff] [blame]44 union {
45 void __iomem *mask_base;
46 u8 mask_pos;
47 };
Eric W. Biederman3b7d1922006-10-04 02:16:59 -0700[diff] [blame]48 struct pci_dev *dev;
49
Eric W. Biederman392ee1e2007-03-08 13:04:57 -0700[diff] [blame]50 /* Last set MSI message */
51 struct msi_msg msg;
Eric W. Biederman3b7d1922006-10-04 02:16:59 -0700[diff] [blame]52};
53
54/*
Thomas Petazzoni4287d822013-08-09 22:27:06 +0200[diff] [blame]55 * The arch hooks to setup up msi irqs. Those functions are
56 * implemented as weak symbols so that they /can/ be overriden by
57 * architecture specific code if needed.
Eric W. Biederman3b7d1922006-10-04 02:16:59 -0700[diff] [blame]58 */
Eric W. Biedermanf7feaca2007-01-28 12:56:37 -0700[diff] [blame]59int arch_setup_msi_irq(struct pci_dev *dev, struct msi_desc *desc);
Eric W. Biederman3b7d1922006-10-04 02:16:59 -0700[diff] [blame]60void arch_teardown_msi_irq(unsigned int irq);
Bjorn Helgaas2366d062013-04-18 10:55:46 -0600[diff] [blame]61int arch_setup_msi_irqs(struct pci_dev *dev, int nvec, int type);
62void arch_teardown_msi_irqs(struct pci_dev *dev);
DuanZhenzhongac8344c2013-12-04 13:09:16 +0800[diff] [blame]63void arch_restore_msi_irqs(struct pci_dev *dev);
Thomas Petazzoni4287d822013-08-09 22:27:06 +0200[diff] [blame]64
65void default_teardown_msi_irqs(struct pci_dev *dev);
DuanZhenzhongac8344c2013-12-04 13:09:16 +0800[diff] [blame]66void default_restore_msi_irqs(struct pci_dev *dev);
Yijing Wang03f56e42014-10-27 10:44:37 +0800[diff] [blame^]67#define default_msi_mask_irq __msi_mask_irq
68#define default_msix_mask_irq __msix_mask_irq
Eric W. Biederman3b7d1922006-10-04 02:16:59 -0700[diff] [blame]69
Thierry Reding0cbdcfc2013-08-09 22:27:08 +0200[diff] [blame]70struct msi_chip {
71 struct module *owner;
72 struct device *dev;
Thomas Petazzoni0d5a6db2013-08-09 22:27:09 +0200[diff] [blame]73 struct device_node *of_node;
74 struct list_head list;
Thierry Reding0cbdcfc2013-08-09 22:27:08 +0200[diff] [blame]75
76 int (*setup_irq)(struct msi_chip *chip, struct pci_dev *dev,
77 struct msi_desc *desc);
78 void (*teardown_irq)(struct msi_chip *chip, unsigned int irq);
Thierry Reding0cbdcfc2013-08-09 22:27:08 +0200[diff] [blame]79};
80
Eric W. Biederman3b7d1922006-10-04 02:16:59 -0700[diff] [blame]81#endif /* LINUX_MSI_H */