blob: 3e68e520ac3ad217ad943ebe6f1461348ef6e384 [file] [log] [blame]
bellardb4608c02003-06-27 17:34:32 +00001/*
2 * gdb server stub
ths5fafdf22007-09-16 21:08:06 +00003 *
bellard34751872005-07-02 14:31:34 +00004 * Copyright (c) 2003-2005 Fabrice Bellard
bellardb4608c02003-06-27 17:34:32 +00005 *
6 * This library is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU Lesser General Public
8 * License as published by the Free Software Foundation; either
9 * version 2 of the License, or (at your option) any later version.
10 *
11 * This library is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
14 * Lesser General Public License for more details.
15 *
16 * You should have received a copy of the GNU Lesser General Public
17 * License along with this library; if not, write to the Free Software
18 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
19 */
pbrook978efd62006-06-17 18:30:42 +000020#include "config.h"
bellard1fddef42005-04-17 19:16:13 +000021#ifdef CONFIG_USER_ONLY
22#include <stdlib.h>
23#include <stdio.h>
24#include <stdarg.h>
25#include <string.h>
26#include <errno.h>
27#include <unistd.h>
pbrook978efd62006-06-17 18:30:42 +000028#include <fcntl.h>
bellard1fddef42005-04-17 19:16:13 +000029
30#include "qemu.h"
31#else
pbrook87ecb682007-11-17 17:14:51 +000032#include "qemu-common.h"
33#include "qemu-char.h"
34#include "sysemu.h"
35#include "gdbstub.h"
bellard1fddef42005-04-17 19:16:13 +000036#endif
bellard67b915a2004-03-31 23:37:16 +000037
bellard8f447cc2006-06-14 15:21:14 +000038#include "qemu_socket.h"
39#ifdef _WIN32
40/* XXX: these constants may be independent of the host ones even for Unix */
41#ifndef SIGTRAP
42#define SIGTRAP 5
43#endif
44#ifndef SIGINT
45#define SIGINT 2
46#endif
47#else
bellardb4608c02003-06-27 17:34:32 +000048#include <signal.h>
bellard8f447cc2006-06-14 15:21:14 +000049#endif
bellardb4608c02003-06-27 17:34:32 +000050
bellard4abe6152003-07-26 18:01:58 +000051//#define DEBUG_GDB
bellardb4608c02003-06-27 17:34:32 +000052
bellard858693c2004-03-31 18:52:07 +000053enum RSState {
54 RS_IDLE,
55 RS_GETLINE,
56 RS_CHKSUM1,
57 RS_CHKSUM2,
pbrooka2d1eba2007-01-28 03:10:55 +000058 RS_SYSCALL,
bellard858693c2004-03-31 18:52:07 +000059};
bellard858693c2004-03-31 18:52:07 +000060typedef struct GDBState {
bellard6a00d602005-11-21 23:25:50 +000061 CPUState *env; /* current CPU */
bellard41625032005-04-24 10:07:11 +000062 enum RSState state; /* parsing state */
bellard858693c2004-03-31 18:52:07 +000063 char line_buf[4096];
64 int line_buf_index;
65 int line_csum;
ths60fe76f2007-12-16 03:02:09 +000066 uint8_t last_packet[4100];
pbrook4046d912007-01-28 01:53:16 +000067 int last_packet_len;
bellard41625032005-04-24 10:07:11 +000068#ifdef CONFIG_USER_ONLY
pbrook4046d912007-01-28 01:53:16 +000069 int fd;
bellard41625032005-04-24 10:07:11 +000070 int running_state;
pbrook4046d912007-01-28 01:53:16 +000071#else
72 CharDriverState *chr;
bellard41625032005-04-24 10:07:11 +000073#endif
bellard858693c2004-03-31 18:52:07 +000074} GDBState;
bellardb4608c02003-06-27 17:34:32 +000075
bellard1fddef42005-04-17 19:16:13 +000076#ifdef CONFIG_USER_ONLY
pbrook4046d912007-01-28 01:53:16 +000077/* XXX: This is not thread safe. Do we care? */
78static int gdbserver_fd = -1;
79
bellard1fddef42005-04-17 19:16:13 +000080/* XXX: remove this hack. */
81static GDBState gdbserver_state;
bellard1fddef42005-04-17 19:16:13 +000082
bellard858693c2004-03-31 18:52:07 +000083static int get_char(GDBState *s)
bellardb4608c02003-06-27 17:34:32 +000084{
85 uint8_t ch;
86 int ret;
87
88 for(;;) {
bellard8f447cc2006-06-14 15:21:14 +000089 ret = recv(s->fd, &ch, 1, 0);
bellardb4608c02003-06-27 17:34:32 +000090 if (ret < 0) {
91 if (errno != EINTR && errno != EAGAIN)
92 return -1;
93 } else if (ret == 0) {
94 return -1;
95 } else {
96 break;
97 }
98 }
99 return ch;
100}
pbrook4046d912007-01-28 01:53:16 +0000101#endif
bellardb4608c02003-06-27 17:34:32 +0000102
pbrooka2d1eba2007-01-28 03:10:55 +0000103/* GDB stub state for use by semihosting syscalls. */
104static GDBState *gdb_syscall_state;
105static gdb_syscall_complete_cb gdb_current_syscall_cb;
106
107enum {
108 GDB_SYS_UNKNOWN,
109 GDB_SYS_ENABLED,
110 GDB_SYS_DISABLED,
111} gdb_syscall_mode;
112
113/* If gdb is connected when the first semihosting syscall occurs then use
114 remote gdb syscalls. Otherwise use native file IO. */
115int use_gdb_syscalls(void)
116{
117 if (gdb_syscall_mode == GDB_SYS_UNKNOWN) {
118 gdb_syscall_mode = (gdb_syscall_state ? GDB_SYS_ENABLED
119 : GDB_SYS_DISABLED);
120 }
121 return gdb_syscall_mode == GDB_SYS_ENABLED;
122}
123
bellard858693c2004-03-31 18:52:07 +0000124static void put_buffer(GDBState *s, const uint8_t *buf, int len)
bellardb4608c02003-06-27 17:34:32 +0000125{
pbrook4046d912007-01-28 01:53:16 +0000126#ifdef CONFIG_USER_ONLY
bellardb4608c02003-06-27 17:34:32 +0000127 int ret;
128
129 while (len > 0) {
bellard8f447cc2006-06-14 15:21:14 +0000130 ret = send(s->fd, buf, len, 0);
bellardb4608c02003-06-27 17:34:32 +0000131 if (ret < 0) {
132 if (errno != EINTR && errno != EAGAIN)
133 return;
134 } else {
135 buf += ret;
136 len -= ret;
137 }
138 }
pbrook4046d912007-01-28 01:53:16 +0000139#else
140 qemu_chr_write(s->chr, buf, len);
141#endif
bellardb4608c02003-06-27 17:34:32 +0000142}
143
144static inline int fromhex(int v)
145{
146 if (v >= '0' && v <= '9')
147 return v - '0';
148 else if (v >= 'A' && v <= 'F')
149 return v - 'A' + 10;
150 else if (v >= 'a' && v <= 'f')
151 return v - 'a' + 10;
152 else
153 return 0;
154}
155
156static inline int tohex(int v)
157{
158 if (v < 10)
159 return v + '0';
160 else
161 return v - 10 + 'a';
162}
163
164static void memtohex(char *buf, const uint8_t *mem, int len)
165{
166 int i, c;
167 char *q;
168 q = buf;
169 for(i = 0; i < len; i++) {
170 c = mem[i];
171 *q++ = tohex(c >> 4);
172 *q++ = tohex(c & 0xf);
173 }
174 *q = '\0';
175}
176
177static void hextomem(uint8_t *mem, const char *buf, int len)
178{
179 int i;
180
181 for(i = 0; i < len; i++) {
182 mem[i] = (fromhex(buf[0]) << 4) | fromhex(buf[1]);
183 buf += 2;
184 }
185}
186
bellardb4608c02003-06-27 17:34:32 +0000187/* return -1 if error, 0 if OK */
bellard858693c2004-03-31 18:52:07 +0000188static int put_packet(GDBState *s, char *buf)
bellardb4608c02003-06-27 17:34:32 +0000189{
pbrook4046d912007-01-28 01:53:16 +0000190 int len, csum, i;
ths60fe76f2007-12-16 03:02:09 +0000191 uint8_t *p;
bellardb4608c02003-06-27 17:34:32 +0000192
193#ifdef DEBUG_GDB
194 printf("reply='%s'\n", buf);
195#endif
196
197 for(;;) {
pbrook4046d912007-01-28 01:53:16 +0000198 p = s->last_packet;
199 *(p++) = '$';
bellardb4608c02003-06-27 17:34:32 +0000200 len = strlen(buf);
pbrook4046d912007-01-28 01:53:16 +0000201 memcpy(p, buf, len);
202 p += len;
bellardb4608c02003-06-27 17:34:32 +0000203 csum = 0;
204 for(i = 0; i < len; i++) {
205 csum += buf[i];
206 }
pbrook4046d912007-01-28 01:53:16 +0000207 *(p++) = '#';
208 *(p++) = tohex((csum >> 4) & 0xf);
209 *(p++) = tohex((csum) & 0xf);
bellardb4608c02003-06-27 17:34:32 +0000210
pbrook4046d912007-01-28 01:53:16 +0000211 s->last_packet_len = p - s->last_packet;
thsffe8ab82007-12-16 03:16:05 +0000212 put_buffer(s, (uint8_t *)s->last_packet, s->last_packet_len);
bellardb4608c02003-06-27 17:34:32 +0000213
pbrook4046d912007-01-28 01:53:16 +0000214#ifdef CONFIG_USER_ONLY
215 i = get_char(s);
216 if (i < 0)
bellardb4608c02003-06-27 17:34:32 +0000217 return -1;
pbrook4046d912007-01-28 01:53:16 +0000218 if (i == '+')
bellardb4608c02003-06-27 17:34:32 +0000219 break;
pbrook4046d912007-01-28 01:53:16 +0000220#else
221 break;
222#endif
bellardb4608c02003-06-27 17:34:32 +0000223 }
224 return 0;
225}
226
bellard6da41ea2004-01-04 15:48:38 +0000227#if defined(TARGET_I386)
228
bellard6da41ea2004-01-04 15:48:38 +0000229static int cpu_gdb_read_registers(CPUState *env, uint8_t *mem_buf)
230{
231 int i, fpus;
balrog5ad265e2007-10-31 00:21:35 +0000232 uint32_t *registers = (uint32_t *)mem_buf;
233
234#ifdef TARGET_X86_64
235 /* This corresponds with amd64_register_info[] in gdb/amd64-tdep.c */
236 uint64_t *registers64 = (uint64_t *)mem_buf;
237
238 if (env->hflags & HF_CS64_MASK) {
239 registers64[0] = tswap64(env->regs[R_EAX]);
240 registers64[1] = tswap64(env->regs[R_EBX]);
241 registers64[2] = tswap64(env->regs[R_ECX]);
242 registers64[3] = tswap64(env->regs[R_EDX]);
243 registers64[4] = tswap64(env->regs[R_ESI]);
244 registers64[5] = tswap64(env->regs[R_EDI]);
245 registers64[6] = tswap64(env->regs[R_EBP]);
246 registers64[7] = tswap64(env->regs[R_ESP]);
247 for(i = 8; i < 16; i++) {
248 registers64[i] = tswap64(env->regs[i]);
249 }
250 registers64[16] = tswap64(env->eip);
251
252 registers = (uint32_t *)&registers64[17];
253 registers[0] = tswap32(env->eflags);
254 registers[1] = tswap32(env->segs[R_CS].selector);
255 registers[2] = tswap32(env->segs[R_SS].selector);
256 registers[3] = tswap32(env->segs[R_DS].selector);
257 registers[4] = tswap32(env->segs[R_ES].selector);
258 registers[5] = tswap32(env->segs[R_FS].selector);
259 registers[6] = tswap32(env->segs[R_GS].selector);
260 /* XXX: convert floats */
261 for(i = 0; i < 8; i++) {
262 memcpy(mem_buf + 16 * 8 + 7 * 4 + i * 10, &env->fpregs[i], 10);
263 }
264 registers[27] = tswap32(env->fpuc); /* fctrl */
265 fpus = (env->fpus & ~0x3800) | (env->fpstt & 0x7) << 11;
266 registers[28] = tswap32(fpus); /* fstat */
267 registers[29] = 0; /* ftag */
268 registers[30] = 0; /* fiseg */
269 registers[31] = 0; /* fioff */
270 registers[32] = 0; /* foseg */
271 registers[33] = 0; /* fooff */
272 registers[34] = 0; /* fop */
273 for(i = 0; i < 16; i++) {
274 memcpy(mem_buf + 16 * 8 + 35 * 4 + i * 16, &env->xmm_regs[i], 16);
275 }
276 registers[99] = tswap32(env->mxcsr);
277
278 return 8 * 17 + 4 * 7 + 10 * 8 + 4 * 8 + 16 * 16 + 4;
279 }
280#endif
bellard6da41ea2004-01-04 15:48:38 +0000281
282 for(i = 0; i < 8; i++) {
bellarde95c8d52004-09-30 22:22:08 +0000283 registers[i] = env->regs[i];
bellard6da41ea2004-01-04 15:48:38 +0000284 }
bellarde95c8d52004-09-30 22:22:08 +0000285 registers[8] = env->eip;
286 registers[9] = env->eflags;
287 registers[10] = env->segs[R_CS].selector;
288 registers[11] = env->segs[R_SS].selector;
289 registers[12] = env->segs[R_DS].selector;
290 registers[13] = env->segs[R_ES].selector;
291 registers[14] = env->segs[R_FS].selector;
292 registers[15] = env->segs[R_GS].selector;
bellard6da41ea2004-01-04 15:48:38 +0000293 /* XXX: convert floats */
294 for(i = 0; i < 8; i++) {
295 memcpy(mem_buf + 16 * 4 + i * 10, &env->fpregs[i], 10);
296 }
bellarde95c8d52004-09-30 22:22:08 +0000297 registers[36] = env->fpuc;
bellard6da41ea2004-01-04 15:48:38 +0000298 fpus = (env->fpus & ~0x3800) | (env->fpstt & 0x7) << 11;
bellarde95c8d52004-09-30 22:22:08 +0000299 registers[37] = fpus;
300 registers[38] = 0; /* XXX: convert tags */
301 registers[39] = 0; /* fiseg */
302 registers[40] = 0; /* fioff */
303 registers[41] = 0; /* foseg */
304 registers[42] = 0; /* fooff */
305 registers[43] = 0; /* fop */
ths3b46e622007-09-17 08:09:54 +0000306
bellarde95c8d52004-09-30 22:22:08 +0000307 for(i = 0; i < 16; i++)
308 tswapls(&registers[i]);
309 for(i = 36; i < 44; i++)
310 tswapls(&registers[i]);
bellard6da41ea2004-01-04 15:48:38 +0000311 return 44 * 4;
312}
313
314static void cpu_gdb_write_registers(CPUState *env, uint8_t *mem_buf, int size)
315{
316 uint32_t *registers = (uint32_t *)mem_buf;
317 int i;
318
319 for(i = 0; i < 8; i++) {
320 env->regs[i] = tswapl(registers[i]);
321 }
bellarde95c8d52004-09-30 22:22:08 +0000322 env->eip = tswapl(registers[8]);
323 env->eflags = tswapl(registers[9]);
bellard6da41ea2004-01-04 15:48:38 +0000324#if defined(CONFIG_USER_ONLY)
325#define LOAD_SEG(index, sreg)\
326 if (tswapl(registers[index]) != env->segs[sreg].selector)\
327 cpu_x86_load_seg(env, sreg, tswapl(registers[index]));
328 LOAD_SEG(10, R_CS);
329 LOAD_SEG(11, R_SS);
330 LOAD_SEG(12, R_DS);
331 LOAD_SEG(13, R_ES);
332 LOAD_SEG(14, R_FS);
333 LOAD_SEG(15, R_GS);
334#endif
335}
336
bellard9e62fd72004-01-05 22:49:06 +0000337#elif defined (TARGET_PPC)
bellard9e62fd72004-01-05 22:49:06 +0000338static int cpu_gdb_read_registers(CPUState *env, uint8_t *mem_buf)
339{
bellarda541f292004-04-12 20:39:29 +0000340 uint32_t *registers = (uint32_t *)mem_buf, tmp;
bellard9e62fd72004-01-05 22:49:06 +0000341 int i;
342
343 /* fill in gprs */
bellarda541f292004-04-12 20:39:29 +0000344 for(i = 0; i < 32; i++) {
bellarde95c8d52004-09-30 22:22:08 +0000345 registers[i] = tswapl(env->gpr[i]);
bellard9e62fd72004-01-05 22:49:06 +0000346 }
347 /* fill in fprs */
348 for (i = 0; i < 32; i++) {
bellarde95c8d52004-09-30 22:22:08 +0000349 registers[(i * 2) + 32] = tswapl(*((uint32_t *)&env->fpr[i]));
350 registers[(i * 2) + 33] = tswapl(*((uint32_t *)&env->fpr[i] + 1));
bellard9e62fd72004-01-05 22:49:06 +0000351 }
352 /* nip, msr, ccr, lnk, ctr, xer, mq */
bellarde95c8d52004-09-30 22:22:08 +0000353 registers[96] = tswapl(env->nip);
j_mayer0411a972007-10-25 21:35:50 +0000354 registers[97] = tswapl(env->msr);
bellard9e62fd72004-01-05 22:49:06 +0000355 tmp = 0;
356 for (i = 0; i < 8; i++)
bellarda541f292004-04-12 20:39:29 +0000357 tmp |= env->crf[i] << (32 - ((i + 1) * 4));
bellarde95c8d52004-09-30 22:22:08 +0000358 registers[98] = tswapl(tmp);
359 registers[99] = tswapl(env->lr);
360 registers[100] = tswapl(env->ctr);
j_mayer76a66252007-03-07 08:32:30 +0000361 registers[101] = tswapl(ppc_load_xer(env));
bellarde95c8d52004-09-30 22:22:08 +0000362 registers[102] = 0;
bellard9e62fd72004-01-05 22:49:06 +0000363
bellarda541f292004-04-12 20:39:29 +0000364 return 103 * 4;
bellard9e62fd72004-01-05 22:49:06 +0000365}
366
367static void cpu_gdb_write_registers(CPUState *env, uint8_t *mem_buf, int size)
368{
369 uint32_t *registers = (uint32_t *)mem_buf;
370 int i;
371
372 /* fill in gprs */
373 for (i = 0; i < 32; i++) {
bellarde95c8d52004-09-30 22:22:08 +0000374 env->gpr[i] = tswapl(registers[i]);
bellard9e62fd72004-01-05 22:49:06 +0000375 }
376 /* fill in fprs */
377 for (i = 0; i < 32; i++) {
bellarde95c8d52004-09-30 22:22:08 +0000378 *((uint32_t *)&env->fpr[i]) = tswapl(registers[(i * 2) + 32]);
379 *((uint32_t *)&env->fpr[i] + 1) = tswapl(registers[(i * 2) + 33]);
bellard9e62fd72004-01-05 22:49:06 +0000380 }
381 /* nip, msr, ccr, lnk, ctr, xer, mq */
bellarde95c8d52004-09-30 22:22:08 +0000382 env->nip = tswapl(registers[96]);
j_mayer0411a972007-10-25 21:35:50 +0000383 ppc_store_msr(env, tswapl(registers[97]));
bellarde95c8d52004-09-30 22:22:08 +0000384 registers[98] = tswapl(registers[98]);
bellard9e62fd72004-01-05 22:49:06 +0000385 for (i = 0; i < 8; i++)
bellarda541f292004-04-12 20:39:29 +0000386 env->crf[i] = (registers[98] >> (32 - ((i + 1) * 4))) & 0xF;
bellarde95c8d52004-09-30 22:22:08 +0000387 env->lr = tswapl(registers[99]);
388 env->ctr = tswapl(registers[100]);
j_mayer76a66252007-03-07 08:32:30 +0000389 ppc_store_xer(env, tswapl(registers[101]));
bellarde95c8d52004-09-30 22:22:08 +0000390}
391#elif defined (TARGET_SPARC)
392static int cpu_gdb_read_registers(CPUState *env, uint8_t *mem_buf)
393{
bellard34751872005-07-02 14:31:34 +0000394 target_ulong *registers = (target_ulong *)mem_buf;
bellarde95c8d52004-09-30 22:22:08 +0000395 int i;
396
397 /* fill in g0..g7 */
bellard48b2c192005-10-30 16:08:23 +0000398 for(i = 0; i < 8; i++) {
bellarde95c8d52004-09-30 22:22:08 +0000399 registers[i] = tswapl(env->gregs[i]);
400 }
401 /* fill in register window */
402 for(i = 0; i < 24; i++) {
403 registers[i + 8] = tswapl(env->regwptr[i]);
404 }
bellard9d9754a2006-06-25 15:32:37 +0000405#ifndef TARGET_SPARC64
bellarde95c8d52004-09-30 22:22:08 +0000406 /* fill in fprs */
407 for (i = 0; i < 32; i++) {
408 registers[i + 32] = tswapl(*((uint32_t *)&env->fpr[i]));
409 }
410 /* Y, PSR, WIM, TBR, PC, NPC, FPSR, CPSR */
411 registers[64] = tswapl(env->y);
bellard34751872005-07-02 14:31:34 +0000412 {
413 target_ulong tmp;
414
415 tmp = GET_PSR(env);
416 registers[65] = tswapl(tmp);
417 }
bellarde95c8d52004-09-30 22:22:08 +0000418 registers[66] = tswapl(env->wim);
419 registers[67] = tswapl(env->tbr);
420 registers[68] = tswapl(env->pc);
421 registers[69] = tswapl(env->npc);
422 registers[70] = tswapl(env->fsr);
423 registers[71] = 0; /* csr */
424 registers[72] = 0;
bellard34751872005-07-02 14:31:34 +0000425 return 73 * sizeof(target_ulong);
426#else
bellard9d9754a2006-06-25 15:32:37 +0000427 /* fill in fprs */
428 for (i = 0; i < 64; i += 2) {
429 uint64_t tmp;
430
blueswir189795962007-04-14 16:15:48 +0000431 tmp = ((uint64_t)*(uint32_t *)&env->fpr[i]) << 32;
432 tmp |= *(uint32_t *)&env->fpr[i + 1];
433 registers[i / 2 + 32] = tswap64(tmp);
bellard34751872005-07-02 14:31:34 +0000434 }
bellard9d9754a2006-06-25 15:32:37 +0000435 registers[64] = tswapl(env->pc);
436 registers[65] = tswapl(env->npc);
blueswir117d996e2007-07-07 20:53:22 +0000437 registers[66] = tswapl(((uint64_t)GET_CCR(env) << 32) |
438 ((env->asi & 0xff) << 24) |
439 ((env->pstate & 0xfff) << 8) |
440 GET_CWP64(env));
bellard9d9754a2006-06-25 15:32:37 +0000441 registers[67] = tswapl(env->fsr);
442 registers[68] = tswapl(env->fprs);
443 registers[69] = tswapl(env->y);
444 return 70 * sizeof(target_ulong);
bellard34751872005-07-02 14:31:34 +0000445#endif
bellarde95c8d52004-09-30 22:22:08 +0000446}
447
448static void cpu_gdb_write_registers(CPUState *env, uint8_t *mem_buf, int size)
449{
bellard34751872005-07-02 14:31:34 +0000450 target_ulong *registers = (target_ulong *)mem_buf;
bellarde95c8d52004-09-30 22:22:08 +0000451 int i;
452
453 /* fill in g0..g7 */
454 for(i = 0; i < 7; i++) {
455 env->gregs[i] = tswapl(registers[i]);
456 }
457 /* fill in register window */
458 for(i = 0; i < 24; i++) {
bellard34751872005-07-02 14:31:34 +0000459 env->regwptr[i] = tswapl(registers[i + 8]);
bellarde95c8d52004-09-30 22:22:08 +0000460 }
bellard9d9754a2006-06-25 15:32:37 +0000461#ifndef TARGET_SPARC64
bellarde95c8d52004-09-30 22:22:08 +0000462 /* fill in fprs */
463 for (i = 0; i < 32; i++) {
464 *((uint32_t *)&env->fpr[i]) = tswapl(registers[i + 32]);
465 }
466 /* Y, PSR, WIM, TBR, PC, NPC, FPSR, CPSR */
467 env->y = tswapl(registers[64]);
bellarde80cfcf2004-12-19 23:18:01 +0000468 PUT_PSR(env, tswapl(registers[65]));
bellarde95c8d52004-09-30 22:22:08 +0000469 env->wim = tswapl(registers[66]);
470 env->tbr = tswapl(registers[67]);
471 env->pc = tswapl(registers[68]);
472 env->npc = tswapl(registers[69]);
473 env->fsr = tswapl(registers[70]);
bellard34751872005-07-02 14:31:34 +0000474#else
bellard9d9754a2006-06-25 15:32:37 +0000475 for (i = 0; i < 64; i += 2) {
blueswir189795962007-04-14 16:15:48 +0000476 uint64_t tmp;
477
478 tmp = tswap64(registers[i / 2 + 32]);
479 *((uint32_t *)&env->fpr[i]) = tmp >> 32;
480 *((uint32_t *)&env->fpr[i + 1]) = tmp & 0xffffffff;
bellard34751872005-07-02 14:31:34 +0000481 }
bellard9d9754a2006-06-25 15:32:37 +0000482 env->pc = tswapl(registers[64]);
483 env->npc = tswapl(registers[65]);
blueswir117d996e2007-07-07 20:53:22 +0000484 {
485 uint64_t tmp = tswapl(registers[66]);
486
487 PUT_CCR(env, tmp >> 32);
488 env->asi = (tmp >> 24) & 0xff;
489 env->pstate = (tmp >> 8) & 0xfff;
490 PUT_CWP64(env, tmp & 0xff);
491 }
bellard9d9754a2006-06-25 15:32:37 +0000492 env->fsr = tswapl(registers[67]);
493 env->fprs = tswapl(registers[68]);
494 env->y = tswapl(registers[69]);
bellard34751872005-07-02 14:31:34 +0000495#endif
bellard9e62fd72004-01-05 22:49:06 +0000496}
bellard1fddef42005-04-17 19:16:13 +0000497#elif defined (TARGET_ARM)
498static int cpu_gdb_read_registers(CPUState *env, uint8_t *mem_buf)
499{
500 int i;
501 uint8_t *ptr;
bellard6da41ea2004-01-04 15:48:38 +0000502
bellard1fddef42005-04-17 19:16:13 +0000503 ptr = mem_buf;
504 /* 16 core integer registers (4 bytes each). */
505 for (i = 0; i < 16; i++)
506 {
507 *(uint32_t *)ptr = tswapl(env->regs[i]);
508 ptr += 4;
509 }
510 /* 8 FPA registers (12 bytes each), FPS (4 bytes).
511 Not yet implemented. */
512 memset (ptr, 0, 8 * 12 + 4);
513 ptr += 8 * 12 + 4;
514 /* CPSR (4 bytes). */
bellardb5ff1b32005-11-26 10:38:39 +0000515 *(uint32_t *)ptr = tswapl (cpsr_read(env));
bellard1fddef42005-04-17 19:16:13 +0000516 ptr += 4;
517
518 return ptr - mem_buf;
519}
520
521static void cpu_gdb_write_registers(CPUState *env, uint8_t *mem_buf, int size)
522{
523 int i;
524 uint8_t *ptr;
525
526 ptr = mem_buf;
527 /* Core integer registers. */
528 for (i = 0; i < 16; i++)
529 {
530 env->regs[i] = tswapl(*(uint32_t *)ptr);
531 ptr += 4;
532 }
533 /* Ignore FPA regs and scr. */
534 ptr += 8 * 12 + 4;
bellardb5ff1b32005-11-26 10:38:39 +0000535 cpsr_write (env, tswapl(*(uint32_t *)ptr), 0xffffffff);
bellard1fddef42005-04-17 19:16:13 +0000536}
pbrooke6e59062006-10-22 00:18:54 +0000537#elif defined (TARGET_M68K)
538static int cpu_gdb_read_registers(CPUState *env, uint8_t *mem_buf)
539{
540 int i;
541 uint8_t *ptr;
542 CPU_DoubleU u;
543
544 ptr = mem_buf;
545 /* D0-D7 */
546 for (i = 0; i < 8; i++) {
547 *(uint32_t *)ptr = tswapl(env->dregs[i]);
548 ptr += 4;
549 }
550 /* A0-A7 */
551 for (i = 0; i < 8; i++) {
552 *(uint32_t *)ptr = tswapl(env->aregs[i]);
553 ptr += 4;
554 }
555 *(uint32_t *)ptr = tswapl(env->sr);
556 ptr += 4;
557 *(uint32_t *)ptr = tswapl(env->pc);
558 ptr += 4;
559 /* F0-F7. The 68881/68040 have 12-bit extended precision registers.
560 ColdFire has 8-bit double precision registers. */
561 for (i = 0; i < 8; i++) {
562 u.d = env->fregs[i];
563 *(uint32_t *)ptr = tswap32(u.l.upper);
564 *(uint32_t *)ptr = tswap32(u.l.lower);
565 }
566 /* FP control regs (not implemented). */
567 memset (ptr, 0, 3 * 4);
568 ptr += 3 * 4;
569
570 return ptr - mem_buf;
571}
572
573static void cpu_gdb_write_registers(CPUState *env, uint8_t *mem_buf, int size)
574{
575 int i;
576 uint8_t *ptr;
577 CPU_DoubleU u;
578
579 ptr = mem_buf;
580 /* D0-D7 */
581 for (i = 0; i < 8; i++) {
582 env->dregs[i] = tswapl(*(uint32_t *)ptr);
583 ptr += 4;
584 }
585 /* A0-A7 */
586 for (i = 0; i < 8; i++) {
587 env->aregs[i] = tswapl(*(uint32_t *)ptr);
588 ptr += 4;
589 }
590 env->sr = tswapl(*(uint32_t *)ptr);
591 ptr += 4;
592 env->pc = tswapl(*(uint32_t *)ptr);
593 ptr += 4;
594 /* F0-F7. The 68881/68040 have 12-bit extended precision registers.
595 ColdFire has 8-bit double precision registers. */
596 for (i = 0; i < 8; i++) {
ths5fafdf22007-09-16 21:08:06 +0000597 u.l.upper = tswap32(*(uint32_t *)ptr);
pbrooke6e59062006-10-22 00:18:54 +0000598 u.l.lower = tswap32(*(uint32_t *)ptr);
599 env->fregs[i] = u.d;
600 }
601 /* FP control regs (not implemented). */
602 ptr += 3 * 4;
603}
bellard6f970bd2005-12-05 19:55:19 +0000604#elif defined (TARGET_MIPS)
605static int cpu_gdb_read_registers(CPUState *env, uint8_t *mem_buf)
606{
607 int i;
608 uint8_t *ptr;
609
610 ptr = mem_buf;
611 for (i = 0; i < 32; i++)
612 {
thsd0dc7dc2008-02-12 21:01:26 +0000613 *(target_ulong *)ptr = tswapl(env->gpr[env->current_tc][i]);
ths2052caa2007-06-01 13:18:19 +0000614 ptr += sizeof(target_ulong);
bellard6f970bd2005-12-05 19:55:19 +0000615 }
616
ths7ac256b2007-10-25 21:30:37 +0000617 *(target_ulong *)ptr = (int32_t)tswap32(env->CP0_Status);
ths2052caa2007-06-01 13:18:19 +0000618 ptr += sizeof(target_ulong);
bellard6f970bd2005-12-05 19:55:19 +0000619
thsd0dc7dc2008-02-12 21:01:26 +0000620 *(target_ulong *)ptr = tswapl(env->LO[env->current_tc][0]);
ths2052caa2007-06-01 13:18:19 +0000621 ptr += sizeof(target_ulong);
bellard6f970bd2005-12-05 19:55:19 +0000622
thsd0dc7dc2008-02-12 21:01:26 +0000623 *(target_ulong *)ptr = tswapl(env->HI[env->current_tc][0]);
ths2052caa2007-06-01 13:18:19 +0000624 ptr += sizeof(target_ulong);
bellard6f970bd2005-12-05 19:55:19 +0000625
ths2052caa2007-06-01 13:18:19 +0000626 *(target_ulong *)ptr = tswapl(env->CP0_BadVAddr);
627 ptr += sizeof(target_ulong);
bellard6f970bd2005-12-05 19:55:19 +0000628
ths7ac256b2007-10-25 21:30:37 +0000629 *(target_ulong *)ptr = (int32_t)tswap32(env->CP0_Cause);
ths2052caa2007-06-01 13:18:19 +0000630 ptr += sizeof(target_ulong);
bellard6f970bd2005-12-05 19:55:19 +0000631
thsead93602007-09-06 00:18:15 +0000632 *(target_ulong *)ptr = tswapl(env->PC[env->current_tc]);
ths2052caa2007-06-01 13:18:19 +0000633 ptr += sizeof(target_ulong);
bellard6f970bd2005-12-05 19:55:19 +0000634
ths36d23952007-02-28 22:37:42 +0000635 if (env->CP0_Config1 & (1 << CP0C1_FP))
ths8e33c082006-12-11 19:22:27 +0000636 {
ths36d23952007-02-28 22:37:42 +0000637 for (i = 0; i < 32; i++)
638 {
ths7ac256b2007-10-25 21:30:37 +0000639 if (env->CP0_Status & (1 << CP0St_FR))
640 *(target_ulong *)ptr = tswapl(env->fpu->fpr[i].d);
641 else
642 *(target_ulong *)ptr = tswap32(env->fpu->fpr[i].w[FP_ENDIAN_IDX]);
ths2052caa2007-06-01 13:18:19 +0000643 ptr += sizeof(target_ulong);
ths36d23952007-02-28 22:37:42 +0000644 }
645
ths7ac256b2007-10-25 21:30:37 +0000646 *(target_ulong *)ptr = (int32_t)tswap32(env->fpu->fcr31);
ths2052caa2007-06-01 13:18:19 +0000647 ptr += sizeof(target_ulong);
ths36d23952007-02-28 22:37:42 +0000648
ths7ac256b2007-10-25 21:30:37 +0000649 *(target_ulong *)ptr = (int32_t)tswap32(env->fpu->fcr0);
ths2052caa2007-06-01 13:18:19 +0000650 ptr += sizeof(target_ulong);
ths8e33c082006-12-11 19:22:27 +0000651 }
652
ths7ac256b2007-10-25 21:30:37 +0000653 /* "fp", pseudo frame pointer. Not yet implemented in gdb. */
654 *(target_ulong *)ptr = 0;
655 ptr += sizeof(target_ulong);
656
657 /* Registers for embedded use, we just pad them. */
658 for (i = 0; i < 16; i++)
659 {
660 *(target_ulong *)ptr = 0;
661 ptr += sizeof(target_ulong);
662 }
663
664 /* Processor ID. */
665 *(target_ulong *)ptr = (int32_t)tswap32(env->CP0_PRid);
666 ptr += sizeof(target_ulong);
bellard6f970bd2005-12-05 19:55:19 +0000667
668 return ptr - mem_buf;
669}
670
ths8e33c082006-12-11 19:22:27 +0000671/* convert MIPS rounding mode in FCR31 to IEEE library */
672static unsigned int ieee_rm[] =
673 {
674 float_round_nearest_even,
675 float_round_to_zero,
676 float_round_up,
677 float_round_down
678 };
679#define RESTORE_ROUNDING_MODE \
thsead93602007-09-06 00:18:15 +0000680 set_float_rounding_mode(ieee_rm[env->fpu->fcr31 & 3], &env->fpu->fp_status)
ths8e33c082006-12-11 19:22:27 +0000681
bellard6f970bd2005-12-05 19:55:19 +0000682static void cpu_gdb_write_registers(CPUState *env, uint8_t *mem_buf, int size)
683{
684 int i;
685 uint8_t *ptr;
686
687 ptr = mem_buf;
688 for (i = 0; i < 32; i++)
689 {
thsd0dc7dc2008-02-12 21:01:26 +0000690 env->gpr[env->current_tc][i] = tswapl(*(target_ulong *)ptr);
ths2052caa2007-06-01 13:18:19 +0000691 ptr += sizeof(target_ulong);
bellard6f970bd2005-12-05 19:55:19 +0000692 }
693
ths2052caa2007-06-01 13:18:19 +0000694 env->CP0_Status = tswapl(*(target_ulong *)ptr);
695 ptr += sizeof(target_ulong);
bellard6f970bd2005-12-05 19:55:19 +0000696
thsd0dc7dc2008-02-12 21:01:26 +0000697 env->LO[env->current_tc][0] = tswapl(*(target_ulong *)ptr);
ths2052caa2007-06-01 13:18:19 +0000698 ptr += sizeof(target_ulong);
bellard6f970bd2005-12-05 19:55:19 +0000699
thsd0dc7dc2008-02-12 21:01:26 +0000700 env->HI[env->current_tc][0] = tswapl(*(target_ulong *)ptr);
ths2052caa2007-06-01 13:18:19 +0000701 ptr += sizeof(target_ulong);
bellard6f970bd2005-12-05 19:55:19 +0000702
ths2052caa2007-06-01 13:18:19 +0000703 env->CP0_BadVAddr = tswapl(*(target_ulong *)ptr);
704 ptr += sizeof(target_ulong);
bellard6f970bd2005-12-05 19:55:19 +0000705
ths2052caa2007-06-01 13:18:19 +0000706 env->CP0_Cause = tswapl(*(target_ulong *)ptr);
707 ptr += sizeof(target_ulong);
bellard6f970bd2005-12-05 19:55:19 +0000708
thsead93602007-09-06 00:18:15 +0000709 env->PC[env->current_tc] = tswapl(*(target_ulong *)ptr);
ths2052caa2007-06-01 13:18:19 +0000710 ptr += sizeof(target_ulong);
ths8e33c082006-12-11 19:22:27 +0000711
ths36d23952007-02-28 22:37:42 +0000712 if (env->CP0_Config1 & (1 << CP0C1_FP))
ths8e33c082006-12-11 19:22:27 +0000713 {
ths36d23952007-02-28 22:37:42 +0000714 for (i = 0; i < 32; i++)
715 {
ths7ac256b2007-10-25 21:30:37 +0000716 if (env->CP0_Status & (1 << CP0St_FR))
717 env->fpu->fpr[i].d = tswapl(*(target_ulong *)ptr);
718 else
719 env->fpu->fpr[i].w[FP_ENDIAN_IDX] = tswapl(*(target_ulong *)ptr);
ths2052caa2007-06-01 13:18:19 +0000720 ptr += sizeof(target_ulong);
ths36d23952007-02-28 22:37:42 +0000721 }
722
ths7ac256b2007-10-25 21:30:37 +0000723 env->fpu->fcr31 = tswapl(*(target_ulong *)ptr) & 0xFF83FFFF;
ths2052caa2007-06-01 13:18:19 +0000724 ptr += sizeof(target_ulong);
ths8e33c082006-12-11 19:22:27 +0000725
ths7ac256b2007-10-25 21:30:37 +0000726 /* The remaining registers are assumed to be read-only. */
ths8e33c082006-12-11 19:22:27 +0000727
ths36d23952007-02-28 22:37:42 +0000728 /* set rounding mode */
729 RESTORE_ROUNDING_MODE;
ths8e33c082006-12-11 19:22:27 +0000730
731#ifndef CONFIG_SOFTFLOAT
ths36d23952007-02-28 22:37:42 +0000732 /* no floating point exception for native float */
733 SET_FP_ENABLE(env->fcr31, 0);
ths8e33c082006-12-11 19:22:27 +0000734#endif
ths36d23952007-02-28 22:37:42 +0000735 }
bellard6f970bd2005-12-05 19:55:19 +0000736}
bellardfdf9b3e2006-04-27 21:07:38 +0000737#elif defined (TARGET_SH4)
ths6ef99fc2007-05-13 16:36:24 +0000738
739/* Hint: Use "set architecture sh4" in GDB to see fpu registers */
740
bellardfdf9b3e2006-04-27 21:07:38 +0000741static int cpu_gdb_read_registers(CPUState *env, uint8_t *mem_buf)
742{
743 uint32_t *ptr = (uint32_t *)mem_buf;
744 int i;
745
746#define SAVE(x) *ptr++=tswapl(x)
pbrook9c2a9ea2006-06-18 19:12:54 +0000747 if ((env->sr & (SR_MD | SR_RB)) == (SR_MD | SR_RB)) {
748 for (i = 0; i < 8; i++) SAVE(env->gregs[i + 16]);
749 } else {
750 for (i = 0; i < 8; i++) SAVE(env->gregs[i]);
751 }
752 for (i = 8; i < 16; i++) SAVE(env->gregs[i]);
bellardfdf9b3e2006-04-27 21:07:38 +0000753 SAVE (env->pc);
754 SAVE (env->pr);
755 SAVE (env->gbr);
756 SAVE (env->vbr);
757 SAVE (env->mach);
758 SAVE (env->macl);
759 SAVE (env->sr);
ths6ef99fc2007-05-13 16:36:24 +0000760 SAVE (env->fpul);
761 SAVE (env->fpscr);
762 for (i = 0; i < 16; i++)
763 SAVE(env->fregs[i + ((env->fpscr & FPSCR_FR) ? 16 : 0)]);
764 SAVE (env->ssr);
765 SAVE (env->spc);
766 for (i = 0; i < 8; i++) SAVE(env->gregs[i]);
767 for (i = 0; i < 8; i++) SAVE(env->gregs[i + 16]);
bellardfdf9b3e2006-04-27 21:07:38 +0000768 return ((uint8_t *)ptr - mem_buf);
769}
770
771static void cpu_gdb_write_registers(CPUState *env, uint8_t *mem_buf, int size)
772{
773 uint32_t *ptr = (uint32_t *)mem_buf;
774 int i;
775
776#define LOAD(x) (x)=*ptr++;
pbrook9c2a9ea2006-06-18 19:12:54 +0000777 if ((env->sr & (SR_MD | SR_RB)) == (SR_MD | SR_RB)) {
778 for (i = 0; i < 8; i++) LOAD(env->gregs[i + 16]);
779 } else {
780 for (i = 0; i < 8; i++) LOAD(env->gregs[i]);
781 }
782 for (i = 8; i < 16; i++) LOAD(env->gregs[i]);
bellardfdf9b3e2006-04-27 21:07:38 +0000783 LOAD (env->pc);
784 LOAD (env->pr);
785 LOAD (env->gbr);
786 LOAD (env->vbr);
787 LOAD (env->mach);
788 LOAD (env->macl);
789 LOAD (env->sr);
ths6ef99fc2007-05-13 16:36:24 +0000790 LOAD (env->fpul);
791 LOAD (env->fpscr);
792 for (i = 0; i < 16; i++)
793 LOAD(env->fregs[i + ((env->fpscr & FPSCR_FR) ? 16 : 0)]);
794 LOAD (env->ssr);
795 LOAD (env->spc);
796 for (i = 0; i < 8; i++) LOAD(env->gregs[i]);
797 for (i = 0; i < 8; i++) LOAD(env->gregs[i + 16]);
bellardfdf9b3e2006-04-27 21:07:38 +0000798}
thsf1ccf902007-10-08 13:16:14 +0000799#elif defined (TARGET_CRIS)
800
801static int cris_save_32 (unsigned char *d, uint32_t value)
802{
803 *d++ = (value);
804 *d++ = (value >>= 8);
805 *d++ = (value >>= 8);
806 *d++ = (value >>= 8);
807 return 4;
808}
809static int cris_save_16 (unsigned char *d, uint32_t value)
810{
811 *d++ = (value);
812 *d++ = (value >>= 8);
813 return 2;
814}
815static int cris_save_8 (unsigned char *d, uint32_t value)
816{
817 *d++ = (value);
818 return 1;
819}
820
821/* FIXME: this will bug on archs not supporting unaligned word accesses. */
822static int cpu_gdb_read_registers(CPUState *env, uint8_t *mem_buf)
823{
824 uint8_t *ptr = mem_buf;
825 uint8_t srs;
826 int i;
827
828 for (i = 0; i < 16; i++)
829 ptr += cris_save_32 (ptr, env->regs[i]);
830
edgar_igl90046272008-02-28 08:28:32 +0000831 srs = env->pregs[PR_SRS];
thsf1ccf902007-10-08 13:16:14 +0000832
833 ptr += cris_save_8 (ptr, env->pregs[0]);
834 ptr += cris_save_8 (ptr, env->pregs[1]);
835 ptr += cris_save_32 (ptr, env->pregs[2]);
836 ptr += cris_save_8 (ptr, srs);
837 ptr += cris_save_16 (ptr, env->pregs[4]);
838
839 for (i = 5; i < 16; i++)
840 ptr += cris_save_32 (ptr, env->pregs[i]);
841
842 ptr += cris_save_32 (ptr, env->pc);
843
844 for (i = 0; i < 16; i++)
845 ptr += cris_save_32 (ptr, env->sregs[srs][i]);
846
847 return ((uint8_t *)ptr - mem_buf);
848}
849
850static void cpu_gdb_write_registers(CPUState *env, uint8_t *mem_buf, int size)
851{
852 uint32_t *ptr = (uint32_t *)mem_buf;
853 int i;
854
855#define LOAD(x) (x)=*ptr++;
856 for (i = 0; i < 16; i++) LOAD(env->regs[i]);
857 LOAD (env->pc);
858}
bellard1fddef42005-04-17 19:16:13 +0000859#else
bellard6da41ea2004-01-04 15:48:38 +0000860static int cpu_gdb_read_registers(CPUState *env, uint8_t *mem_buf)
861{
862 return 0;
863}
864
865static void cpu_gdb_write_registers(CPUState *env, uint8_t *mem_buf, int size)
866{
867}
868
869#endif
bellardb4608c02003-06-27 17:34:32 +0000870
bellard1fddef42005-04-17 19:16:13 +0000871static int gdb_handle_packet(GDBState *s, CPUState *env, const char *line_buf)
bellardb4608c02003-06-27 17:34:32 +0000872{
bellardb4608c02003-06-27 17:34:32 +0000873 const char *p;
bellard858693c2004-03-31 18:52:07 +0000874 int ch, reg_size, type;
bellardb4608c02003-06-27 17:34:32 +0000875 char buf[4096];
thsf1ccf902007-10-08 13:16:14 +0000876 uint8_t mem_buf[4096];
bellardb4608c02003-06-27 17:34:32 +0000877 uint32_t *registers;
bellard9d9754a2006-06-25 15:32:37 +0000878 target_ulong addr, len;
ths3b46e622007-09-17 08:09:54 +0000879
bellard858693c2004-03-31 18:52:07 +0000880#ifdef DEBUG_GDB
881 printf("command='%s'\n", line_buf);
bellard4c3a88a2003-07-26 12:06:08 +0000882#endif
bellard858693c2004-03-31 18:52:07 +0000883 p = line_buf;
884 ch = *p++;
885 switch(ch) {
886 case '?':
bellard1fddef42005-04-17 19:16:13 +0000887 /* TODO: Make this return the correct value for user-mode. */
bellard858693c2004-03-31 18:52:07 +0000888 snprintf(buf, sizeof(buf), "S%02x", SIGTRAP);
889 put_packet(s, buf);
890 break;
891 case 'c':
892 if (*p != '\0') {
bellard9d9754a2006-06-25 15:32:37 +0000893 addr = strtoull(p, (char **)&p, 16);
bellardc33a3462003-07-29 20:50:33 +0000894#if defined(TARGET_I386)
bellard858693c2004-03-31 18:52:07 +0000895 env->eip = addr;
bellard5be1a8e2004-01-04 23:51:58 +0000896#elif defined (TARGET_PPC)
bellard858693c2004-03-31 18:52:07 +0000897 env->nip = addr;
bellard8d5f07f2004-10-04 21:23:09 +0000898#elif defined (TARGET_SPARC)
899 env->pc = addr;
900 env->npc = addr + 4;
bellardb5ff1b32005-11-26 10:38:39 +0000901#elif defined (TARGET_ARM)
902 env->regs[15] = addr;
bellardfdf9b3e2006-04-27 21:07:38 +0000903#elif defined (TARGET_SH4)
ths8fac5802007-07-12 10:05:07 +0000904 env->pc = addr;
905#elif defined (TARGET_MIPS)
thsead93602007-09-06 00:18:15 +0000906 env->PC[env->current_tc] = addr;
thsf1ccf902007-10-08 13:16:14 +0000907#elif defined (TARGET_CRIS)
908 env->pc = addr;
bellardc33a3462003-07-29 20:50:33 +0000909#endif
bellard858693c2004-03-31 18:52:07 +0000910 }
bellard41625032005-04-24 10:07:11 +0000911#ifdef CONFIG_USER_ONLY
912 s->running_state = 1;
913#else
914 vm_start();
915#endif
916 return RS_IDLE;
bellard858693c2004-03-31 18:52:07 +0000917 case 's':
918 if (*p != '\0') {
ths8fac5802007-07-12 10:05:07 +0000919 addr = strtoull(p, (char **)&p, 16);
bellard858693c2004-03-31 18:52:07 +0000920#if defined(TARGET_I386)
921 env->eip = addr;
922#elif defined (TARGET_PPC)
923 env->nip = addr;
bellard8d5f07f2004-10-04 21:23:09 +0000924#elif defined (TARGET_SPARC)
925 env->pc = addr;
926 env->npc = addr + 4;
bellardb5ff1b32005-11-26 10:38:39 +0000927#elif defined (TARGET_ARM)
928 env->regs[15] = addr;
bellardfdf9b3e2006-04-27 21:07:38 +0000929#elif defined (TARGET_SH4)
ths8fac5802007-07-12 10:05:07 +0000930 env->pc = addr;
931#elif defined (TARGET_MIPS)
thsead93602007-09-06 00:18:15 +0000932 env->PC[env->current_tc] = addr;
thsf1ccf902007-10-08 13:16:14 +0000933#elif defined (TARGET_CRIS)
934 env->pc = addr;
bellard858693c2004-03-31 18:52:07 +0000935#endif
936 }
937 cpu_single_step(env, 1);
bellard41625032005-04-24 10:07:11 +0000938#ifdef CONFIG_USER_ONLY
939 s->running_state = 1;
940#else
941 vm_start();
942#endif
943 return RS_IDLE;
pbrooka2d1eba2007-01-28 03:10:55 +0000944 case 'F':
945 {
946 target_ulong ret;
947 target_ulong err;
948
949 ret = strtoull(p, (char **)&p, 16);
950 if (*p == ',') {
951 p++;
952 err = strtoull(p, (char **)&p, 16);
953 } else {
954 err = 0;
955 }
956 if (*p == ',')
957 p++;
958 type = *p;
959 if (gdb_current_syscall_cb)
960 gdb_current_syscall_cb(s->env, ret, err);
961 if (type == 'C') {
962 put_packet(s, "T02");
963 } else {
964#ifdef CONFIG_USER_ONLY
965 s->running_state = 1;
966#else
967 vm_start();
968#endif
969 }
970 }
971 break;
bellard858693c2004-03-31 18:52:07 +0000972 case 'g':
973 reg_size = cpu_gdb_read_registers(env, mem_buf);
974 memtohex(buf, mem_buf, reg_size);
975 put_packet(s, buf);
976 break;
977 case 'G':
978 registers = (void *)mem_buf;
979 len = strlen(p) / 2;
980 hextomem((uint8_t *)registers, p, len);
981 cpu_gdb_write_registers(env, mem_buf, len);
982 put_packet(s, "OK");
983 break;
984 case 'm':
bellard9d9754a2006-06-25 15:32:37 +0000985 addr = strtoull(p, (char **)&p, 16);
bellard858693c2004-03-31 18:52:07 +0000986 if (*p == ',')
987 p++;
bellard9d9754a2006-06-25 15:32:37 +0000988 len = strtoull(p, NULL, 16);
bellard6f970bd2005-12-05 19:55:19 +0000989 if (cpu_memory_rw_debug(env, addr, mem_buf, len, 0) != 0) {
990 put_packet (s, "E14");
991 } else {
992 memtohex(buf, mem_buf, len);
993 put_packet(s, buf);
994 }
bellard858693c2004-03-31 18:52:07 +0000995 break;
996 case 'M':
bellard9d9754a2006-06-25 15:32:37 +0000997 addr = strtoull(p, (char **)&p, 16);
bellard858693c2004-03-31 18:52:07 +0000998 if (*p == ',')
999 p++;
bellard9d9754a2006-06-25 15:32:37 +00001000 len = strtoull(p, (char **)&p, 16);
bellardb328f872005-01-17 22:03:16 +00001001 if (*p == ':')
bellard858693c2004-03-31 18:52:07 +00001002 p++;
1003 hextomem(mem_buf, p, len);
1004 if (cpu_memory_rw_debug(env, addr, mem_buf, len, 1) != 0)
bellard905f20b2005-04-26 21:09:55 +00001005 put_packet(s, "E14");
bellard858693c2004-03-31 18:52:07 +00001006 else
1007 put_packet(s, "OK");
1008 break;
1009 case 'Z':
1010 type = strtoul(p, (char **)&p, 16);
1011 if (*p == ',')
1012 p++;
bellard9d9754a2006-06-25 15:32:37 +00001013 addr = strtoull(p, (char **)&p, 16);
bellard858693c2004-03-31 18:52:07 +00001014 if (*p == ',')
1015 p++;
bellard9d9754a2006-06-25 15:32:37 +00001016 len = strtoull(p, (char **)&p, 16);
bellard858693c2004-03-31 18:52:07 +00001017 if (type == 0 || type == 1) {
1018 if (cpu_breakpoint_insert(env, addr) < 0)
bellard4c3a88a2003-07-26 12:06:08 +00001019 goto breakpoint_error;
bellard858693c2004-03-31 18:52:07 +00001020 put_packet(s, "OK");
pbrook6658ffb2007-03-16 23:58:11 +00001021#ifndef CONFIG_USER_ONLY
1022 } else if (type == 2) {
1023 if (cpu_watchpoint_insert(env, addr) < 0)
1024 goto breakpoint_error;
1025 put_packet(s, "OK");
1026#endif
bellard858693c2004-03-31 18:52:07 +00001027 } else {
1028 breakpoint_error:
bellard905f20b2005-04-26 21:09:55 +00001029 put_packet(s, "E22");
bellard858693c2004-03-31 18:52:07 +00001030 }
1031 break;
1032 case 'z':
1033 type = strtoul(p, (char **)&p, 16);
1034 if (*p == ',')
1035 p++;
bellard9d9754a2006-06-25 15:32:37 +00001036 addr = strtoull(p, (char **)&p, 16);
bellard858693c2004-03-31 18:52:07 +00001037 if (*p == ',')
1038 p++;
bellard9d9754a2006-06-25 15:32:37 +00001039 len = strtoull(p, (char **)&p, 16);
bellard858693c2004-03-31 18:52:07 +00001040 if (type == 0 || type == 1) {
1041 cpu_breakpoint_remove(env, addr);
1042 put_packet(s, "OK");
pbrook6658ffb2007-03-16 23:58:11 +00001043#ifndef CONFIG_USER_ONLY
1044 } else if (type == 2) {
1045 cpu_watchpoint_remove(env, addr);
1046 put_packet(s, "OK");
1047#endif
bellard858693c2004-03-31 18:52:07 +00001048 } else {
1049 goto breakpoint_error;
1050 }
1051 break;
ths831b7822007-01-18 20:06:33 +00001052#ifdef CONFIG_LINUX_USER
pbrook978efd62006-06-17 18:30:42 +00001053 case 'q':
1054 if (strncmp(p, "Offsets", 7) == 0) {
1055 TaskState *ts = env->opaque;
1056
thsfe834d02007-06-03 17:08:32 +00001057 sprintf(buf,
pbrookcd041682007-11-11 14:52:02 +00001058 "Text=" TARGET_ABI_FMT_lx ";Data=" TARGET_ABI_FMT_lx
1059 ";Bss=" TARGET_ABI_FMT_lx,
thsfe834d02007-06-03 17:08:32 +00001060 ts->info->code_offset,
1061 ts->info->data_offset,
1062 ts->info->data_offset);
pbrook978efd62006-06-17 18:30:42 +00001063 put_packet(s, buf);
1064 break;
1065 }
1066 /* Fall through. */
1067#endif
bellard858693c2004-03-31 18:52:07 +00001068 default:
1069 // unknown_command:
1070 /* put empty packet */
1071 buf[0] = '\0';
1072 put_packet(s, buf);
1073 break;
1074 }
1075 return RS_IDLE;
1076}
1077
bellard612458f2005-01-03 23:34:06 +00001078extern void tb_flush(CPUState *env);
1079
bellard1fddef42005-04-17 19:16:13 +00001080#ifndef CONFIG_USER_ONLY
bellard858693c2004-03-31 18:52:07 +00001081static void gdb_vm_stopped(void *opaque, int reason)
1082{
1083 GDBState *s = opaque;
1084 char buf[256];
1085 int ret;
1086
pbrooka2d1eba2007-01-28 03:10:55 +00001087 if (s->state == RS_SYSCALL)
1088 return;
1089
bellard858693c2004-03-31 18:52:07 +00001090 /* disable single step if it was enable */
bellard6a00d602005-11-21 23:25:50 +00001091 cpu_single_step(s->env, 0);
bellard858693c2004-03-31 18:52:07 +00001092
bellarde80cfcf2004-12-19 23:18:01 +00001093 if (reason == EXCP_DEBUG) {
pbrook6658ffb2007-03-16 23:58:11 +00001094 if (s->env->watchpoint_hit) {
pbrookaa6290b2007-04-14 22:35:50 +00001095 snprintf(buf, sizeof(buf), "T%02xwatch:" TARGET_FMT_lx ";",
1096 SIGTRAP,
pbrook6658ffb2007-03-16 23:58:11 +00001097 s->env->watchpoint[s->env->watchpoint_hit - 1].vaddr);
1098 put_packet(s, buf);
1099 s->env->watchpoint_hit = 0;
1100 return;
1101 }
bellard6a00d602005-11-21 23:25:50 +00001102 tb_flush(s->env);
bellard858693c2004-03-31 18:52:07 +00001103 ret = SIGTRAP;
bellardbbeb7b52006-04-23 18:42:15 +00001104 } else if (reason == EXCP_INTERRUPT) {
1105 ret = SIGINT;
1106 } else {
bellard858693c2004-03-31 18:52:07 +00001107 ret = 0;
bellardbbeb7b52006-04-23 18:42:15 +00001108 }
bellard858693c2004-03-31 18:52:07 +00001109 snprintf(buf, sizeof(buf), "S%02x", ret);
1110 put_packet(s, buf);
1111}
bellard1fddef42005-04-17 19:16:13 +00001112#endif
bellard858693c2004-03-31 18:52:07 +00001113
pbrooka2d1eba2007-01-28 03:10:55 +00001114/* Send a gdb syscall request.
1115 This accepts limited printf-style format specifiers, specifically:
pbrooka87295e2007-05-26 15:09:38 +00001116 %x - target_ulong argument printed in hex.
1117 %lx - 64-bit argument printed in hex.
1118 %s - string pointer (target_ulong) and length (int) pair. */
pbrooka2d1eba2007-01-28 03:10:55 +00001119void gdb_do_syscall(gdb_syscall_complete_cb cb, char *fmt, ...)
1120{
1121 va_list va;
1122 char buf[256];
1123 char *p;
1124 target_ulong addr;
pbrooka87295e2007-05-26 15:09:38 +00001125 uint64_t i64;
pbrooka2d1eba2007-01-28 03:10:55 +00001126 GDBState *s;
1127
1128 s = gdb_syscall_state;
1129 if (!s)
1130 return;
1131 gdb_current_syscall_cb = cb;
1132 s->state = RS_SYSCALL;
1133#ifndef CONFIG_USER_ONLY
1134 vm_stop(EXCP_DEBUG);
1135#endif
1136 s->state = RS_IDLE;
1137 va_start(va, fmt);
1138 p = buf;
1139 *(p++) = 'F';
1140 while (*fmt) {
1141 if (*fmt == '%') {
1142 fmt++;
1143 switch (*fmt++) {
1144 case 'x':
1145 addr = va_arg(va, target_ulong);
1146 p += sprintf(p, TARGET_FMT_lx, addr);
1147 break;
pbrooka87295e2007-05-26 15:09:38 +00001148 case 'l':
1149 if (*(fmt++) != 'x')
1150 goto bad_format;
1151 i64 = va_arg(va, uint64_t);
1152 p += sprintf(p, "%" PRIx64, i64);
1153 break;
pbrooka2d1eba2007-01-28 03:10:55 +00001154 case 's':
1155 addr = va_arg(va, target_ulong);
1156 p += sprintf(p, TARGET_FMT_lx "/%x", addr, va_arg(va, int));
1157 break;
1158 default:
pbrooka87295e2007-05-26 15:09:38 +00001159 bad_format:
pbrooka2d1eba2007-01-28 03:10:55 +00001160 fprintf(stderr, "gdbstub: Bad syscall format string '%s'\n",
1161 fmt - 1);
1162 break;
1163 }
1164 } else {
1165 *(p++) = *(fmt++);
1166 }
1167 }
pbrook8a93e022007-08-06 13:19:15 +00001168 *p = 0;
pbrooka2d1eba2007-01-28 03:10:55 +00001169 va_end(va);
1170 put_packet(s, buf);
1171#ifdef CONFIG_USER_ONLY
1172 gdb_handlesig(s->env, 0);
1173#else
1174 cpu_interrupt(s->env, CPU_INTERRUPT_EXIT);
1175#endif
1176}
1177
bellard6a00d602005-11-21 23:25:50 +00001178static void gdb_read_byte(GDBState *s, int ch)
bellard858693c2004-03-31 18:52:07 +00001179{
bellard6a00d602005-11-21 23:25:50 +00001180 CPUState *env = s->env;
bellard858693c2004-03-31 18:52:07 +00001181 int i, csum;
ths60fe76f2007-12-16 03:02:09 +00001182 uint8_t reply;
bellard858693c2004-03-31 18:52:07 +00001183
bellard1fddef42005-04-17 19:16:13 +00001184#ifndef CONFIG_USER_ONLY
pbrook4046d912007-01-28 01:53:16 +00001185 if (s->last_packet_len) {
1186 /* Waiting for a response to the last packet. If we see the start
1187 of a new command then abandon the previous response. */
1188 if (ch == '-') {
1189#ifdef DEBUG_GDB
1190 printf("Got NACK, retransmitting\n");
1191#endif
thsffe8ab82007-12-16 03:16:05 +00001192 put_buffer(s, (uint8_t *)s->last_packet, s->last_packet_len);
pbrook4046d912007-01-28 01:53:16 +00001193 }
1194#ifdef DEBUG_GDB
1195 else if (ch == '+')
1196 printf("Got ACK\n");
1197 else
1198 printf("Got '%c' when expecting ACK/NACK\n", ch);
1199#endif
1200 if (ch == '+' || ch == '$')
1201 s->last_packet_len = 0;
1202 if (ch != '$')
1203 return;
1204 }
bellard858693c2004-03-31 18:52:07 +00001205 if (vm_running) {
1206 /* when the CPU is running, we cannot do anything except stop
1207 it when receiving a char */
1208 vm_stop(EXCP_INTERRUPT);
ths5fafdf22007-09-16 21:08:06 +00001209 } else
bellard1fddef42005-04-17 19:16:13 +00001210#endif
bellard41625032005-04-24 10:07:11 +00001211 {
bellard858693c2004-03-31 18:52:07 +00001212 switch(s->state) {
1213 case RS_IDLE:
1214 if (ch == '$') {
1215 s->line_buf_index = 0;
1216 s->state = RS_GETLINE;
bellard4c3a88a2003-07-26 12:06:08 +00001217 }
1218 break;
bellard858693c2004-03-31 18:52:07 +00001219 case RS_GETLINE:
1220 if (ch == '#') {
1221 s->state = RS_CHKSUM1;
1222 } else if (s->line_buf_index >= sizeof(s->line_buf) - 1) {
1223 s->state = RS_IDLE;
1224 } else {
1225 s->line_buf[s->line_buf_index++] = ch;
1226 }
1227 break;
1228 case RS_CHKSUM1:
1229 s->line_buf[s->line_buf_index] = '\0';
1230 s->line_csum = fromhex(ch) << 4;
1231 s->state = RS_CHKSUM2;
1232 break;
1233 case RS_CHKSUM2:
1234 s->line_csum |= fromhex(ch);
1235 csum = 0;
1236 for(i = 0; i < s->line_buf_index; i++) {
1237 csum += s->line_buf[i];
1238 }
1239 if (s->line_csum != (csum & 0xff)) {
ths60fe76f2007-12-16 03:02:09 +00001240 reply = '-';
1241 put_buffer(s, &reply, 1);
bellard858693c2004-03-31 18:52:07 +00001242 s->state = RS_IDLE;
1243 } else {
ths60fe76f2007-12-16 03:02:09 +00001244 reply = '+';
1245 put_buffer(s, &reply, 1);
bellard1fddef42005-04-17 19:16:13 +00001246 s->state = gdb_handle_packet(s, env, s->line_buf);
bellard858693c2004-03-31 18:52:07 +00001247 }
bellardb4608c02003-06-27 17:34:32 +00001248 break;
pbrooka2d1eba2007-01-28 03:10:55 +00001249 default:
1250 abort();
bellardb4608c02003-06-27 17:34:32 +00001251 }
1252 }
bellard858693c2004-03-31 18:52:07 +00001253}
1254
bellard1fddef42005-04-17 19:16:13 +00001255#ifdef CONFIG_USER_ONLY
1256int
1257gdb_handlesig (CPUState *env, int sig)
1258{
1259 GDBState *s;
1260 char buf[256];
1261 int n;
1262
1263 if (gdbserver_fd < 0)
1264 return sig;
1265
1266 s = &gdbserver_state;
1267
1268 /* disable single step if it was enabled */
1269 cpu_single_step(env, 0);
1270 tb_flush(env);
1271
1272 if (sig != 0)
1273 {
1274 snprintf(buf, sizeof(buf), "S%02x", sig);
1275 put_packet(s, buf);
1276 }
1277
bellard1fddef42005-04-17 19:16:13 +00001278 sig = 0;
1279 s->state = RS_IDLE;
bellard41625032005-04-24 10:07:11 +00001280 s->running_state = 0;
1281 while (s->running_state == 0) {
bellard1fddef42005-04-17 19:16:13 +00001282 n = read (s->fd, buf, 256);
1283 if (n > 0)
1284 {
1285 int i;
1286
1287 for (i = 0; i < n; i++)
bellard6a00d602005-11-21 23:25:50 +00001288 gdb_read_byte (s, buf[i]);
bellard1fddef42005-04-17 19:16:13 +00001289 }
1290 else if (n == 0 || errno != EAGAIN)
1291 {
1292 /* XXX: Connection closed. Should probably wait for annother
1293 connection before continuing. */
1294 return sig;
1295 }
bellard41625032005-04-24 10:07:11 +00001296 }
bellard1fddef42005-04-17 19:16:13 +00001297 return sig;
1298}
bellarde9009672005-04-26 20:42:36 +00001299
1300/* Tell the remote gdb that the process has exited. */
1301void gdb_exit(CPUState *env, int code)
1302{
1303 GDBState *s;
1304 char buf[4];
1305
1306 if (gdbserver_fd < 0)
1307 return;
1308
1309 s = &gdbserver_state;
1310
1311 snprintf(buf, sizeof(buf), "W%02x", code);
1312 put_packet(s, buf);
1313}
1314
bellard1fddef42005-04-17 19:16:13 +00001315
bellard7c9d8e02005-11-15 22:16:05 +00001316static void gdb_accept(void *opaque)
bellard858693c2004-03-31 18:52:07 +00001317{
1318 GDBState *s;
1319 struct sockaddr_in sockaddr;
1320 socklen_t len;
1321 int val, fd;
1322
1323 for(;;) {
1324 len = sizeof(sockaddr);
1325 fd = accept(gdbserver_fd, (struct sockaddr *)&sockaddr, &len);
1326 if (fd < 0 && errno != EINTR) {
1327 perror("accept");
1328 return;
1329 } else if (fd >= 0) {
1330 break;
1331 }
1332 }
1333
1334 /* set short latency */
1335 val = 1;
bellard8f447cc2006-06-14 15:21:14 +00001336 setsockopt(fd, IPPROTO_TCP, TCP_NODELAY, (char *)&val, sizeof(val));
ths3b46e622007-09-17 08:09:54 +00001337
bellard1fddef42005-04-17 19:16:13 +00001338 s = &gdbserver_state;
1339 memset (s, 0, sizeof (GDBState));
bellard6a00d602005-11-21 23:25:50 +00001340 s->env = first_cpu; /* XXX: allow to change CPU */
bellard858693c2004-03-31 18:52:07 +00001341 s->fd = fd;
1342
pbrooka2d1eba2007-01-28 03:10:55 +00001343 gdb_syscall_state = s;
1344
bellard858693c2004-03-31 18:52:07 +00001345 fcntl(fd, F_SETFL, O_NONBLOCK);
bellard858693c2004-03-31 18:52:07 +00001346}
1347
1348static int gdbserver_open(int port)
1349{
1350 struct sockaddr_in sockaddr;
1351 int fd, val, ret;
1352
1353 fd = socket(PF_INET, SOCK_STREAM, 0);
1354 if (fd < 0) {
1355 perror("socket");
1356 return -1;
1357 }
1358
1359 /* allow fast reuse */
1360 val = 1;
bellard8f447cc2006-06-14 15:21:14 +00001361 setsockopt(fd, SOL_SOCKET, SO_REUSEADDR, (char *)&val, sizeof(val));
bellard858693c2004-03-31 18:52:07 +00001362
1363 sockaddr.sin_family = AF_INET;
1364 sockaddr.sin_port = htons(port);
1365 sockaddr.sin_addr.s_addr = 0;
1366 ret = bind(fd, (struct sockaddr *)&sockaddr, sizeof(sockaddr));
1367 if (ret < 0) {
1368 perror("bind");
1369 return -1;
1370 }
1371 ret = listen(fd, 0);
1372 if (ret < 0) {
1373 perror("listen");
1374 return -1;
1375 }
bellard858693c2004-03-31 18:52:07 +00001376 return fd;
1377}
1378
1379int gdbserver_start(int port)
1380{
1381 gdbserver_fd = gdbserver_open(port);
1382 if (gdbserver_fd < 0)
1383 return -1;
1384 /* accept connections */
bellard7c9d8e02005-11-15 22:16:05 +00001385 gdb_accept (NULL);
bellardb4608c02003-06-27 17:34:32 +00001386 return 0;
1387}
pbrook4046d912007-01-28 01:53:16 +00001388#else
thsaa1f17c2007-07-11 22:48:58 +00001389static int gdb_chr_can_receive(void *opaque)
pbrook4046d912007-01-28 01:53:16 +00001390{
1391 return 1;
1392}
1393
thsaa1f17c2007-07-11 22:48:58 +00001394static void gdb_chr_receive(void *opaque, const uint8_t *buf, int size)
pbrook4046d912007-01-28 01:53:16 +00001395{
1396 GDBState *s = opaque;
1397 int i;
1398
1399 for (i = 0; i < size; i++) {
1400 gdb_read_byte(s, buf[i]);
1401 }
1402}
1403
1404static void gdb_chr_event(void *opaque, int event)
1405{
1406 switch (event) {
1407 case CHR_EVENT_RESET:
1408 vm_stop(EXCP_INTERRUPT);
pbrooka2d1eba2007-01-28 03:10:55 +00001409 gdb_syscall_state = opaque;
pbrook4046d912007-01-28 01:53:16 +00001410 break;
1411 default:
1412 break;
1413 }
1414}
1415
pbrookcfc34752007-02-22 01:48:01 +00001416int gdbserver_start(const char *port)
pbrook4046d912007-01-28 01:53:16 +00001417{
1418 GDBState *s;
pbrookcfc34752007-02-22 01:48:01 +00001419 char gdbstub_port_name[128];
1420 int port_num;
1421 char *p;
1422 CharDriverState *chr;
pbrook4046d912007-01-28 01:53:16 +00001423
pbrookcfc34752007-02-22 01:48:01 +00001424 if (!port || !*port)
1425 return -1;
1426
1427 port_num = strtol(port, &p, 10);
1428 if (*p == 0) {
1429 /* A numeric value is interpreted as a port number. */
1430 snprintf(gdbstub_port_name, sizeof(gdbstub_port_name),
1431 "tcp::%d,nowait,nodelay,server", port_num);
1432 port = gdbstub_port_name;
1433 }
1434
1435 chr = qemu_chr_open(port);
pbrook4046d912007-01-28 01:53:16 +00001436 if (!chr)
1437 return -1;
1438
1439 s = qemu_mallocz(sizeof(GDBState));
1440 if (!s) {
1441 return -1;
1442 }
1443 s->env = first_cpu; /* XXX: allow to change CPU */
1444 s->chr = chr;
thsaa1f17c2007-07-11 22:48:58 +00001445 qemu_chr_add_handlers(chr, gdb_chr_can_receive, gdb_chr_receive,
pbrook4046d912007-01-28 01:53:16 +00001446 gdb_chr_event, s);
1447 qemu_add_vm_stop_handler(gdb_vm_stopped, s);
1448 return 0;
1449}
1450#endif