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Kirill Batuzov8f2e8c02011-07-07 16:37:12 +04001/*
2 * Optimizations for Tiny Code Generator for QEMU
3 *
4 * Copyright (c) 2010 Samsung Electronics.
5 * Contributed by Kirill Batuzov <batuzovk@ispras.ru>
6 *
7 * Permission is hereby granted, free of charge, to any person obtaining a copy
8 * of this software and associated documentation files (the "Software"), to deal
9 * in the Software without restriction, including without limitation the rights
10 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
11 * copies of the Software, and to permit persons to whom the Software is
12 * furnished to do so, subject to the following conditions:
13 *
14 * The above copyright notice and this permission notice shall be included in
15 * all copies or substantial portions of the Software.
16 *
17 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
18 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
19 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
20 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
21 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
22 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
23 * THE SOFTWARE.
24 */
25
Peter Maydell757e7252016-01-26 18:17:08 +000026#include "qemu/osdep.h"
Kirill Batuzov8f2e8c02011-07-07 16:37:12 +040027#include "qemu-common.h"
Paolo Bonzini00f6da62016-03-15 13:16:36 +010028#include "exec/cpu-common.h"
Kirill Batuzov8f2e8c02011-07-07 16:37:12 +040029#include "tcg-op.h"
30
Kirill Batuzov8f2e8c02011-07-07 16:37:12 +040031#define CASE_OP_32_64(x) \
32 glue(glue(case INDEX_op_, x), _i32): \
33 glue(glue(case INDEX_op_, x), _i64)
Kirill Batuzov8f2e8c02011-07-07 16:37:12 +040034
Kirill Batuzov22613af2011-07-07 16:37:13 +040035struct tcg_temp_info {
Aurelien Jarnob41059d2015-07-27 12:41:44 +020036 bool is_const;
Kirill Batuzov22613af2011-07-07 16:37:13 +040037 uint16_t prev_copy;
38 uint16_t next_copy;
39 tcg_target_ulong val;
Paolo Bonzini3a9d8b12013-01-11 15:42:52 -080040 tcg_target_ulong mask;
Kirill Batuzov22613af2011-07-07 16:37:13 +040041};
42
43static struct tcg_temp_info temps[TCG_MAX_TEMPS];
Aurelien Jarno1208d7d2015-07-27 12:41:44 +020044static TCGTempSet temps_used;
Kirill Batuzov22613af2011-07-07 16:37:13 +040045
Aurelien Jarnod9c769c2015-07-27 12:41:44 +020046static inline bool temp_is_const(TCGArg arg)
47{
Aurelien Jarnob41059d2015-07-27 12:41:44 +020048 return temps[arg].is_const;
Aurelien Jarnod9c769c2015-07-27 12:41:44 +020049}
50
51static inline bool temp_is_copy(TCGArg arg)
52{
Aurelien Jarnob41059d2015-07-27 12:41:44 +020053 return temps[arg].next_copy != arg;
Aurelien Jarnod9c769c2015-07-27 12:41:44 +020054}
55
Aurelien Jarnob41059d2015-07-27 12:41:44 +020056/* Reset TEMP's state, possibly removing the temp for the list of copies. */
Aurelien Jarnoe590d4e2012-09-11 12:31:21 +020057static void reset_temp(TCGArg temp)
Kirill Batuzov22613af2011-07-07 16:37:13 +040058{
Aurelien Jarnob41059d2015-07-27 12:41:44 +020059 temps[temps[temp].next_copy].prev_copy = temps[temp].prev_copy;
60 temps[temps[temp].prev_copy].next_copy = temps[temp].next_copy;
61 temps[temp].next_copy = temp;
62 temps[temp].prev_copy = temp;
63 temps[temp].is_const = false;
Paolo Bonzini3a9d8b12013-01-11 15:42:52 -080064 temps[temp].mask = -1;
Kirill Batuzov22613af2011-07-07 16:37:13 +040065}
66
Aurelien Jarno1208d7d2015-07-27 12:41:44 +020067/* Reset all temporaries, given that there are NB_TEMPS of them. */
68static void reset_all_temps(int nb_temps)
69{
70 bitmap_zero(temps_used.l, nb_temps);
71}
72
73/* Initialize and activate a temporary. */
74static void init_temp_info(TCGArg temp)
75{
76 if (!test_bit(temp, temps_used.l)) {
Aurelien Jarnob41059d2015-07-27 12:41:44 +020077 temps[temp].next_copy = temp;
78 temps[temp].prev_copy = temp;
79 temps[temp].is_const = false;
Aurelien Jarno1208d7d2015-07-27 12:41:44 +020080 temps[temp].mask = -1;
81 set_bit(temp, temps_used.l);
82 }
83}
84
Blue Swirlfe0de7a2011-07-30 19:18:32 +000085static int op_bits(TCGOpcode op)
Kirill Batuzov22613af2011-07-07 16:37:13 +040086{
Richard Henderson8399ad52011-08-17 14:11:45 -070087 const TCGOpDef *def = &tcg_op_defs[op];
88 return def->flags & TCG_OPF_64BIT ? 64 : 32;
Kirill Batuzov22613af2011-07-07 16:37:13 +040089}
90
Richard Hendersona62f6f52014-05-22 10:59:12 -070091static TCGOpcode op_to_mov(TCGOpcode op)
92{
93 switch (op_bits(op)) {
94 case 32:
95 return INDEX_op_mov_i32;
96 case 64:
97 return INDEX_op_mov_i64;
98 default:
99 fprintf(stderr, "op_to_mov: unexpected return value of "
100 "function op_bits.\n");
101 tcg_abort();
102 }
103}
104
Blue Swirlfe0de7a2011-07-30 19:18:32 +0000105static TCGOpcode op_to_movi(TCGOpcode op)
Kirill Batuzov22613af2011-07-07 16:37:13 +0400106{
107 switch (op_bits(op)) {
108 case 32:
109 return INDEX_op_movi_i32;
Kirill Batuzov22613af2011-07-07 16:37:13 +0400110 case 64:
111 return INDEX_op_movi_i64;
Kirill Batuzov22613af2011-07-07 16:37:13 +0400112 default:
113 fprintf(stderr, "op_to_movi: unexpected return value of "
114 "function op_bits.\n");
115 tcg_abort();
116 }
117}
118
Richard Hendersonfa477d22016-11-02 11:20:15 -0600119static TCGArg find_better_copy(TCGContext *s, TCGArg arg)
Aurelien Jarnoe590d4e2012-09-11 12:31:21 +0200120{
Richard Hendersonfa477d22016-11-02 11:20:15 -0600121 TCGTemp *ts = arg_temp(arg);
Aurelien Jarnoe590d4e2012-09-11 12:31:21 +0200122 TCGArg i;
123
124 /* If this is already a global, we can't do better. */
Richard Hendersonfa477d22016-11-02 11:20:15 -0600125 if (ts->temp_global) {
126 return arg;
Aurelien Jarnoe590d4e2012-09-11 12:31:21 +0200127 }
128
129 /* Search for a global first. */
Richard Hendersonfa477d22016-11-02 11:20:15 -0600130 for (i = temps[arg].next_copy ; i != arg; i = temps[i].next_copy) {
Aurelien Jarnoe590d4e2012-09-11 12:31:21 +0200131 if (i < s->nb_globals) {
132 return i;
133 }
134 }
135
136 /* If it is a temp, search for a temp local. */
Richard Hendersonfa477d22016-11-02 11:20:15 -0600137 if (!ts->temp_local) {
138 for (i = temps[arg].next_copy ; i != arg; i = temps[i].next_copy) {
Aurelien Jarnoe590d4e2012-09-11 12:31:21 +0200139 if (s->temps[i].temp_local) {
140 return i;
141 }
142 }
143 }
144
145 /* Failure to find a better representation, return the same temp. */
Richard Hendersonfa477d22016-11-02 11:20:15 -0600146 return arg;
Aurelien Jarnoe590d4e2012-09-11 12:31:21 +0200147}
148
149static bool temps_are_copies(TCGArg arg1, TCGArg arg2)
150{
151 TCGArg i;
152
153 if (arg1 == arg2) {
154 return true;
155 }
156
Aurelien Jarnod9c769c2015-07-27 12:41:44 +0200157 if (!temp_is_copy(arg1) || !temp_is_copy(arg2)) {
Aurelien Jarnoe590d4e2012-09-11 12:31:21 +0200158 return false;
159 }
160
161 for (i = temps[arg1].next_copy ; i != arg1 ; i = temps[i].next_copy) {
162 if (i == arg2) {
163 return true;
164 }
165 }
166
167 return false;
168}
169
Richard Hendersonacd93702016-12-08 12:28:42 -0800170static void tcg_opt_gen_movi(TCGContext *s, TCGOp *op, TCGArg dst, TCGArg val)
Aurelien Jarno97a79eb2015-06-05 11:19:18 +0200171{
172 TCGOpcode new_op = op_to_movi(op->opc);
173 tcg_target_ulong mask;
174
175 op->opc = new_op;
176
177 reset_temp(dst);
Aurelien Jarnob41059d2015-07-27 12:41:44 +0200178 temps[dst].is_const = true;
Aurelien Jarno97a79eb2015-06-05 11:19:18 +0200179 temps[dst].val = val;
180 mask = val;
Aurelien Jarno96152122015-07-10 18:03:30 +0200181 if (TCG_TARGET_REG_BITS > 32 && new_op == INDEX_op_movi_i32) {
Aurelien Jarno97a79eb2015-06-05 11:19:18 +0200182 /* High bits of the destination are now garbage. */
183 mask |= ~0xffffffffull;
184 }
185 temps[dst].mask = mask;
186
Richard Hendersonacd93702016-12-08 12:28:42 -0800187 op->args[0] = dst;
188 op->args[1] = val;
Aurelien Jarno97a79eb2015-06-05 11:19:18 +0200189}
190
Richard Hendersonacd93702016-12-08 12:28:42 -0800191static void tcg_opt_gen_mov(TCGContext *s, TCGOp *op, TCGArg dst, TCGArg src)
Kirill Batuzov22613af2011-07-07 16:37:13 +0400192{
Aurelien Jarno53657182015-06-04 21:53:25 +0200193 if (temps_are_copies(dst, src)) {
194 tcg_op_remove(s, op);
195 return;
196 }
197
Aurelien Jarno8d6a9162015-06-04 21:53:24 +0200198 TCGOpcode new_op = op_to_mov(op->opc);
Richard Henderson24666ba2014-05-22 11:14:10 -0700199 tcg_target_ulong mask;
Richard Hendersona62f6f52014-05-22 10:59:12 -0700200
Richard Hendersonc45cb8b2014-09-19 13:49:15 -0700201 op->opc = new_op;
Richard Hendersona62f6f52014-05-22 10:59:12 -0700202
Paolo Bonzini3a9d8b12013-01-11 15:42:52 -0800203 reset_temp(dst);
Richard Henderson24666ba2014-05-22 11:14:10 -0700204 mask = temps[src].mask;
205 if (TCG_TARGET_REG_BITS > 32 && new_op == INDEX_op_mov_i32) {
206 /* High bits of the destination are now garbage. */
207 mask |= ~0xffffffffull;
208 }
209 temps[dst].mask = mask;
210
Richard Henderson43439132017-06-19 23:18:10 -0700211 if (arg_temp(src)->type == arg_temp(dst)->type) {
Paolo Bonzini3a9d8b12013-01-11 15:42:52 -0800212 temps[dst].next_copy = temps[src].next_copy;
213 temps[dst].prev_copy = src;
214 temps[temps[dst].next_copy].prev_copy = dst;
215 temps[src].next_copy = dst;
Aurelien Jarno299f8012015-07-27 12:41:44 +0200216 temps[dst].is_const = temps[src].is_const;
217 temps[dst].val = temps[src].val;
Paolo Bonzini3a9d8b12013-01-11 15:42:52 -0800218 }
Aurelien Jarnoe590d4e2012-09-11 12:31:21 +0200219
Richard Hendersonacd93702016-12-08 12:28:42 -0800220 op->args[0] = dst;
221 op->args[1] = src;
Kirill Batuzov22613af2011-07-07 16:37:13 +0400222}
223
Blue Swirlfe0de7a2011-07-30 19:18:32 +0000224static TCGArg do_constant_folding_2(TCGOpcode op, TCGArg x, TCGArg y)
Kirill Batuzov53108fb2011-07-07 16:37:14 +0400225{
Richard Henderson03271522013-08-14 14:35:56 -0700226 uint64_t l64, h64;
227
Kirill Batuzov53108fb2011-07-07 16:37:14 +0400228 switch (op) {
229 CASE_OP_32_64(add):
230 return x + y;
231
232 CASE_OP_32_64(sub):
233 return x - y;
234
235 CASE_OP_32_64(mul):
236 return x * y;
237
Kirill Batuzov9a810902011-07-07 16:37:15 +0400238 CASE_OP_32_64(and):
239 return x & y;
240
241 CASE_OP_32_64(or):
242 return x | y;
243
244 CASE_OP_32_64(xor):
245 return x ^ y;
246
Kirill Batuzov55c09752011-07-07 16:37:16 +0400247 case INDEX_op_shl_i32:
Richard Henderson50c5c4d2014-03-18 07:45:39 -0700248 return (uint32_t)x << (y & 31);
Kirill Batuzov55c09752011-07-07 16:37:16 +0400249
Kirill Batuzov55c09752011-07-07 16:37:16 +0400250 case INDEX_op_shl_i64:
Richard Henderson50c5c4d2014-03-18 07:45:39 -0700251 return (uint64_t)x << (y & 63);
Kirill Batuzov55c09752011-07-07 16:37:16 +0400252
253 case INDEX_op_shr_i32:
Richard Henderson50c5c4d2014-03-18 07:45:39 -0700254 return (uint32_t)x >> (y & 31);
Kirill Batuzov55c09752011-07-07 16:37:16 +0400255
Kirill Batuzov55c09752011-07-07 16:37:16 +0400256 case INDEX_op_shr_i64:
Richard Henderson50c5c4d2014-03-18 07:45:39 -0700257 return (uint64_t)x >> (y & 63);
Kirill Batuzov55c09752011-07-07 16:37:16 +0400258
259 case INDEX_op_sar_i32:
Richard Henderson50c5c4d2014-03-18 07:45:39 -0700260 return (int32_t)x >> (y & 31);
Kirill Batuzov55c09752011-07-07 16:37:16 +0400261
Kirill Batuzov55c09752011-07-07 16:37:16 +0400262 case INDEX_op_sar_i64:
Richard Henderson50c5c4d2014-03-18 07:45:39 -0700263 return (int64_t)x >> (y & 63);
Kirill Batuzov55c09752011-07-07 16:37:16 +0400264
265 case INDEX_op_rotr_i32:
Richard Henderson50c5c4d2014-03-18 07:45:39 -0700266 return ror32(x, y & 31);
Kirill Batuzov55c09752011-07-07 16:37:16 +0400267
Kirill Batuzov55c09752011-07-07 16:37:16 +0400268 case INDEX_op_rotr_i64:
Richard Henderson50c5c4d2014-03-18 07:45:39 -0700269 return ror64(x, y & 63);
Kirill Batuzov55c09752011-07-07 16:37:16 +0400270
271 case INDEX_op_rotl_i32:
Richard Henderson50c5c4d2014-03-18 07:45:39 -0700272 return rol32(x, y & 31);
Kirill Batuzov55c09752011-07-07 16:37:16 +0400273
Kirill Batuzov55c09752011-07-07 16:37:16 +0400274 case INDEX_op_rotl_i64:
Richard Henderson50c5c4d2014-03-18 07:45:39 -0700275 return rol64(x, y & 63);
Kirill Batuzov55c09752011-07-07 16:37:16 +0400276
Richard Henderson25c4d9c2011-08-17 14:11:46 -0700277 CASE_OP_32_64(not):
Kirill Batuzova640f032011-07-07 16:37:17 +0400278 return ~x;
279
Richard Hendersoncb25c802011-08-17 14:11:47 -0700280 CASE_OP_32_64(neg):
281 return -x;
282
283 CASE_OP_32_64(andc):
284 return x & ~y;
285
286 CASE_OP_32_64(orc):
287 return x | ~y;
288
289 CASE_OP_32_64(eqv):
290 return ~(x ^ y);
291
292 CASE_OP_32_64(nand):
293 return ~(x & y);
294
295 CASE_OP_32_64(nor):
296 return ~(x | y);
297
Richard Henderson0e28d002016-11-16 09:23:28 +0100298 case INDEX_op_clz_i32:
299 return (uint32_t)x ? clz32(x) : y;
300
301 case INDEX_op_clz_i64:
302 return x ? clz64(x) : y;
303
304 case INDEX_op_ctz_i32:
305 return (uint32_t)x ? ctz32(x) : y;
306
307 case INDEX_op_ctz_i64:
308 return x ? ctz64(x) : y;
309
Richard Hendersona768e4e2016-11-21 11:13:39 +0100310 case INDEX_op_ctpop_i32:
311 return ctpop32(x);
312
313 case INDEX_op_ctpop_i64:
314 return ctpop64(x);
315
Richard Henderson25c4d9c2011-08-17 14:11:46 -0700316 CASE_OP_32_64(ext8s):
Kirill Batuzova640f032011-07-07 16:37:17 +0400317 return (int8_t)x;
318
Richard Henderson25c4d9c2011-08-17 14:11:46 -0700319 CASE_OP_32_64(ext16s):
Kirill Batuzova640f032011-07-07 16:37:17 +0400320 return (int16_t)x;
321
Richard Henderson25c4d9c2011-08-17 14:11:46 -0700322 CASE_OP_32_64(ext8u):
Kirill Batuzova640f032011-07-07 16:37:17 +0400323 return (uint8_t)x;
324
Richard Henderson25c4d9c2011-08-17 14:11:46 -0700325 CASE_OP_32_64(ext16u):
Kirill Batuzova640f032011-07-07 16:37:17 +0400326 return (uint16_t)x;
327
Aurelien Jarno8bcb5c82015-07-27 12:41:45 +0200328 case INDEX_op_ext_i32_i64:
Kirill Batuzova640f032011-07-07 16:37:17 +0400329 case INDEX_op_ext32s_i64:
330 return (int32_t)x;
331
Aurelien Jarno8bcb5c82015-07-27 12:41:45 +0200332 case INDEX_op_extu_i32_i64:
Richard Henderson609ad702015-07-24 07:16:00 -0700333 case INDEX_op_extrl_i64_i32:
Kirill Batuzova640f032011-07-07 16:37:17 +0400334 case INDEX_op_ext32u_i64:
335 return (uint32_t)x;
Kirill Batuzova640f032011-07-07 16:37:17 +0400336
Richard Henderson609ad702015-07-24 07:16:00 -0700337 case INDEX_op_extrh_i64_i32:
338 return (uint64_t)x >> 32;
339
Richard Henderson03271522013-08-14 14:35:56 -0700340 case INDEX_op_muluh_i32:
341 return ((uint64_t)(uint32_t)x * (uint32_t)y) >> 32;
342 case INDEX_op_mulsh_i32:
343 return ((int64_t)(int32_t)x * (int32_t)y) >> 32;
344
345 case INDEX_op_muluh_i64:
346 mulu64(&l64, &h64, x, y);
347 return h64;
348 case INDEX_op_mulsh_i64:
349 muls64(&l64, &h64, x, y);
350 return h64;
351
Richard Henderson01547f72013-08-14 15:22:46 -0700352 case INDEX_op_div_i32:
353 /* Avoid crashing on divide by zero, otherwise undefined. */
354 return (int32_t)x / ((int32_t)y ? : 1);
355 case INDEX_op_divu_i32:
356 return (uint32_t)x / ((uint32_t)y ? : 1);
357 case INDEX_op_div_i64:
358 return (int64_t)x / ((int64_t)y ? : 1);
359 case INDEX_op_divu_i64:
360 return (uint64_t)x / ((uint64_t)y ? : 1);
361
362 case INDEX_op_rem_i32:
363 return (int32_t)x % ((int32_t)y ? : 1);
364 case INDEX_op_remu_i32:
365 return (uint32_t)x % ((uint32_t)y ? : 1);
366 case INDEX_op_rem_i64:
367 return (int64_t)x % ((int64_t)y ? : 1);
368 case INDEX_op_remu_i64:
369 return (uint64_t)x % ((uint64_t)y ? : 1);
370
Kirill Batuzov53108fb2011-07-07 16:37:14 +0400371 default:
372 fprintf(stderr,
373 "Unrecognized operation %d in do_constant_folding.\n", op);
374 tcg_abort();
375 }
376}
377
Blue Swirlfe0de7a2011-07-30 19:18:32 +0000378static TCGArg do_constant_folding(TCGOpcode op, TCGArg x, TCGArg y)
Kirill Batuzov53108fb2011-07-07 16:37:14 +0400379{
380 TCGArg res = do_constant_folding_2(op, x, y);
Kirill Batuzov53108fb2011-07-07 16:37:14 +0400381 if (op_bits(op) == 32) {
Aurelien Jarno29f3ff82015-07-10 18:03:31 +0200382 res = (int32_t)res;
Kirill Batuzov53108fb2011-07-07 16:37:14 +0400383 }
Kirill Batuzov53108fb2011-07-07 16:37:14 +0400384 return res;
385}
386
Richard Henderson9519da72012-10-02 11:32:26 -0700387static bool do_constant_folding_cond_32(uint32_t x, uint32_t y, TCGCond c)
388{
389 switch (c) {
390 case TCG_COND_EQ:
391 return x == y;
392 case TCG_COND_NE:
393 return x != y;
394 case TCG_COND_LT:
395 return (int32_t)x < (int32_t)y;
396 case TCG_COND_GE:
397 return (int32_t)x >= (int32_t)y;
398 case TCG_COND_LE:
399 return (int32_t)x <= (int32_t)y;
400 case TCG_COND_GT:
401 return (int32_t)x > (int32_t)y;
402 case TCG_COND_LTU:
403 return x < y;
404 case TCG_COND_GEU:
405 return x >= y;
406 case TCG_COND_LEU:
407 return x <= y;
408 case TCG_COND_GTU:
409 return x > y;
410 default:
411 tcg_abort();
412 }
413}
414
415static bool do_constant_folding_cond_64(uint64_t x, uint64_t y, TCGCond c)
416{
417 switch (c) {
418 case TCG_COND_EQ:
419 return x == y;
420 case TCG_COND_NE:
421 return x != y;
422 case TCG_COND_LT:
423 return (int64_t)x < (int64_t)y;
424 case TCG_COND_GE:
425 return (int64_t)x >= (int64_t)y;
426 case TCG_COND_LE:
427 return (int64_t)x <= (int64_t)y;
428 case TCG_COND_GT:
429 return (int64_t)x > (int64_t)y;
430 case TCG_COND_LTU:
431 return x < y;
432 case TCG_COND_GEU:
433 return x >= y;
434 case TCG_COND_LEU:
435 return x <= y;
436 case TCG_COND_GTU:
437 return x > y;
438 default:
439 tcg_abort();
440 }
441}
442
443static bool do_constant_folding_cond_eq(TCGCond c)
444{
445 switch (c) {
446 case TCG_COND_GT:
447 case TCG_COND_LTU:
448 case TCG_COND_LT:
449 case TCG_COND_GTU:
450 case TCG_COND_NE:
451 return 0;
452 case TCG_COND_GE:
453 case TCG_COND_GEU:
454 case TCG_COND_LE:
455 case TCG_COND_LEU:
456 case TCG_COND_EQ:
457 return 1;
458 default:
459 tcg_abort();
460 }
461}
462
Aurelien Jarnob336ceb2012-09-18 19:37:00 +0200463/* Return 2 if the condition can't be simplified, and the result
464 of the condition (0 or 1) if it can */
Aurelien Jarnof8dd19e2012-09-06 16:47:14 +0200465static TCGArg do_constant_folding_cond(TCGOpcode op, TCGArg x,
466 TCGArg y, TCGCond c)
467{
Aurelien Jarnod9c769c2015-07-27 12:41:44 +0200468 if (temp_is_const(x) && temp_is_const(y)) {
Aurelien Jarnob336ceb2012-09-18 19:37:00 +0200469 switch (op_bits(op)) {
470 case 32:
Richard Henderson9519da72012-10-02 11:32:26 -0700471 return do_constant_folding_cond_32(temps[x].val, temps[y].val, c);
Aurelien Jarnob336ceb2012-09-18 19:37:00 +0200472 case 64:
Richard Henderson9519da72012-10-02 11:32:26 -0700473 return do_constant_folding_cond_64(temps[x].val, temps[y].val, c);
474 default:
475 tcg_abort();
Aurelien Jarnof8dd19e2012-09-06 16:47:14 +0200476 }
Aurelien Jarnob336ceb2012-09-18 19:37:00 +0200477 } else if (temps_are_copies(x, y)) {
Richard Henderson9519da72012-10-02 11:32:26 -0700478 return do_constant_folding_cond_eq(c);
Aurelien Jarnod9c769c2015-07-27 12:41:44 +0200479 } else if (temp_is_const(y) && temps[y].val == 0) {
Aurelien Jarnob336ceb2012-09-18 19:37:00 +0200480 switch (c) {
481 case TCG_COND_LTU:
482 return 0;
483 case TCG_COND_GEU:
484 return 1;
485 default:
486 return 2;
487 }
Aurelien Jarnof8dd19e2012-09-06 16:47:14 +0200488 }
Alex Bennée550276a2016-09-30 22:30:55 +0100489 return 2;
Aurelien Jarnof8dd19e2012-09-06 16:47:14 +0200490}
491
Richard Henderson6c4382f2012-10-02 11:32:27 -0700492/* Return 2 if the condition can't be simplified, and the result
493 of the condition (0 or 1) if it can */
494static TCGArg do_constant_folding_cond2(TCGArg *p1, TCGArg *p2, TCGCond c)
495{
496 TCGArg al = p1[0], ah = p1[1];
497 TCGArg bl = p2[0], bh = p2[1];
498
Aurelien Jarnod9c769c2015-07-27 12:41:44 +0200499 if (temp_is_const(bl) && temp_is_const(bh)) {
Richard Henderson6c4382f2012-10-02 11:32:27 -0700500 uint64_t b = ((uint64_t)temps[bh].val << 32) | (uint32_t)temps[bl].val;
501
Aurelien Jarnod9c769c2015-07-27 12:41:44 +0200502 if (temp_is_const(al) && temp_is_const(ah)) {
Richard Henderson6c4382f2012-10-02 11:32:27 -0700503 uint64_t a;
504 a = ((uint64_t)temps[ah].val << 32) | (uint32_t)temps[al].val;
505 return do_constant_folding_cond_64(a, b, c);
506 }
507 if (b == 0) {
508 switch (c) {
509 case TCG_COND_LTU:
510 return 0;
511 case TCG_COND_GEU:
512 return 1;
513 default:
514 break;
515 }
516 }
517 }
518 if (temps_are_copies(al, bl) && temps_are_copies(ah, bh)) {
519 return do_constant_folding_cond_eq(c);
520 }
521 return 2;
522}
523
Richard Henderson24c9ae42012-10-02 11:32:21 -0700524static bool swap_commutative(TCGArg dest, TCGArg *p1, TCGArg *p2)
525{
526 TCGArg a1 = *p1, a2 = *p2;
527 int sum = 0;
Aurelien Jarnod9c769c2015-07-27 12:41:44 +0200528 sum += temp_is_const(a1);
529 sum -= temp_is_const(a2);
Richard Henderson24c9ae42012-10-02 11:32:21 -0700530
531 /* Prefer the constant in second argument, and then the form
532 op a, a, b, which is better handled on non-RISC hosts. */
533 if (sum > 0 || (sum == 0 && dest == a2)) {
534 *p1 = a2;
535 *p2 = a1;
536 return true;
537 }
538 return false;
539}
540
Richard Henderson0bfcb862012-10-02 11:32:23 -0700541static bool swap_commutative2(TCGArg *p1, TCGArg *p2)
542{
543 int sum = 0;
Aurelien Jarnod9c769c2015-07-27 12:41:44 +0200544 sum += temp_is_const(p1[0]);
545 sum += temp_is_const(p1[1]);
546 sum -= temp_is_const(p2[0]);
547 sum -= temp_is_const(p2[1]);
Richard Henderson0bfcb862012-10-02 11:32:23 -0700548 if (sum > 0) {
549 TCGArg t;
550 t = p1[0], p1[0] = p2[0], p2[0] = t;
551 t = p1[1], p1[1] = p2[1], p2[1] = t;
552 return true;
553 }
554 return false;
555}
556
Kirill Batuzov22613af2011-07-07 16:37:13 +0400557/* Propagate constants and copies, fold constant expressions. */
Aurelien Jarno36e60ef2015-06-04 21:53:27 +0200558void tcg_optimize(TCGContext *s)
Kirill Batuzov8f2e8c02011-07-07 16:37:12 +0400559{
Richard Hendersonc45cb8b2014-09-19 13:49:15 -0700560 int oi, oi_next, nb_temps, nb_globals;
Richard Hendersonacd93702016-12-08 12:28:42 -0800561 TCGOp *prev_mb = NULL;
Richard Henderson5d8f5362012-09-21 10:13:38 -0700562
Kirill Batuzov22613af2011-07-07 16:37:13 +0400563 /* Array VALS has an element for each temp.
564 If this temp holds a constant then its value is kept in VALS' element.
Aurelien Jarnoe590d4e2012-09-11 12:31:21 +0200565 If this temp is a copy of other ones then the other copies are
566 available through the doubly linked circular list. */
Kirill Batuzov8f2e8c02011-07-07 16:37:12 +0400567
568 nb_temps = s->nb_temps;
569 nb_globals = s->nb_globals;
Paolo Bonzinid193a142013-01-11 15:42:51 -0800570 reset_all_temps(nb_temps);
Kirill Batuzov8f2e8c02011-07-07 16:37:12 +0400571
Richard Hendersondcb8e752016-06-22 19:42:31 -0700572 for (oi = s->gen_op_buf[0].next; oi != 0; oi = oi_next) {
Richard Henderson24666ba2014-05-22 11:14:10 -0700573 tcg_target_ulong mask, partmask, affected;
Richard Hendersonc45cb8b2014-09-19 13:49:15 -0700574 int nb_oargs, nb_iargs, i;
Richard Hendersoncf066672014-03-22 20:06:52 -0700575 TCGArg tmp;
576
Richard Hendersonc45cb8b2014-09-19 13:49:15 -0700577 TCGOp * const op = &s->gen_op_buf[oi];
Richard Hendersonc45cb8b2014-09-19 13:49:15 -0700578 TCGOpcode opc = op->opc;
579 const TCGOpDef *def = &tcg_op_defs[opc];
580
581 oi_next = op->next;
Aurelien Jarno1208d7d2015-07-27 12:41:44 +0200582
583 /* Count the arguments, and initialize the temps that are
584 going to be used */
Richard Hendersonc45cb8b2014-09-19 13:49:15 -0700585 if (opc == INDEX_op_call) {
586 nb_oargs = op->callo;
587 nb_iargs = op->calli;
Aurelien Jarno1208d7d2015-07-27 12:41:44 +0200588 for (i = 0; i < nb_oargs + nb_iargs; i++) {
Richard Hendersonacd93702016-12-08 12:28:42 -0800589 tmp = op->args[i];
Aurelien Jarno1208d7d2015-07-27 12:41:44 +0200590 if (tmp != TCG_CALL_DUMMY_ARG) {
591 init_temp_info(tmp);
592 }
593 }
Aurelien Jarno1ff8c542012-09-11 16:18:49 +0200594 } else {
Richard Hendersoncf066672014-03-22 20:06:52 -0700595 nb_oargs = def->nb_oargs;
596 nb_iargs = def->nb_iargs;
Aurelien Jarno1208d7d2015-07-27 12:41:44 +0200597 for (i = 0; i < nb_oargs + nb_iargs; i++) {
Richard Hendersonacd93702016-12-08 12:28:42 -0800598 init_temp_info(op->args[i]);
Aurelien Jarno1208d7d2015-07-27 12:41:44 +0200599 }
Richard Hendersoncf066672014-03-22 20:06:52 -0700600 }
601
602 /* Do copy propagation */
603 for (i = nb_oargs; i < nb_oargs + nb_iargs; i++) {
Richard Hendersonacd93702016-12-08 12:28:42 -0800604 if (temp_is_copy(op->args[i])) {
605 op->args[i] = find_better_copy(s, op->args[i]);
Kirill Batuzov22613af2011-07-07 16:37:13 +0400606 }
607 }
608
Kirill Batuzov53108fb2011-07-07 16:37:14 +0400609 /* For commutative operations make constant second argument */
Richard Hendersonc45cb8b2014-09-19 13:49:15 -0700610 switch (opc) {
Kirill Batuzov53108fb2011-07-07 16:37:14 +0400611 CASE_OP_32_64(add):
612 CASE_OP_32_64(mul):
Kirill Batuzov9a810902011-07-07 16:37:15 +0400613 CASE_OP_32_64(and):
614 CASE_OP_32_64(or):
615 CASE_OP_32_64(xor):
Richard Hendersoncb25c802011-08-17 14:11:47 -0700616 CASE_OP_32_64(eqv):
617 CASE_OP_32_64(nand):
618 CASE_OP_32_64(nor):
Richard Henderson03271522013-08-14 14:35:56 -0700619 CASE_OP_32_64(muluh):
620 CASE_OP_32_64(mulsh):
Richard Hendersonacd93702016-12-08 12:28:42 -0800621 swap_commutative(op->args[0], &op->args[1], &op->args[2]);
Kirill Batuzov53108fb2011-07-07 16:37:14 +0400622 break;
Aurelien Jarno65a7cce2012-09-06 16:47:14 +0200623 CASE_OP_32_64(brcond):
Richard Hendersonacd93702016-12-08 12:28:42 -0800624 if (swap_commutative(-1, &op->args[0], &op->args[1])) {
625 op->args[2] = tcg_swap_cond(op->args[2]);
Aurelien Jarno65a7cce2012-09-06 16:47:14 +0200626 }
627 break;
628 CASE_OP_32_64(setcond):
Richard Hendersonacd93702016-12-08 12:28:42 -0800629 if (swap_commutative(op->args[0], &op->args[1], &op->args[2])) {
630 op->args[3] = tcg_swap_cond(op->args[3]);
Aurelien Jarno65a7cce2012-09-06 16:47:14 +0200631 }
632 break;
Richard Hendersonfa01a202012-09-21 10:13:37 -0700633 CASE_OP_32_64(movcond):
Richard Hendersonacd93702016-12-08 12:28:42 -0800634 if (swap_commutative(-1, &op->args[1], &op->args[2])) {
635 op->args[5] = tcg_swap_cond(op->args[5]);
Richard Hendersonfa01a202012-09-21 10:13:37 -0700636 }
Richard Henderson5d8f5362012-09-21 10:13:38 -0700637 /* For movcond, we canonicalize the "false" input reg to match
638 the destination reg so that the tcg backend can implement
639 a "move if true" operation. */
Richard Hendersonacd93702016-12-08 12:28:42 -0800640 if (swap_commutative(op->args[0], &op->args[4], &op->args[3])) {
641 op->args[5] = tcg_invert_cond(op->args[5]);
Richard Henderson5d8f5362012-09-21 10:13:38 -0700642 }
Richard Henderson1e484e62012-10-02 11:32:22 -0700643 break;
Richard Hendersond7156f72013-02-19 23:51:52 -0800644 CASE_OP_32_64(add2):
Richard Hendersonacd93702016-12-08 12:28:42 -0800645 swap_commutative(op->args[0], &op->args[2], &op->args[4]);
646 swap_commutative(op->args[1], &op->args[3], &op->args[5]);
Richard Henderson1e484e62012-10-02 11:32:22 -0700647 break;
Richard Hendersond7156f72013-02-19 23:51:52 -0800648 CASE_OP_32_64(mulu2):
Richard Henderson4d3203f2013-02-19 23:51:53 -0800649 CASE_OP_32_64(muls2):
Richard Hendersonacd93702016-12-08 12:28:42 -0800650 swap_commutative(op->args[0], &op->args[2], &op->args[3]);
Richard Henderson14149682012-10-02 11:32:30 -0700651 break;
Richard Henderson0bfcb862012-10-02 11:32:23 -0700652 case INDEX_op_brcond2_i32:
Richard Hendersonacd93702016-12-08 12:28:42 -0800653 if (swap_commutative2(&op->args[0], &op->args[2])) {
654 op->args[4] = tcg_swap_cond(op->args[4]);
Richard Henderson0bfcb862012-10-02 11:32:23 -0700655 }
656 break;
657 case INDEX_op_setcond2_i32:
Richard Hendersonacd93702016-12-08 12:28:42 -0800658 if (swap_commutative2(&op->args[1], &op->args[3])) {
659 op->args[5] = tcg_swap_cond(op->args[5]);
Richard Henderson0bfcb862012-10-02 11:32:23 -0700660 }
661 break;
Kirill Batuzov53108fb2011-07-07 16:37:14 +0400662 default:
663 break;
664 }
665
Richard Henderson2d497542013-03-21 09:13:33 -0700666 /* Simplify expressions for "shift/rot r, 0, a => movi r, 0",
667 and "sub r, 0, a => neg r, a" case. */
Richard Hendersonc45cb8b2014-09-19 13:49:15 -0700668 switch (opc) {
Aurelien Jarno01ee5282012-09-06 16:47:14 +0200669 CASE_OP_32_64(shl):
670 CASE_OP_32_64(shr):
671 CASE_OP_32_64(sar):
672 CASE_OP_32_64(rotl):
673 CASE_OP_32_64(rotr):
Richard Hendersonacd93702016-12-08 12:28:42 -0800674 if (temp_is_const(op->args[1]) && temps[op->args[1]].val == 0) {
675 tcg_opt_gen_movi(s, op, op->args[0], 0);
Aurelien Jarno01ee5282012-09-06 16:47:14 +0200676 continue;
677 }
678 break;
Richard Henderson2d497542013-03-21 09:13:33 -0700679 CASE_OP_32_64(sub):
680 {
681 TCGOpcode neg_op;
682 bool have_neg;
683
Richard Hendersonacd93702016-12-08 12:28:42 -0800684 if (temp_is_const(op->args[2])) {
Richard Henderson2d497542013-03-21 09:13:33 -0700685 /* Proceed with possible constant folding. */
686 break;
687 }
Richard Hendersonc45cb8b2014-09-19 13:49:15 -0700688 if (opc == INDEX_op_sub_i32) {
Richard Henderson2d497542013-03-21 09:13:33 -0700689 neg_op = INDEX_op_neg_i32;
690 have_neg = TCG_TARGET_HAS_neg_i32;
691 } else {
692 neg_op = INDEX_op_neg_i64;
693 have_neg = TCG_TARGET_HAS_neg_i64;
694 }
695 if (!have_neg) {
696 break;
697 }
Richard Hendersonacd93702016-12-08 12:28:42 -0800698 if (temp_is_const(op->args[1])
699 && temps[op->args[1]].val == 0) {
Richard Hendersonc45cb8b2014-09-19 13:49:15 -0700700 op->opc = neg_op;
Richard Hendersonacd93702016-12-08 12:28:42 -0800701 reset_temp(op->args[0]);
702 op->args[1] = op->args[2];
Richard Henderson2d497542013-03-21 09:13:33 -0700703 continue;
704 }
705 }
706 break;
Richard Hendersone201b562014-01-28 13:15:38 -0800707 CASE_OP_32_64(xor):
708 CASE_OP_32_64(nand):
Richard Hendersonacd93702016-12-08 12:28:42 -0800709 if (!temp_is_const(op->args[1])
710 && temp_is_const(op->args[2])
711 && temps[op->args[2]].val == -1) {
Richard Hendersone201b562014-01-28 13:15:38 -0800712 i = 1;
713 goto try_not;
714 }
715 break;
716 CASE_OP_32_64(nor):
Richard Hendersonacd93702016-12-08 12:28:42 -0800717 if (!temp_is_const(op->args[1])
718 && temp_is_const(op->args[2])
719 && temps[op->args[2]].val == 0) {
Richard Hendersone201b562014-01-28 13:15:38 -0800720 i = 1;
721 goto try_not;
722 }
723 break;
724 CASE_OP_32_64(andc):
Richard Hendersonacd93702016-12-08 12:28:42 -0800725 if (!temp_is_const(op->args[2])
726 && temp_is_const(op->args[1])
727 && temps[op->args[1]].val == -1) {
Richard Hendersone201b562014-01-28 13:15:38 -0800728 i = 2;
729 goto try_not;
730 }
731 break;
732 CASE_OP_32_64(orc):
733 CASE_OP_32_64(eqv):
Richard Hendersonacd93702016-12-08 12:28:42 -0800734 if (!temp_is_const(op->args[2])
735 && temp_is_const(op->args[1])
736 && temps[op->args[1]].val == 0) {
Richard Hendersone201b562014-01-28 13:15:38 -0800737 i = 2;
738 goto try_not;
739 }
740 break;
741 try_not:
742 {
743 TCGOpcode not_op;
744 bool have_not;
745
746 if (def->flags & TCG_OPF_64BIT) {
747 not_op = INDEX_op_not_i64;
748 have_not = TCG_TARGET_HAS_not_i64;
749 } else {
750 not_op = INDEX_op_not_i32;
751 have_not = TCG_TARGET_HAS_not_i32;
752 }
753 if (!have_not) {
754 break;
755 }
Richard Hendersonc45cb8b2014-09-19 13:49:15 -0700756 op->opc = not_op;
Richard Hendersonacd93702016-12-08 12:28:42 -0800757 reset_temp(op->args[0]);
758 op->args[1] = op->args[i];
Richard Hendersone201b562014-01-28 13:15:38 -0800759 continue;
760 }
Aurelien Jarno01ee5282012-09-06 16:47:14 +0200761 default:
762 break;
763 }
764
Richard Henderson464a1442014-01-31 07:42:11 -0600765 /* Simplify expression for "op r, a, const => mov r, a" cases */
Richard Hendersonc45cb8b2014-09-19 13:49:15 -0700766 switch (opc) {
Kirill Batuzov53108fb2011-07-07 16:37:14 +0400767 CASE_OP_32_64(add):
768 CASE_OP_32_64(sub):
Kirill Batuzov55c09752011-07-07 16:37:16 +0400769 CASE_OP_32_64(shl):
770 CASE_OP_32_64(shr):
771 CASE_OP_32_64(sar):
Richard Henderson25c4d9c2011-08-17 14:11:46 -0700772 CASE_OP_32_64(rotl):
773 CASE_OP_32_64(rotr):
Aurelien Jarno38ee1882012-09-06 16:47:14 +0200774 CASE_OP_32_64(or):
775 CASE_OP_32_64(xor):
Richard Henderson464a1442014-01-31 07:42:11 -0600776 CASE_OP_32_64(andc):
Richard Hendersonacd93702016-12-08 12:28:42 -0800777 if (!temp_is_const(op->args[1])
778 && temp_is_const(op->args[2])
779 && temps[op->args[2]].val == 0) {
780 tcg_opt_gen_mov(s, op, op->args[0], op->args[1]);
Aurelien Jarno97a79eb2015-06-05 11:19:18 +0200781 continue;
Kirill Batuzov53108fb2011-07-07 16:37:14 +0400782 }
783 break;
Richard Henderson464a1442014-01-31 07:42:11 -0600784 CASE_OP_32_64(and):
785 CASE_OP_32_64(orc):
786 CASE_OP_32_64(eqv):
Richard Hendersonacd93702016-12-08 12:28:42 -0800787 if (!temp_is_const(op->args[1])
788 && temp_is_const(op->args[2])
789 && temps[op->args[2]].val == -1) {
790 tcg_opt_gen_mov(s, op, op->args[0], op->args[1]);
Aurelien Jarno97a79eb2015-06-05 11:19:18 +0200791 continue;
Richard Henderson464a1442014-01-31 07:42:11 -0600792 }
793 break;
Aurelien Jarno56e49432012-09-06 16:47:13 +0200794 default:
795 break;
796 }
797
Aurelien Jarno30312442013-09-03 08:27:38 +0200798 /* Simplify using known-zero bits. Currently only ops with a single
799 output argument is supported. */
Paolo Bonzini3a9d8b12013-01-11 15:42:52 -0800800 mask = -1;
Paolo Bonzini633f6502013-01-11 15:42:53 -0800801 affected = -1;
Richard Hendersonc45cb8b2014-09-19 13:49:15 -0700802 switch (opc) {
Paolo Bonzini3a9d8b12013-01-11 15:42:52 -0800803 CASE_OP_32_64(ext8s):
Richard Hendersonacd93702016-12-08 12:28:42 -0800804 if ((temps[op->args[1]].mask & 0x80) != 0) {
Paolo Bonzini3a9d8b12013-01-11 15:42:52 -0800805 break;
806 }
807 CASE_OP_32_64(ext8u):
808 mask = 0xff;
809 goto and_const;
810 CASE_OP_32_64(ext16s):
Richard Hendersonacd93702016-12-08 12:28:42 -0800811 if ((temps[op->args[1]].mask & 0x8000) != 0) {
Paolo Bonzini3a9d8b12013-01-11 15:42:52 -0800812 break;
813 }
814 CASE_OP_32_64(ext16u):
815 mask = 0xffff;
816 goto and_const;
817 case INDEX_op_ext32s_i64:
Richard Hendersonacd93702016-12-08 12:28:42 -0800818 if ((temps[op->args[1]].mask & 0x80000000) != 0) {
Paolo Bonzini3a9d8b12013-01-11 15:42:52 -0800819 break;
820 }
821 case INDEX_op_ext32u_i64:
822 mask = 0xffffffffU;
823 goto and_const;
824
825 CASE_OP_32_64(and):
Richard Hendersonacd93702016-12-08 12:28:42 -0800826 mask = temps[op->args[2]].mask;
827 if (temp_is_const(op->args[2])) {
Paolo Bonzini3a9d8b12013-01-11 15:42:52 -0800828 and_const:
Richard Hendersonacd93702016-12-08 12:28:42 -0800829 affected = temps[op->args[1]].mask & ~mask;
Paolo Bonzini3a9d8b12013-01-11 15:42:52 -0800830 }
Richard Hendersonacd93702016-12-08 12:28:42 -0800831 mask = temps[op->args[1]].mask & mask;
Paolo Bonzini3a9d8b12013-01-11 15:42:52 -0800832 break;
833
Aurelien Jarno8bcb5c82015-07-27 12:41:45 +0200834 case INDEX_op_ext_i32_i64:
Richard Hendersonacd93702016-12-08 12:28:42 -0800835 if ((temps[op->args[1]].mask & 0x80000000) != 0) {
Aurelien Jarno8bcb5c82015-07-27 12:41:45 +0200836 break;
837 }
838 case INDEX_op_extu_i32_i64:
839 /* We do not compute affected as it is a size changing op. */
Richard Hendersonacd93702016-12-08 12:28:42 -0800840 mask = (uint32_t)temps[op->args[1]].mask;
Aurelien Jarno8bcb5c82015-07-27 12:41:45 +0200841 break;
842
Richard Henderson23ec69ed2014-01-28 12:03:24 -0800843 CASE_OP_32_64(andc):
844 /* Known-zeros does not imply known-ones. Therefore unless
Richard Hendersonacd93702016-12-08 12:28:42 -0800845 op->args[2] is constant, we can't infer anything from it. */
846 if (temp_is_const(op->args[2])) {
847 mask = ~temps[op->args[2]].mask;
Richard Henderson23ec69ed2014-01-28 12:03:24 -0800848 goto and_const;
849 }
Richard Hendersonacd93702016-12-08 12:28:42 -0800850 /* But we certainly know nothing outside op->args[1] may be set. */
851 mask = temps[op->args[1]].mask;
Richard Henderson23ec69ed2014-01-28 12:03:24 -0800852 break;
853
Aurelien Jarnoe46b2252013-09-03 08:27:38 +0200854 case INDEX_op_sar_i32:
Richard Hendersonacd93702016-12-08 12:28:42 -0800855 if (temp_is_const(op->args[2])) {
856 tmp = temps[op->args[2]].val & 31;
857 mask = (int32_t)temps[op->args[1]].mask >> tmp;
Aurelien Jarnoe46b2252013-09-03 08:27:38 +0200858 }
859 break;
860 case INDEX_op_sar_i64:
Richard Hendersonacd93702016-12-08 12:28:42 -0800861 if (temp_is_const(op->args[2])) {
862 tmp = temps[op->args[2]].val & 63;
863 mask = (int64_t)temps[op->args[1]].mask >> tmp;
Paolo Bonzini3a9d8b12013-01-11 15:42:52 -0800864 }
865 break;
866
Aurelien Jarnoe46b2252013-09-03 08:27:38 +0200867 case INDEX_op_shr_i32:
Richard Hendersonacd93702016-12-08 12:28:42 -0800868 if (temp_is_const(op->args[2])) {
869 tmp = temps[op->args[2]].val & 31;
870 mask = (uint32_t)temps[op->args[1]].mask >> tmp;
Aurelien Jarnoe46b2252013-09-03 08:27:38 +0200871 }
872 break;
873 case INDEX_op_shr_i64:
Richard Hendersonacd93702016-12-08 12:28:42 -0800874 if (temp_is_const(op->args[2])) {
875 tmp = temps[op->args[2]].val & 63;
876 mask = (uint64_t)temps[op->args[1]].mask >> tmp;
Paolo Bonzini3a9d8b12013-01-11 15:42:52 -0800877 }
878 break;
879
Richard Henderson609ad702015-07-24 07:16:00 -0700880 case INDEX_op_extrl_i64_i32:
Richard Hendersonacd93702016-12-08 12:28:42 -0800881 mask = (uint32_t)temps[op->args[1]].mask;
Richard Henderson609ad702015-07-24 07:16:00 -0700882 break;
883 case INDEX_op_extrh_i64_i32:
Richard Hendersonacd93702016-12-08 12:28:42 -0800884 mask = (uint64_t)temps[op->args[1]].mask >> 32;
Richard Henderson4bb7a412013-09-09 17:03:24 -0700885 break;
886
Paolo Bonzini3a9d8b12013-01-11 15:42:52 -0800887 CASE_OP_32_64(shl):
Richard Hendersonacd93702016-12-08 12:28:42 -0800888 if (temp_is_const(op->args[2])) {
889 tmp = temps[op->args[2]].val & (TCG_TARGET_REG_BITS - 1);
890 mask = temps[op->args[1]].mask << tmp;
Paolo Bonzini3a9d8b12013-01-11 15:42:52 -0800891 }
892 break;
893
894 CASE_OP_32_64(neg):
895 /* Set to 1 all bits to the left of the rightmost. */
Richard Hendersonacd93702016-12-08 12:28:42 -0800896 mask = -(temps[op->args[1]].mask & -temps[op->args[1]].mask);
Paolo Bonzini3a9d8b12013-01-11 15:42:52 -0800897 break;
898
899 CASE_OP_32_64(deposit):
Richard Hendersonacd93702016-12-08 12:28:42 -0800900 mask = deposit64(temps[op->args[1]].mask, op->args[3],
901 op->args[4], temps[op->args[2]].mask);
Paolo Bonzini3a9d8b12013-01-11 15:42:52 -0800902 break;
903
Richard Henderson7ec8bab2016-10-14 12:04:32 -0500904 CASE_OP_32_64(extract):
Richard Hendersonacd93702016-12-08 12:28:42 -0800905 mask = extract64(temps[op->args[1]].mask, op->args[2], op->args[3]);
906 if (op->args[2] == 0) {
907 affected = temps[op->args[1]].mask & ~mask;
Richard Henderson7ec8bab2016-10-14 12:04:32 -0500908 }
909 break;
910 CASE_OP_32_64(sextract):
Richard Hendersonacd93702016-12-08 12:28:42 -0800911 mask = sextract64(temps[op->args[1]].mask,
912 op->args[2], op->args[3]);
913 if (op->args[2] == 0 && (tcg_target_long)mask >= 0) {
914 affected = temps[op->args[1]].mask & ~mask;
Richard Henderson7ec8bab2016-10-14 12:04:32 -0500915 }
916 break;
917
Paolo Bonzini3a9d8b12013-01-11 15:42:52 -0800918 CASE_OP_32_64(or):
919 CASE_OP_32_64(xor):
Richard Hendersonacd93702016-12-08 12:28:42 -0800920 mask = temps[op->args[1]].mask | temps[op->args[2]].mask;
Paolo Bonzini3a9d8b12013-01-11 15:42:52 -0800921 break;
922
Richard Henderson0e28d002016-11-16 09:23:28 +0100923 case INDEX_op_clz_i32:
924 case INDEX_op_ctz_i32:
Richard Hendersonacd93702016-12-08 12:28:42 -0800925 mask = temps[op->args[2]].mask | 31;
Richard Henderson0e28d002016-11-16 09:23:28 +0100926 break;
927
928 case INDEX_op_clz_i64:
929 case INDEX_op_ctz_i64:
Richard Hendersonacd93702016-12-08 12:28:42 -0800930 mask = temps[op->args[2]].mask | 63;
Richard Henderson0e28d002016-11-16 09:23:28 +0100931 break;
932
Richard Hendersona768e4e2016-11-21 11:13:39 +0100933 case INDEX_op_ctpop_i32:
934 mask = 32 | 31;
935 break;
936 case INDEX_op_ctpop_i64:
937 mask = 64 | 63;
938 break;
939
Paolo Bonzini3a9d8b12013-01-11 15:42:52 -0800940 CASE_OP_32_64(setcond):
Richard Hendersona7635512014-04-23 22:18:30 -0700941 case INDEX_op_setcond2_i32:
Paolo Bonzini3a9d8b12013-01-11 15:42:52 -0800942 mask = 1;
943 break;
944
945 CASE_OP_32_64(movcond):
Richard Hendersonacd93702016-12-08 12:28:42 -0800946 mask = temps[op->args[3]].mask | temps[op->args[4]].mask;
Paolo Bonzini3a9d8b12013-01-11 15:42:52 -0800947 break;
948
Aurelien Jarnoc8d70272013-09-03 08:27:39 +0200949 CASE_OP_32_64(ld8u):
Aurelien Jarnoc8d70272013-09-03 08:27:39 +0200950 mask = 0xff;
951 break;
952 CASE_OP_32_64(ld16u):
Aurelien Jarnoc8d70272013-09-03 08:27:39 +0200953 mask = 0xffff;
954 break;
955 case INDEX_op_ld32u_i64:
Aurelien Jarnoc8d70272013-09-03 08:27:39 +0200956 mask = 0xffffffffu;
957 break;
958
959 CASE_OP_32_64(qemu_ld):
960 {
Richard Hendersonacd93702016-12-08 12:28:42 -0800961 TCGMemOpIdx oi = op->args[nb_oargs + nb_iargs];
Richard Henderson59227d52015-05-12 11:51:44 -0700962 TCGMemOp mop = get_memop(oi);
Aurelien Jarnoc8d70272013-09-03 08:27:39 +0200963 if (!(mop & MO_SIGN)) {
964 mask = (2ULL << ((8 << (mop & MO_SIZE)) - 1)) - 1;
965 }
966 }
967 break;
968
Paolo Bonzini3a9d8b12013-01-11 15:42:52 -0800969 default:
970 break;
971 }
972
Richard Hendersonbc8d6882014-06-08 18:24:14 -0700973 /* 32-bit ops generate 32-bit results. For the result is zero test
974 below, we can ignore high bits, but for further optimizations we
975 need to record that the high bits contain garbage. */
Richard Henderson24666ba2014-05-22 11:14:10 -0700976 partmask = mask;
Richard Hendersonbc8d6882014-06-08 18:24:14 -0700977 if (!(def->flags & TCG_OPF_64BIT)) {
Richard Henderson24666ba2014-05-22 11:14:10 -0700978 mask |= ~(tcg_target_ulong)0xffffffffu;
979 partmask &= 0xffffffffu;
980 affected &= 0xffffffffu;
Aurelien Jarnof096dc92013-09-03 08:27:38 +0200981 }
982
Richard Henderson24666ba2014-05-22 11:14:10 -0700983 if (partmask == 0) {
Aurelien Jarnoeabb7b92016-04-21 10:48:49 +0200984 tcg_debug_assert(nb_oargs == 1);
Richard Hendersonacd93702016-12-08 12:28:42 -0800985 tcg_opt_gen_movi(s, op, op->args[0], 0);
Paolo Bonzini633f6502013-01-11 15:42:53 -0800986 continue;
987 }
988 if (affected == 0) {
Aurelien Jarnoeabb7b92016-04-21 10:48:49 +0200989 tcg_debug_assert(nb_oargs == 1);
Richard Hendersonacd93702016-12-08 12:28:42 -0800990 tcg_opt_gen_mov(s, op, op->args[0], op->args[1]);
Paolo Bonzini633f6502013-01-11 15:42:53 -0800991 continue;
992 }
993
Aurelien Jarno56e49432012-09-06 16:47:13 +0200994 /* Simplify expression for "op r, a, 0 => movi r, 0" cases */
Richard Hendersonc45cb8b2014-09-19 13:49:15 -0700995 switch (opc) {
Aurelien Jarno61251c02012-09-06 16:47:14 +0200996 CASE_OP_32_64(and):
Kirill Batuzov53108fb2011-07-07 16:37:14 +0400997 CASE_OP_32_64(mul):
Richard Henderson03271522013-08-14 14:35:56 -0700998 CASE_OP_32_64(muluh):
999 CASE_OP_32_64(mulsh):
Richard Hendersonacd93702016-12-08 12:28:42 -08001000 if ((temp_is_const(op->args[2]) && temps[op->args[2]].val == 0)) {
1001 tcg_opt_gen_movi(s, op, op->args[0], 0);
Kirill Batuzov53108fb2011-07-07 16:37:14 +04001002 continue;
1003 }
1004 break;
Aurelien Jarno56e49432012-09-06 16:47:13 +02001005 default:
1006 break;
1007 }
1008
1009 /* Simplify expression for "op r, a, a => mov r, a" cases */
Richard Hendersonc45cb8b2014-09-19 13:49:15 -07001010 switch (opc) {
Kirill Batuzov9a810902011-07-07 16:37:15 +04001011 CASE_OP_32_64(or):
1012 CASE_OP_32_64(and):
Richard Hendersonacd93702016-12-08 12:28:42 -08001013 if (temps_are_copies(op->args[1], op->args[2])) {
1014 tcg_opt_gen_mov(s, op, op->args[0], op->args[1]);
Kirill Batuzov9a810902011-07-07 16:37:15 +04001015 continue;
1016 }
1017 break;
Blue Swirlfe0de7a2011-07-30 19:18:32 +00001018 default:
1019 break;
Kirill Batuzov53108fb2011-07-07 16:37:14 +04001020 }
1021
Aurelien Jarno3c941932012-09-18 19:12:36 +02001022 /* Simplify expression for "op r, a, a => movi r, 0" cases */
Richard Hendersonc45cb8b2014-09-19 13:49:15 -07001023 switch (opc) {
Richard Hendersone64e9582014-01-28 13:26:17 -08001024 CASE_OP_32_64(andc):
Aurelien Jarno3c941932012-09-18 19:12:36 +02001025 CASE_OP_32_64(sub):
1026 CASE_OP_32_64(xor):
Richard Hendersonacd93702016-12-08 12:28:42 -08001027 if (temps_are_copies(op->args[1], op->args[2])) {
1028 tcg_opt_gen_movi(s, op, op->args[0], 0);
Aurelien Jarno3c941932012-09-18 19:12:36 +02001029 continue;
1030 }
1031 break;
1032 default:
1033 break;
1034 }
1035
Kirill Batuzov22613af2011-07-07 16:37:13 +04001036 /* Propagate constants through copy operations and do constant
1037 folding. Constants will be substituted to arguments by register
1038 allocator where needed and possible. Also detect copies. */
Richard Hendersonc45cb8b2014-09-19 13:49:15 -07001039 switch (opc) {
Kirill Batuzov22613af2011-07-07 16:37:13 +04001040 CASE_OP_32_64(mov):
Richard Hendersonacd93702016-12-08 12:28:42 -08001041 tcg_opt_gen_mov(s, op, op->args[0], op->args[1]);
Aurelien Jarno97a79eb2015-06-05 11:19:18 +02001042 break;
Kirill Batuzov22613af2011-07-07 16:37:13 +04001043 CASE_OP_32_64(movi):
Richard Hendersonacd93702016-12-08 12:28:42 -08001044 tcg_opt_gen_movi(s, op, op->args[0], op->args[1]);
Kirill Batuzov22613af2011-07-07 16:37:13 +04001045 break;
Richard Henderson6e14e912012-10-02 11:32:24 -07001046
Kirill Batuzova640f032011-07-07 16:37:17 +04001047 CASE_OP_32_64(not):
Richard Hendersoncb25c802011-08-17 14:11:47 -07001048 CASE_OP_32_64(neg):
Richard Henderson25c4d9c2011-08-17 14:11:46 -07001049 CASE_OP_32_64(ext8s):
1050 CASE_OP_32_64(ext8u):
1051 CASE_OP_32_64(ext16s):
1052 CASE_OP_32_64(ext16u):
Richard Hendersona768e4e2016-11-21 11:13:39 +01001053 CASE_OP_32_64(ctpop):
Kirill Batuzova640f032011-07-07 16:37:17 +04001054 case INDEX_op_ext32s_i64:
1055 case INDEX_op_ext32u_i64:
Aurelien Jarno8bcb5c82015-07-27 12:41:45 +02001056 case INDEX_op_ext_i32_i64:
1057 case INDEX_op_extu_i32_i64:
Richard Henderson609ad702015-07-24 07:16:00 -07001058 case INDEX_op_extrl_i64_i32:
1059 case INDEX_op_extrh_i64_i32:
Richard Hendersonacd93702016-12-08 12:28:42 -08001060 if (temp_is_const(op->args[1])) {
1061 tmp = do_constant_folding(opc, temps[op->args[1]].val, 0);
1062 tcg_opt_gen_movi(s, op, op->args[0], tmp);
Richard Henderson6e14e912012-10-02 11:32:24 -07001063 break;
Kirill Batuzova640f032011-07-07 16:37:17 +04001064 }
Richard Henderson6e14e912012-10-02 11:32:24 -07001065 goto do_default;
1066
Kirill Batuzov53108fb2011-07-07 16:37:14 +04001067 CASE_OP_32_64(add):
1068 CASE_OP_32_64(sub):
1069 CASE_OP_32_64(mul):
Kirill Batuzov9a810902011-07-07 16:37:15 +04001070 CASE_OP_32_64(or):
1071 CASE_OP_32_64(and):
1072 CASE_OP_32_64(xor):
Kirill Batuzov55c09752011-07-07 16:37:16 +04001073 CASE_OP_32_64(shl):
1074 CASE_OP_32_64(shr):
1075 CASE_OP_32_64(sar):
Richard Henderson25c4d9c2011-08-17 14:11:46 -07001076 CASE_OP_32_64(rotl):
1077 CASE_OP_32_64(rotr):
Richard Hendersoncb25c802011-08-17 14:11:47 -07001078 CASE_OP_32_64(andc):
1079 CASE_OP_32_64(orc):
1080 CASE_OP_32_64(eqv):
1081 CASE_OP_32_64(nand):
1082 CASE_OP_32_64(nor):
Richard Henderson03271522013-08-14 14:35:56 -07001083 CASE_OP_32_64(muluh):
1084 CASE_OP_32_64(mulsh):
Richard Henderson01547f72013-08-14 15:22:46 -07001085 CASE_OP_32_64(div):
1086 CASE_OP_32_64(divu):
1087 CASE_OP_32_64(rem):
1088 CASE_OP_32_64(remu):
Richard Hendersonacd93702016-12-08 12:28:42 -08001089 if (temp_is_const(op->args[1]) && temp_is_const(op->args[2])) {
1090 tmp = do_constant_folding(opc, temps[op->args[1]].val,
1091 temps[op->args[2]].val);
1092 tcg_opt_gen_movi(s, op, op->args[0], tmp);
Richard Henderson6e14e912012-10-02 11:32:24 -07001093 break;
Kirill Batuzov53108fb2011-07-07 16:37:14 +04001094 }
Richard Henderson6e14e912012-10-02 11:32:24 -07001095 goto do_default;
1096
Richard Henderson0e28d002016-11-16 09:23:28 +01001097 CASE_OP_32_64(clz):
1098 CASE_OP_32_64(ctz):
Richard Hendersonacd93702016-12-08 12:28:42 -08001099 if (temp_is_const(op->args[1])) {
1100 TCGArg v = temps[op->args[1]].val;
Richard Henderson0e28d002016-11-16 09:23:28 +01001101 if (v != 0) {
1102 tmp = do_constant_folding(opc, v, 0);
Richard Hendersonacd93702016-12-08 12:28:42 -08001103 tcg_opt_gen_movi(s, op, op->args[0], tmp);
Richard Henderson0e28d002016-11-16 09:23:28 +01001104 } else {
Richard Hendersonacd93702016-12-08 12:28:42 -08001105 tcg_opt_gen_mov(s, op, op->args[0], op->args[2]);
Richard Henderson0e28d002016-11-16 09:23:28 +01001106 }
1107 break;
1108 }
1109 goto do_default;
1110
Aurelien Jarno7ef55fc2012-09-21 11:07:29 +02001111 CASE_OP_32_64(deposit):
Richard Hendersonacd93702016-12-08 12:28:42 -08001112 if (temp_is_const(op->args[1]) && temp_is_const(op->args[2])) {
1113 tmp = deposit64(temps[op->args[1]].val, op->args[3],
1114 op->args[4], temps[op->args[2]].val);
1115 tcg_opt_gen_movi(s, op, op->args[0], tmp);
Richard Henderson6e14e912012-10-02 11:32:24 -07001116 break;
Aurelien Jarno7ef55fc2012-09-21 11:07:29 +02001117 }
Richard Henderson6e14e912012-10-02 11:32:24 -07001118 goto do_default;
1119
Richard Henderson7ec8bab2016-10-14 12:04:32 -05001120 CASE_OP_32_64(extract):
Richard Hendersonacd93702016-12-08 12:28:42 -08001121 if (temp_is_const(op->args[1])) {
1122 tmp = extract64(temps[op->args[1]].val,
1123 op->args[2], op->args[3]);
1124 tcg_opt_gen_movi(s, op, op->args[0], tmp);
Richard Henderson7ec8bab2016-10-14 12:04:32 -05001125 break;
1126 }
1127 goto do_default;
1128
1129 CASE_OP_32_64(sextract):
Richard Hendersonacd93702016-12-08 12:28:42 -08001130 if (temp_is_const(op->args[1])) {
1131 tmp = sextract64(temps[op->args[1]].val,
1132 op->args[2], op->args[3]);
1133 tcg_opt_gen_movi(s, op, op->args[0], tmp);
Richard Henderson7ec8bab2016-10-14 12:04:32 -05001134 break;
1135 }
1136 goto do_default;
1137
Aurelien Jarnof8dd19e2012-09-06 16:47:14 +02001138 CASE_OP_32_64(setcond):
Richard Hendersonacd93702016-12-08 12:28:42 -08001139 tmp = do_constant_folding_cond(opc, op->args[1],
1140 op->args[2], op->args[3]);
Aurelien Jarnob336ceb2012-09-18 19:37:00 +02001141 if (tmp != 2) {
Richard Hendersonacd93702016-12-08 12:28:42 -08001142 tcg_opt_gen_movi(s, op, op->args[0], tmp);
Richard Henderson6e14e912012-10-02 11:32:24 -07001143 break;
Aurelien Jarnof8dd19e2012-09-06 16:47:14 +02001144 }
Richard Henderson6e14e912012-10-02 11:32:24 -07001145 goto do_default;
1146
Aurelien Jarnofbeaa262012-09-06 16:47:14 +02001147 CASE_OP_32_64(brcond):
Richard Hendersonacd93702016-12-08 12:28:42 -08001148 tmp = do_constant_folding_cond(opc, op->args[0],
1149 op->args[1], op->args[2]);
Aurelien Jarnob336ceb2012-09-18 19:37:00 +02001150 if (tmp != 2) {
1151 if (tmp) {
Paolo Bonzinid193a142013-01-11 15:42:51 -08001152 reset_all_temps(nb_temps);
Richard Hendersonc45cb8b2014-09-19 13:49:15 -07001153 op->opc = INDEX_op_br;
Richard Hendersonacd93702016-12-08 12:28:42 -08001154 op->args[0] = op->args[3];
Aurelien Jarnofbeaa262012-09-06 16:47:14 +02001155 } else {
Richard Henderson0c627cd2014-03-30 16:51:54 -07001156 tcg_op_remove(s, op);
Aurelien Jarnofbeaa262012-09-06 16:47:14 +02001157 }
Richard Henderson6e14e912012-10-02 11:32:24 -07001158 break;
Aurelien Jarnofbeaa262012-09-06 16:47:14 +02001159 }
Richard Henderson6e14e912012-10-02 11:32:24 -07001160 goto do_default;
1161
Richard Hendersonfa01a202012-09-21 10:13:37 -07001162 CASE_OP_32_64(movcond):
Richard Hendersonacd93702016-12-08 12:28:42 -08001163 tmp = do_constant_folding_cond(opc, op->args[1],
1164 op->args[2], op->args[5]);
Aurelien Jarnob336ceb2012-09-18 19:37:00 +02001165 if (tmp != 2) {
Richard Hendersonacd93702016-12-08 12:28:42 -08001166 tcg_opt_gen_mov(s, op, op->args[0], op->args[4-tmp]);
Richard Henderson6e14e912012-10-02 11:32:24 -07001167 break;
Richard Hendersonfa01a202012-09-21 10:13:37 -07001168 }
Richard Hendersonacd93702016-12-08 12:28:42 -08001169 if (temp_is_const(op->args[3]) && temp_is_const(op->args[4])) {
1170 tcg_target_ulong tv = temps[op->args[3]].val;
1171 tcg_target_ulong fv = temps[op->args[4]].val;
1172 TCGCond cond = op->args[5];
Richard Henderson333b21b2016-10-23 20:44:32 -07001173 if (fv == 1 && tv == 0) {
1174 cond = tcg_invert_cond(cond);
1175 } else if (!(tv == 1 && fv == 0)) {
1176 goto do_default;
1177 }
Richard Hendersonacd93702016-12-08 12:28:42 -08001178 op->args[3] = cond;
Richard Henderson333b21b2016-10-23 20:44:32 -07001179 op->opc = opc = (opc == INDEX_op_movcond_i32
1180 ? INDEX_op_setcond_i32
1181 : INDEX_op_setcond_i64);
1182 nb_iargs = 2;
1183 }
Richard Henderson6e14e912012-10-02 11:32:24 -07001184 goto do_default;
1185
Richard Henderson212c3282012-10-02 11:32:28 -07001186 case INDEX_op_add2_i32:
1187 case INDEX_op_sub2_i32:
Richard Hendersonacd93702016-12-08 12:28:42 -08001188 if (temp_is_const(op->args[2]) && temp_is_const(op->args[3])
1189 && temp_is_const(op->args[4]) && temp_is_const(op->args[5])) {
1190 uint32_t al = temps[op->args[2]].val;
1191 uint32_t ah = temps[op->args[3]].val;
1192 uint32_t bl = temps[op->args[4]].val;
1193 uint32_t bh = temps[op->args[5]].val;
Richard Henderson212c3282012-10-02 11:32:28 -07001194 uint64_t a = ((uint64_t)ah << 32) | al;
1195 uint64_t b = ((uint64_t)bh << 32) | bl;
1196 TCGArg rl, rh;
Richard Henderson5a184072016-06-23 20:34:33 -07001197 TCGOp *op2 = tcg_op_insert_before(s, op, INDEX_op_movi_i32, 2);
Richard Henderson212c3282012-10-02 11:32:28 -07001198
Richard Hendersonc45cb8b2014-09-19 13:49:15 -07001199 if (opc == INDEX_op_add2_i32) {
Richard Henderson212c3282012-10-02 11:32:28 -07001200 a += b;
1201 } else {
1202 a -= b;
1203 }
1204
Richard Hendersonacd93702016-12-08 12:28:42 -08001205 rl = op->args[0];
1206 rh = op->args[1];
1207 tcg_opt_gen_movi(s, op, rl, (int32_t)a);
1208 tcg_opt_gen_movi(s, op2, rh, (int32_t)(a >> 32));
Richard Hendersonc45cb8b2014-09-19 13:49:15 -07001209
1210 /* We've done all we need to do with the movi. Skip it. */
1211 oi_next = op2->next;
Richard Henderson212c3282012-10-02 11:32:28 -07001212 break;
1213 }
1214 goto do_default;
1215
Richard Henderson14149682012-10-02 11:32:30 -07001216 case INDEX_op_mulu2_i32:
Richard Hendersonacd93702016-12-08 12:28:42 -08001217 if (temp_is_const(op->args[2]) && temp_is_const(op->args[3])) {
1218 uint32_t a = temps[op->args[2]].val;
1219 uint32_t b = temps[op->args[3]].val;
Richard Henderson14149682012-10-02 11:32:30 -07001220 uint64_t r = (uint64_t)a * b;
1221 TCGArg rl, rh;
Richard Henderson5a184072016-06-23 20:34:33 -07001222 TCGOp *op2 = tcg_op_insert_before(s, op, INDEX_op_movi_i32, 2);
Richard Henderson14149682012-10-02 11:32:30 -07001223
Richard Hendersonacd93702016-12-08 12:28:42 -08001224 rl = op->args[0];
1225 rh = op->args[1];
1226 tcg_opt_gen_movi(s, op, rl, (int32_t)r);
1227 tcg_opt_gen_movi(s, op2, rh, (int32_t)(r >> 32));
Richard Hendersonc45cb8b2014-09-19 13:49:15 -07001228
1229 /* We've done all we need to do with the movi. Skip it. */
1230 oi_next = op2->next;
Richard Henderson14149682012-10-02 11:32:30 -07001231 break;
1232 }
1233 goto do_default;
1234
Richard Hendersonbc1473e2012-10-02 11:32:25 -07001235 case INDEX_op_brcond2_i32:
Richard Hendersonacd93702016-12-08 12:28:42 -08001236 tmp = do_constant_folding_cond2(&op->args[0], &op->args[2],
1237 op->args[4]);
Richard Henderson6c4382f2012-10-02 11:32:27 -07001238 if (tmp != 2) {
1239 if (tmp) {
Richard Hendersona7635512014-04-23 22:18:30 -07001240 do_brcond_true:
Paolo Bonzinid193a142013-01-11 15:42:51 -08001241 reset_all_temps(nb_temps);
Richard Hendersonc45cb8b2014-09-19 13:49:15 -07001242 op->opc = INDEX_op_br;
Richard Hendersonacd93702016-12-08 12:28:42 -08001243 op->args[0] = op->args[5];
Richard Henderson6c4382f2012-10-02 11:32:27 -07001244 } else {
Richard Hendersona7635512014-04-23 22:18:30 -07001245 do_brcond_false:
Richard Henderson0c627cd2014-03-30 16:51:54 -07001246 tcg_op_remove(s, op);
Richard Henderson6c4382f2012-10-02 11:32:27 -07001247 }
Richard Hendersonacd93702016-12-08 12:28:42 -08001248 } else if ((op->args[4] == TCG_COND_LT
1249 || op->args[4] == TCG_COND_GE)
1250 && temp_is_const(op->args[2])
1251 && temps[op->args[2]].val == 0
1252 && temp_is_const(op->args[3])
1253 && temps[op->args[3]].val == 0) {
Richard Henderson6c4382f2012-10-02 11:32:27 -07001254 /* Simplify LT/GE comparisons vs zero to a single compare
1255 vs the high word of the input. */
Richard Hendersona7635512014-04-23 22:18:30 -07001256 do_brcond_high:
Paolo Bonzinid193a142013-01-11 15:42:51 -08001257 reset_all_temps(nb_temps);
Richard Hendersonc45cb8b2014-09-19 13:49:15 -07001258 op->opc = INDEX_op_brcond_i32;
Richard Hendersonacd93702016-12-08 12:28:42 -08001259 op->args[0] = op->args[1];
1260 op->args[1] = op->args[3];
1261 op->args[2] = op->args[4];
1262 op->args[3] = op->args[5];
1263 } else if (op->args[4] == TCG_COND_EQ) {
Richard Hendersona7635512014-04-23 22:18:30 -07001264 /* Simplify EQ comparisons where one of the pairs
1265 can be simplified. */
1266 tmp = do_constant_folding_cond(INDEX_op_brcond_i32,
Richard Hendersonacd93702016-12-08 12:28:42 -08001267 op->args[0], op->args[2],
1268 TCG_COND_EQ);
Richard Hendersona7635512014-04-23 22:18:30 -07001269 if (tmp == 0) {
1270 goto do_brcond_false;
1271 } else if (tmp == 1) {
1272 goto do_brcond_high;
1273 }
1274 tmp = do_constant_folding_cond(INDEX_op_brcond_i32,
Richard Hendersonacd93702016-12-08 12:28:42 -08001275 op->args[1], op->args[3],
1276 TCG_COND_EQ);
Richard Hendersona7635512014-04-23 22:18:30 -07001277 if (tmp == 0) {
1278 goto do_brcond_false;
1279 } else if (tmp != 1) {
1280 goto do_default;
1281 }
1282 do_brcond_low:
1283 reset_all_temps(nb_temps);
Richard Hendersonc45cb8b2014-09-19 13:49:15 -07001284 op->opc = INDEX_op_brcond_i32;
Richard Hendersonacd93702016-12-08 12:28:42 -08001285 op->args[1] = op->args[2];
1286 op->args[2] = op->args[4];
1287 op->args[3] = op->args[5];
1288 } else if (op->args[4] == TCG_COND_NE) {
Richard Hendersona7635512014-04-23 22:18:30 -07001289 /* Simplify NE comparisons where one of the pairs
1290 can be simplified. */
1291 tmp = do_constant_folding_cond(INDEX_op_brcond_i32,
Richard Hendersonacd93702016-12-08 12:28:42 -08001292 op->args[0], op->args[2],
1293 TCG_COND_NE);
Richard Hendersona7635512014-04-23 22:18:30 -07001294 if (tmp == 0) {
1295 goto do_brcond_high;
1296 } else if (tmp == 1) {
1297 goto do_brcond_true;
1298 }
1299 tmp = do_constant_folding_cond(INDEX_op_brcond_i32,
Richard Hendersonacd93702016-12-08 12:28:42 -08001300 op->args[1], op->args[3],
1301 TCG_COND_NE);
Richard Hendersona7635512014-04-23 22:18:30 -07001302 if (tmp == 0) {
1303 goto do_brcond_low;
1304 } else if (tmp == 1) {
1305 goto do_brcond_true;
1306 }
1307 goto do_default;
Richard Henderson6c4382f2012-10-02 11:32:27 -07001308 } else {
1309 goto do_default;
Richard Hendersonbc1473e2012-10-02 11:32:25 -07001310 }
Richard Henderson6c4382f2012-10-02 11:32:27 -07001311 break;
Richard Hendersonbc1473e2012-10-02 11:32:25 -07001312
1313 case INDEX_op_setcond2_i32:
Richard Hendersonacd93702016-12-08 12:28:42 -08001314 tmp = do_constant_folding_cond2(&op->args[1], &op->args[3],
1315 op->args[5]);
Richard Henderson6c4382f2012-10-02 11:32:27 -07001316 if (tmp != 2) {
Richard Hendersona7635512014-04-23 22:18:30 -07001317 do_setcond_const:
Richard Hendersonacd93702016-12-08 12:28:42 -08001318 tcg_opt_gen_movi(s, op, op->args[0], tmp);
1319 } else if ((op->args[5] == TCG_COND_LT
1320 || op->args[5] == TCG_COND_GE)
1321 && temp_is_const(op->args[3])
1322 && temps[op->args[3]].val == 0
1323 && temp_is_const(op->args[4])
1324 && temps[op->args[4]].val == 0) {
Richard Henderson6c4382f2012-10-02 11:32:27 -07001325 /* Simplify LT/GE comparisons vs zero to a single compare
1326 vs the high word of the input. */
Richard Hendersona7635512014-04-23 22:18:30 -07001327 do_setcond_high:
Richard Hendersonacd93702016-12-08 12:28:42 -08001328 reset_temp(op->args[0]);
1329 temps[op->args[0]].mask = 1;
Richard Hendersonc45cb8b2014-09-19 13:49:15 -07001330 op->opc = INDEX_op_setcond_i32;
Richard Hendersonacd93702016-12-08 12:28:42 -08001331 op->args[1] = op->args[2];
1332 op->args[2] = op->args[4];
1333 op->args[3] = op->args[5];
1334 } else if (op->args[5] == TCG_COND_EQ) {
Richard Hendersona7635512014-04-23 22:18:30 -07001335 /* Simplify EQ comparisons where one of the pairs
1336 can be simplified. */
1337 tmp = do_constant_folding_cond(INDEX_op_setcond_i32,
Richard Hendersonacd93702016-12-08 12:28:42 -08001338 op->args[1], op->args[3],
1339 TCG_COND_EQ);
Richard Hendersona7635512014-04-23 22:18:30 -07001340 if (tmp == 0) {
1341 goto do_setcond_const;
1342 } else if (tmp == 1) {
1343 goto do_setcond_high;
1344 }
1345 tmp = do_constant_folding_cond(INDEX_op_setcond_i32,
Richard Hendersonacd93702016-12-08 12:28:42 -08001346 op->args[2], op->args[4],
1347 TCG_COND_EQ);
Richard Hendersona7635512014-04-23 22:18:30 -07001348 if (tmp == 0) {
1349 goto do_setcond_high;
1350 } else if (tmp != 1) {
1351 goto do_default;
1352 }
1353 do_setcond_low:
Richard Hendersonacd93702016-12-08 12:28:42 -08001354 reset_temp(op->args[0]);
1355 temps[op->args[0]].mask = 1;
Richard Hendersonc45cb8b2014-09-19 13:49:15 -07001356 op->opc = INDEX_op_setcond_i32;
Richard Hendersonacd93702016-12-08 12:28:42 -08001357 op->args[2] = op->args[3];
1358 op->args[3] = op->args[5];
1359 } else if (op->args[5] == TCG_COND_NE) {
Richard Hendersona7635512014-04-23 22:18:30 -07001360 /* Simplify NE comparisons where one of the pairs
1361 can be simplified. */
1362 tmp = do_constant_folding_cond(INDEX_op_setcond_i32,
Richard Hendersonacd93702016-12-08 12:28:42 -08001363 op->args[1], op->args[3],
1364 TCG_COND_NE);
Richard Hendersona7635512014-04-23 22:18:30 -07001365 if (tmp == 0) {
1366 goto do_setcond_high;
1367 } else if (tmp == 1) {
1368 goto do_setcond_const;
1369 }
1370 tmp = do_constant_folding_cond(INDEX_op_setcond_i32,
Richard Hendersonacd93702016-12-08 12:28:42 -08001371 op->args[2], op->args[4],
1372 TCG_COND_NE);
Richard Hendersona7635512014-04-23 22:18:30 -07001373 if (tmp == 0) {
1374 goto do_setcond_low;
1375 } else if (tmp == 1) {
1376 goto do_setcond_const;
1377 }
1378 goto do_default;
Richard Henderson6c4382f2012-10-02 11:32:27 -07001379 } else {
1380 goto do_default;
Richard Hendersonbc1473e2012-10-02 11:32:25 -07001381 }
Richard Henderson6c4382f2012-10-02 11:32:27 -07001382 break;
Richard Hendersonbc1473e2012-10-02 11:32:25 -07001383
Kirill Batuzov8f2e8c02011-07-07 16:37:12 +04001384 case INDEX_op_call:
Richard Hendersonacd93702016-12-08 12:28:42 -08001385 if (!(op->args[nb_oargs + nb_iargs + 1]
Richard Hendersoncf066672014-03-22 20:06:52 -07001386 & (TCG_CALL_NO_READ_GLOBALS | TCG_CALL_NO_WRITE_GLOBALS))) {
Kirill Batuzov22613af2011-07-07 16:37:13 +04001387 for (i = 0; i < nb_globals; i++) {
Aurelien Jarno1208d7d2015-07-27 12:41:44 +02001388 if (test_bit(i, temps_used.l)) {
1389 reset_temp(i);
1390 }
Kirill Batuzov22613af2011-07-07 16:37:13 +04001391 }
1392 }
Richard Hendersoncf066672014-03-22 20:06:52 -07001393 goto do_reset_output;
Richard Henderson6e14e912012-10-02 11:32:24 -07001394
Kirill Batuzov8f2e8c02011-07-07 16:37:12 +04001395 default:
Richard Henderson6e14e912012-10-02 11:32:24 -07001396 do_default:
1397 /* Default case: we know nothing about operation (or were unable
1398 to compute the operation result) so no propagation is done.
1399 We trash everything if the operation is the end of a basic
Paolo Bonzini3a9d8b12013-01-11 15:42:52 -08001400 block, otherwise we only trash the output args. "mask" is
1401 the non-zero bits mask for the first output arg. */
Aurelien Jarnoa2550662012-09-19 21:40:30 +02001402 if (def->flags & TCG_OPF_BB_END) {
Paolo Bonzinid193a142013-01-11 15:42:51 -08001403 reset_all_temps(nb_temps);
Aurelien Jarnoa2550662012-09-19 21:40:30 +02001404 } else {
Richard Hendersoncf066672014-03-22 20:06:52 -07001405 do_reset_output:
1406 for (i = 0; i < nb_oargs; i++) {
Richard Hendersonacd93702016-12-08 12:28:42 -08001407 reset_temp(op->args[i]);
Aurelien Jarno30312442013-09-03 08:27:38 +02001408 /* Save the corresponding known-zero bits mask for the
1409 first output argument (only one supported so far). */
1410 if (i == 0) {
Richard Hendersonacd93702016-12-08 12:28:42 -08001411 temps[op->args[i]].mask = mask;
Aurelien Jarno30312442013-09-03 08:27:38 +02001412 }
Aurelien Jarnoa2550662012-09-19 21:40:30 +02001413 }
Kirill Batuzov22613af2011-07-07 16:37:13 +04001414 }
Kirill Batuzov8f2e8c02011-07-07 16:37:12 +04001415 break;
1416 }
Pranith Kumar34f93922016-08-23 09:48:25 -04001417
1418 /* Eliminate duplicate and redundant fence instructions. */
Richard Hendersonacd93702016-12-08 12:28:42 -08001419 if (prev_mb) {
Pranith Kumar34f93922016-08-23 09:48:25 -04001420 switch (opc) {
1421 case INDEX_op_mb:
1422 /* Merge two barriers of the same type into one,
1423 * or a weaker barrier into a stronger one,
1424 * or two weaker barriers into a stronger one.
1425 * mb X; mb Y => mb X|Y
1426 * mb; strl => mb; st
1427 * ldaq; mb => ld; mb
1428 * ldaq; strl => ld; mb; st
1429 * Other combinations are also merged into a strong
1430 * barrier. This is stricter than specified but for
1431 * the purposes of TCG is better than not optimizing.
1432 */
Richard Hendersonacd93702016-12-08 12:28:42 -08001433 prev_mb->args[0] |= op->args[0];
Pranith Kumar34f93922016-08-23 09:48:25 -04001434 tcg_op_remove(s, op);
1435 break;
1436
1437 default:
1438 /* Opcodes that end the block stop the optimization. */
1439 if ((def->flags & TCG_OPF_BB_END) == 0) {
1440 break;
1441 }
1442 /* fallthru */
1443 case INDEX_op_qemu_ld_i32:
1444 case INDEX_op_qemu_ld_i64:
1445 case INDEX_op_qemu_st_i32:
1446 case INDEX_op_qemu_st_i64:
1447 case INDEX_op_call:
1448 /* Opcodes that touch guest memory stop the optimization. */
Richard Hendersonacd93702016-12-08 12:28:42 -08001449 prev_mb = NULL;
Pranith Kumar34f93922016-08-23 09:48:25 -04001450 break;
1451 }
1452 } else if (opc == INDEX_op_mb) {
Richard Hendersonacd93702016-12-08 12:28:42 -08001453 prev_mb = op;
Pranith Kumar34f93922016-08-23 09:48:25 -04001454 }
Kirill Batuzov8f2e8c02011-07-07 16:37:12 +04001455 }
Kirill Batuzov8f2e8c02011-07-07 16:37:12 +04001456}