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bellardb9adb4a2003-04-29 20:41:16 +00001/* General "disassemble this chunk" code. Used for debugging. */
bellard5bbe9292003-06-09 19:38:38 +00002#include "config.h"
bellardb9adb4a2003-04-29 20:41:16 +00003#include "dis-asm.h"
bellardb9adb4a2003-04-29 20:41:16 +00004#include "elf.h"
bellardaa0aa4f2003-06-09 15:23:31 +00005#include <errno.h>
bellardb9adb4a2003-04-29 20:41:16 +00006
bellardc6105c02003-10-27 21:13:58 +00007#include "cpu.h"
8#include "exec-all.h"
bellard9307c4c2004-04-04 12:57:25 +00009#include "disas.h"
bellardc6105c02003-10-27 21:13:58 +000010
bellardb9adb4a2003-04-29 20:41:16 +000011/* Filled in by elfload.c. Simplistic, but will do for now. */
bellarde80cfcf2004-12-19 23:18:01 +000012struct syminfo *syminfos = NULL;
bellardb9adb4a2003-04-29 20:41:16 +000013
bellardaa0aa4f2003-06-09 15:23:31 +000014/* Get LENGTH bytes from info's buffer, at target address memaddr.
15 Transfer them to myaddr. */
16int
17buffer_read_memory (memaddr, myaddr, length, info)
18 bfd_vma memaddr;
19 bfd_byte *myaddr;
20 int length;
21 struct disassemble_info *info;
22{
bellardc6105c02003-10-27 21:13:58 +000023 if (memaddr < info->buffer_vma
24 || memaddr + length > info->buffer_vma + info->buffer_length)
25 /* Out of bounds. Use EIO because GDB uses it. */
26 return EIO;
27 memcpy (myaddr, info->buffer + (memaddr - info->buffer_vma), length);
28 return 0;
bellardaa0aa4f2003-06-09 15:23:31 +000029}
30
bellardc6105c02003-10-27 21:13:58 +000031/* Get LENGTH bytes from info's buffer, at target address memaddr.
32 Transfer them to myaddr. */
33static int
bellardc27004e2005-01-03 23:35:10 +000034target_read_memory (bfd_vma memaddr,
35 bfd_byte *myaddr,
36 int length,
37 struct disassemble_info *info)
bellardc6105c02003-10-27 21:13:58 +000038{
39 int i;
40 for(i = 0; i < length; i++) {
bellardc27004e2005-01-03 23:35:10 +000041 myaddr[i] = ldub_code(memaddr + i);
bellardc6105c02003-10-27 21:13:58 +000042 }
43 return 0;
44}
bellardc6105c02003-10-27 21:13:58 +000045
bellardaa0aa4f2003-06-09 15:23:31 +000046/* Print an error message. We can assume that this is in response to
47 an error return from buffer_read_memory. */
48void
49perror_memory (status, memaddr, info)
50 int status;
51 bfd_vma memaddr;
52 struct disassemble_info *info;
53{
54 if (status != EIO)
55 /* Can't happen. */
56 (*info->fprintf_func) (info->stream, "Unknown error %d\n", status);
57 else
58 /* Actually, address between memaddr and memaddr + len was
59 out of bounds. */
60 (*info->fprintf_func) (info->stream,
bellard26a76462006-06-25 18:15:32 +000061 "Address 0x%" PRIx64 " is out of bounds.\n", memaddr);
bellardaa0aa4f2003-06-09 15:23:31 +000062}
63
64/* This could be in a separate file, to save miniscule amounts of space
65 in statically linked executables. */
66
67/* Just print the address is hex. This is included for completeness even
68 though both GDB and objdump provide their own (to print symbolic
69 addresses). */
70
71void
72generic_print_address (addr, info)
73 bfd_vma addr;
74 struct disassemble_info *info;
75{
bellard26a76462006-06-25 18:15:32 +000076 (*info->fprintf_func) (info->stream, "0x%" PRIx64, addr);
bellardaa0aa4f2003-06-09 15:23:31 +000077}
78
79/* Just return the given address. */
80
81int
82generic_symbol_at_address (addr, info)
83 bfd_vma addr;
84 struct disassemble_info * info;
85{
86 return 1;
87}
88
89bfd_vma bfd_getl32 (const bfd_byte *addr)
90{
91 unsigned long v;
92
93 v = (unsigned long) addr[0];
94 v |= (unsigned long) addr[1] << 8;
95 v |= (unsigned long) addr[2] << 16;
96 v |= (unsigned long) addr[3] << 24;
97 return (bfd_vma) v;
98}
99
100bfd_vma bfd_getb32 (const bfd_byte *addr)
101{
102 unsigned long v;
103
104 v = (unsigned long) addr[0] << 24;
105 v |= (unsigned long) addr[1] << 16;
106 v |= (unsigned long) addr[2] << 8;
107 v |= (unsigned long) addr[3];
108 return (bfd_vma) v;
109}
110
bellard6af0bf92005-07-02 14:58:51 +0000111bfd_vma bfd_getl16 (const bfd_byte *addr)
112{
113 unsigned long v;
114
115 v = (unsigned long) addr[0];
116 v |= (unsigned long) addr[1] << 8;
117 return (bfd_vma) v;
118}
119
120bfd_vma bfd_getb16 (const bfd_byte *addr)
121{
122 unsigned long v;
123
124 v = (unsigned long) addr[0] << 24;
125 v |= (unsigned long) addr[1] << 16;
126 return (bfd_vma) v;
127}
128
bellardc2d551f2005-04-27 20:15:00 +0000129#ifdef TARGET_ARM
130static int
131print_insn_thumb1(bfd_vma pc, disassemble_info *info)
132{
133 return print_insn_arm(pc | 1, info);
134}
135#endif
136
137/* Disassemble this for me please... (debugging). 'flags' has teh following
138 values:
139 i386 - nonzero means 16 bit code
140 arm - nonzero means thumb code
bellard6a00d602005-11-21 23:25:50 +0000141 ppc - nonzero means little endian
bellardc2d551f2005-04-27 20:15:00 +0000142 other targets - unused
143 */
bellard83b34f82005-01-23 20:26:30 +0000144void target_disas(FILE *out, target_ulong code, target_ulong size, int flags)
bellardb9adb4a2003-04-29 20:41:16 +0000145{
bellardc27004e2005-01-03 23:35:10 +0000146 target_ulong pc;
bellardb9adb4a2003-04-29 20:41:16 +0000147 int count;
148 struct disassemble_info disasm_info;
149 int (*print_insn)(bfd_vma pc, disassemble_info *info);
150
151 INIT_DISASSEMBLE_INFO(disasm_info, out, fprintf);
152
bellardc27004e2005-01-03 23:35:10 +0000153 disasm_info.read_memory_func = target_read_memory;
154 disasm_info.buffer_vma = code;
155 disasm_info.buffer_length = size;
156
157#ifdef TARGET_WORDS_BIGENDIAN
158 disasm_info.endian = BFD_ENDIAN_BIG;
159#else
160 disasm_info.endian = BFD_ENDIAN_LITTLE;
bellardc6105c02003-10-27 21:13:58 +0000161#endif
bellardc27004e2005-01-03 23:35:10 +0000162#if defined(TARGET_I386)
163 if (flags == 2)
164 disasm_info.mach = bfd_mach_x86_64;
165 else if (flags == 1)
166 disasm_info.mach = bfd_mach_i386_i8086;
167 else
168 disasm_info.mach = bfd_mach_i386_i386;
169 print_insn = print_insn_i386;
170#elif defined(TARGET_ARM)
bellardc2d551f2005-04-27 20:15:00 +0000171 if (flags)
172 print_insn = print_insn_thumb1;
173 else
174 print_insn = print_insn_arm;
bellardc27004e2005-01-03 23:35:10 +0000175#elif defined(TARGET_SPARC)
176 print_insn = print_insn_sparc;
bellard34751872005-07-02 14:31:34 +0000177#ifdef TARGET_SPARC64
178 disasm_info.mach = bfd_mach_sparc_v9b;
179#endif
bellardc27004e2005-01-03 23:35:10 +0000180#elif defined(TARGET_PPC)
bellard6a00d602005-11-21 23:25:50 +0000181 if (flags)
bellard111bfab2005-04-23 18:16:07 +0000182 disasm_info.endian = BFD_ENDIAN_LITTLE;
bellarda2458622005-07-23 22:39:53 +0000183#ifdef TARGET_PPC64
184 disasm_info.mach = bfd_mach_ppc64;
185#else
186 disasm_info.mach = bfd_mach_ppc;
187#endif
bellardc27004e2005-01-03 23:35:10 +0000188 print_insn = print_insn_ppc;
bellard6af0bf92005-07-02 14:58:51 +0000189#elif defined(TARGET_MIPS)
bellard76b30302005-12-17 01:10:04 +0000190#ifdef TARGET_WORDS_BIGENDIAN
bellard6af0bf92005-07-02 14:58:51 +0000191 print_insn = print_insn_big_mips;
bellard76b30302005-12-17 01:10:04 +0000192#else
193 print_insn = print_insn_little_mips;
194#endif
bellard48024e42005-11-06 16:52:11 +0000195#elif defined(TARGET_M68K)
196 print_insn = print_insn_m68k;
bellardfdf9b3e2006-04-27 21:07:38 +0000197#elif defined(TARGET_SH4)
198 disasm_info.mach = bfd_mach_sh4;
199 print_insn = print_insn_sh;
bellardc27004e2005-01-03 23:35:10 +0000200#else
bellardb8076a72005-04-07 22:20:31 +0000201 fprintf(out, "0x" TARGET_FMT_lx
202 ": Asm output not supported on this arch\n", code);
bellardc27004e2005-01-03 23:35:10 +0000203 return;
204#endif
205
206 for (pc = code; pc < code + size; pc += count) {
bellardfa15e032005-01-31 23:32:31 +0000207 fprintf(out, "0x" TARGET_FMT_lx ": ", pc);
bellardc27004e2005-01-03 23:35:10 +0000208 count = print_insn(pc, &disasm_info);
209#if 0
210 {
211 int i;
212 uint8_t b;
213 fprintf(out, " {");
214 for(i = 0; i < count; i++) {
215 target_read_memory(pc + i, &b, 1, &disasm_info);
216 fprintf(out, " %02x", b);
217 }
218 fprintf(out, " }");
219 }
220#endif
221 fprintf(out, "\n");
222 if (count < 0)
223 break;
224 }
225}
226
227/* Disassemble this for me please... (debugging). */
228void disas(FILE *out, void *code, unsigned long size)
229{
230 unsigned long pc;
231 int count;
232 struct disassemble_info disasm_info;
233 int (*print_insn)(bfd_vma pc, disassemble_info *info);
234
235 INIT_DISASSEMBLE_INFO(disasm_info, out, fprintf);
bellardc6105c02003-10-27 21:13:58 +0000236
bellardb9adb4a2003-04-29 20:41:16 +0000237 disasm_info.buffer = code;
238 disasm_info.buffer_vma = (unsigned long)code;
239 disasm_info.buffer_length = size;
240
bellardb9adb4a2003-04-29 20:41:16 +0000241#ifdef WORDS_BIGENDIAN
bellardc27004e2005-01-03 23:35:10 +0000242 disasm_info.endian = BFD_ENDIAN_BIG;
bellardb9adb4a2003-04-29 20:41:16 +0000243#else
bellardc27004e2005-01-03 23:35:10 +0000244 disasm_info.endian = BFD_ENDIAN_LITTLE;
bellardb9adb4a2003-04-29 20:41:16 +0000245#endif
bellardbc51c5c2004-03-17 23:46:04 +0000246#if defined(__i386__)
bellardc27004e2005-01-03 23:35:10 +0000247 disasm_info.mach = bfd_mach_i386_i386;
248 print_insn = print_insn_i386;
bellardbc51c5c2004-03-17 23:46:04 +0000249#elif defined(__x86_64__)
bellardc27004e2005-01-03 23:35:10 +0000250 disasm_info.mach = bfd_mach_x86_64;
251 print_insn = print_insn_i386;
bellardb9adb4a2003-04-29 20:41:16 +0000252#elif defined(__powerpc__)
bellardc27004e2005-01-03 23:35:10 +0000253 print_insn = print_insn_ppc;
bellarda993ba82003-05-11 12:25:45 +0000254#elif defined(__alpha__)
bellardc27004e2005-01-03 23:35:10 +0000255 print_insn = print_insn_alpha;
bellardaa0aa4f2003-06-09 15:23:31 +0000256#elif defined(__sparc__)
bellardc27004e2005-01-03 23:35:10 +0000257 print_insn = print_insn_sparc;
bellardaa0aa4f2003-06-09 15:23:31 +0000258#elif defined(__arm__)
bellardc27004e2005-01-03 23:35:10 +0000259 print_insn = print_insn_arm;
bellard6af0bf92005-07-02 14:58:51 +0000260#elif defined(__MIPSEB__)
261 print_insn = print_insn_big_mips;
262#elif defined(__MIPSEL__)
263 print_insn = print_insn_little_mips;
bellard48024e42005-11-06 16:52:11 +0000264#elif defined(__m68k__)
265 print_insn = print_insn_m68k;
bellardb9adb4a2003-04-29 20:41:16 +0000266#else
bellardb8076a72005-04-07 22:20:31 +0000267 fprintf(out, "0x%lx: Asm output not supported on this arch\n",
268 (long) code);
bellardc27004e2005-01-03 23:35:10 +0000269 return;
bellardb9adb4a2003-04-29 20:41:16 +0000270#endif
bellardc27004e2005-01-03 23:35:10 +0000271 for (pc = (unsigned long)code; pc < (unsigned long)code + size; pc += count) {
272 fprintf(out, "0x%08lx: ", pc);
bellardaa0aa4f2003-06-09 15:23:31 +0000273#ifdef __arm__
274 /* since data are included in the code, it is better to
275 display code data too */
bellard95cbfc62003-06-15 19:44:10 +0000276 if (is_host) {
bellardaa0aa4f2003-06-09 15:23:31 +0000277 fprintf(out, "%08x ", (int)bfd_getl32((const bfd_byte *)pc));
278 }
279#endif
bellardc27004e2005-01-03 23:35:10 +0000280 count = print_insn(pc, &disasm_info);
bellardb9adb4a2003-04-29 20:41:16 +0000281 fprintf(out, "\n");
282 if (count < 0)
283 break;
284 }
285}
286
287/* Look up symbol for debugging purpose. Returns "" if unknown. */
bellardc27004e2005-01-03 23:35:10 +0000288const char *lookup_symbol(target_ulong orig_addr)
bellardb9adb4a2003-04-29 20:41:16 +0000289{
290 unsigned int i;
291 /* Hack, because we know this is x86. */
bellarde80cfcf2004-12-19 23:18:01 +0000292 Elf32_Sym *sym;
293 struct syminfo *s;
bellardb3ecf622005-10-30 18:21:23 +0000294 target_ulong addr;
bellarde80cfcf2004-12-19 23:18:01 +0000295
296 for (s = syminfos; s; s = s->next) {
297 sym = s->disas_symtab;
298 for (i = 0; i < s->disas_num_syms; i++) {
299 if (sym[i].st_shndx == SHN_UNDEF
300 || sym[i].st_shndx >= SHN_LORESERVE)
301 continue;
bellardb9adb4a2003-04-29 20:41:16 +0000302
bellarde80cfcf2004-12-19 23:18:01 +0000303 if (ELF_ST_TYPE(sym[i].st_info) != STT_FUNC)
304 continue;
bellardb9adb4a2003-04-29 20:41:16 +0000305
bellardb3ecf622005-10-30 18:21:23 +0000306 addr = sym[i].st_value;
307#ifdef TARGET_ARM
308 /* The bottom address bit marks a Thumb symbol. */
309 addr &= ~(target_ulong)1;
310#endif
311 if (orig_addr >= addr
312 && orig_addr < addr + sym[i].st_size)
bellarde80cfcf2004-12-19 23:18:01 +0000313 return s->disas_strtab + sym[i].st_name;
314 }
bellardb9adb4a2003-04-29 20:41:16 +0000315 }
316 return "";
317}
bellard9307c4c2004-04-04 12:57:25 +0000318
319#if !defined(CONFIG_USER_ONLY)
320
bellard3d2cfdf2004-08-01 21:49:07 +0000321void term_vprintf(const char *fmt, va_list ap);
322void term_printf(const char *fmt, ...);
323
bellard9307c4c2004-04-04 12:57:25 +0000324static int monitor_disas_is_physical;
bellard6a00d602005-11-21 23:25:50 +0000325static CPUState *monitor_disas_env;
bellard9307c4c2004-04-04 12:57:25 +0000326
327static int
328monitor_read_memory (memaddr, myaddr, length, info)
329 bfd_vma memaddr;
330 bfd_byte *myaddr;
331 int length;
332 struct disassemble_info *info;
333{
334 if (monitor_disas_is_physical) {
335 cpu_physical_memory_rw(memaddr, myaddr, length, 0);
336 } else {
bellard6a00d602005-11-21 23:25:50 +0000337 cpu_memory_rw_debug(monitor_disas_env, memaddr,myaddr, length, 0);
bellard9307c4c2004-04-04 12:57:25 +0000338 }
339 return 0;
340}
341
bellard3d2cfdf2004-08-01 21:49:07 +0000342static int monitor_fprintf(FILE *stream, const char *fmt, ...)
343{
344 va_list ap;
345 va_start(ap, fmt);
346 term_vprintf(fmt, ap);
347 va_end(ap);
348 return 0;
349}
350
bellard6a00d602005-11-21 23:25:50 +0000351void monitor_disas(CPUState *env,
352 target_ulong pc, int nb_insn, int is_physical, int flags)
bellard9307c4c2004-04-04 12:57:25 +0000353{
bellard9307c4c2004-04-04 12:57:25 +0000354 int count, i;
355 struct disassemble_info disasm_info;
356 int (*print_insn)(bfd_vma pc, disassemble_info *info);
357
bellard3d2cfdf2004-08-01 21:49:07 +0000358 INIT_DISASSEMBLE_INFO(disasm_info, NULL, monitor_fprintf);
bellard9307c4c2004-04-04 12:57:25 +0000359
bellard6a00d602005-11-21 23:25:50 +0000360 monitor_disas_env = env;
bellard9307c4c2004-04-04 12:57:25 +0000361 monitor_disas_is_physical = is_physical;
362 disasm_info.read_memory_func = monitor_read_memory;
363
364 disasm_info.buffer_vma = pc;
365
366#ifdef TARGET_WORDS_BIGENDIAN
367 disasm_info.endian = BFD_ENDIAN_BIG;
368#else
369 disasm_info.endian = BFD_ENDIAN_LITTLE;
370#endif
371#if defined(TARGET_I386)
bellardfa15e032005-01-31 23:32:31 +0000372 if (flags == 2)
373 disasm_info.mach = bfd_mach_x86_64;
374 else if (flags == 1)
bellard9307c4c2004-04-04 12:57:25 +0000375 disasm_info.mach = bfd_mach_i386_i8086;
bellardfa15e032005-01-31 23:32:31 +0000376 else
377 disasm_info.mach = bfd_mach_i386_i386;
bellard9307c4c2004-04-04 12:57:25 +0000378 print_insn = print_insn_i386;
379#elif defined(TARGET_ARM)
380 print_insn = print_insn_arm;
381#elif defined(TARGET_SPARC)
382 print_insn = print_insn_sparc;
383#elif defined(TARGET_PPC)
bellarda2458622005-07-23 22:39:53 +0000384#ifdef TARGET_PPC64
385 disasm_info.mach = bfd_mach_ppc64;
386#else
387 disasm_info.mach = bfd_mach_ppc;
388#endif
bellard9307c4c2004-04-04 12:57:25 +0000389 print_insn = print_insn_ppc;
bellard6af0bf92005-07-02 14:58:51 +0000390#elif defined(TARGET_MIPS)
bellard76b30302005-12-17 01:10:04 +0000391#ifdef TARGET_WORDS_BIGENDIAN
bellard6af0bf92005-07-02 14:58:51 +0000392 print_insn = print_insn_big_mips;
bellard76b30302005-12-17 01:10:04 +0000393#else
394 print_insn = print_insn_little_mips;
395#endif
bellard48024e42005-11-06 16:52:11 +0000396#elif defined(TARGET_M68K)
397 print_insn = print_insn_m68k;
bellard9307c4c2004-04-04 12:57:25 +0000398#else
bellardb8076a72005-04-07 22:20:31 +0000399 term_printf("0x" TARGET_FMT_lx
400 ": Asm output not supported on this arch\n", pc);
bellard9307c4c2004-04-04 12:57:25 +0000401 return;
402#endif
403
404 for(i = 0; i < nb_insn; i++) {
bellardfa15e032005-01-31 23:32:31 +0000405 term_printf("0x" TARGET_FMT_lx ": ", pc);
bellard9307c4c2004-04-04 12:57:25 +0000406 count = print_insn(pc, &disasm_info);
bellard3d2cfdf2004-08-01 21:49:07 +0000407 term_printf("\n");
bellard9307c4c2004-04-04 12:57:25 +0000408 if (count < 0)
409 break;
410 pc += count;
411 }
412}
413#endif