blob: 438321c6ccbd8362731b4cb2e8ca60af3685f962 [file] [log] [blame]
Kirill Batuzov8f2e8c02011-07-07 16:37:12 +04001/*
2 * Optimizations for Tiny Code Generator for QEMU
3 *
4 * Copyright (c) 2010 Samsung Electronics.
5 * Contributed by Kirill Batuzov <batuzovk@ispras.ru>
6 *
7 * Permission is hereby granted, free of charge, to any person obtaining a copy
8 * of this software and associated documentation files (the "Software"), to deal
9 * in the Software without restriction, including without limitation the rights
10 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
11 * copies of the Software, and to permit persons to whom the Software is
12 * furnished to do so, subject to the following conditions:
13 *
14 * The above copyright notice and this permission notice shall be included in
15 * all copies or substantial portions of the Software.
16 *
17 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
18 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
19 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
20 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
21 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
22 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
23 * THE SOFTWARE.
24 */
25
Peter Maydell757e7252016-01-26 18:17:08 +000026#include "qemu/osdep.h"
Kirill Batuzov8f2e8c02011-07-07 16:37:12 +040027#include "qemu-common.h"
Paolo Bonzini00f6da62016-03-15 13:16:36 +010028#include "exec/cpu-common.h"
Kirill Batuzov8f2e8c02011-07-07 16:37:12 +040029#include "tcg-op.h"
30
Kirill Batuzov8f2e8c02011-07-07 16:37:12 +040031#define CASE_OP_32_64(x) \
32 glue(glue(case INDEX_op_, x), _i32): \
33 glue(glue(case INDEX_op_, x), _i64)
Kirill Batuzov8f2e8c02011-07-07 16:37:12 +040034
Kirill Batuzov22613af2011-07-07 16:37:13 +040035struct tcg_temp_info {
Aurelien Jarnob41059d2015-07-27 12:41:44 +020036 bool is_const;
Richard Henderson63490392017-06-20 13:43:15 -070037 TCGTemp *prev_copy;
38 TCGTemp *next_copy;
Kirill Batuzov22613af2011-07-07 16:37:13 +040039 tcg_target_ulong val;
Paolo Bonzini3a9d8b12013-01-11 15:42:52 -080040 tcg_target_ulong mask;
Kirill Batuzov22613af2011-07-07 16:37:13 +040041};
42
Richard Henderson63490392017-06-20 13:43:15 -070043static inline struct tcg_temp_info *ts_info(TCGTemp *ts)
Aurelien Jarnod9c769c2015-07-27 12:41:44 +020044{
Richard Henderson63490392017-06-20 13:43:15 -070045 return ts->state_ptr;
Aurelien Jarnod9c769c2015-07-27 12:41:44 +020046}
47
Richard Henderson63490392017-06-20 13:43:15 -070048static inline struct tcg_temp_info *arg_info(TCGArg arg)
Aurelien Jarnod9c769c2015-07-27 12:41:44 +020049{
Richard Henderson63490392017-06-20 13:43:15 -070050 return ts_info(arg_temp(arg));
51}
52
53static inline bool ts_is_const(TCGTemp *ts)
54{
55 return ts_info(ts)->is_const;
56}
57
58static inline bool arg_is_const(TCGArg arg)
59{
60 return ts_is_const(arg_temp(arg));
61}
62
63static inline bool ts_is_copy(TCGTemp *ts)
64{
65 return ts_info(ts)->next_copy != ts;
Aurelien Jarnod9c769c2015-07-27 12:41:44 +020066}
67
Aurelien Jarnob41059d2015-07-27 12:41:44 +020068/* Reset TEMP's state, possibly removing the temp for the list of copies. */
Richard Henderson63490392017-06-20 13:43:15 -070069static void reset_ts(TCGTemp *ts)
Kirill Batuzov22613af2011-07-07 16:37:13 +040070{
Richard Henderson63490392017-06-20 13:43:15 -070071 struct tcg_temp_info *ti = ts_info(ts);
72 struct tcg_temp_info *pi = ts_info(ti->prev_copy);
73 struct tcg_temp_info *ni = ts_info(ti->next_copy);
74
75 ni->prev_copy = ti->prev_copy;
76 pi->next_copy = ti->next_copy;
77 ti->next_copy = ts;
78 ti->prev_copy = ts;
79 ti->is_const = false;
80 ti->mask = -1;
81}
82
83static void reset_temp(TCGArg arg)
84{
85 reset_ts(arg_temp(arg));
Kirill Batuzov22613af2011-07-07 16:37:13 +040086}
87
Aurelien Jarno1208d7d2015-07-27 12:41:44 +020088/* Initialize and activate a temporary. */
Emilio G. Cota34184b02017-07-19 14:32:24 -040089static void init_ts_info(struct tcg_temp_info *infos,
90 TCGTempSet *temps_used, TCGTemp *ts)
Aurelien Jarno1208d7d2015-07-27 12:41:44 +020091{
Richard Henderson63490392017-06-20 13:43:15 -070092 size_t idx = temp_idx(ts);
Emilio G. Cota34184b02017-07-19 14:32:24 -040093 if (!test_bit(idx, temps_used->l)) {
94 struct tcg_temp_info *ti = &infos[idx];
Richard Henderson63490392017-06-20 13:43:15 -070095
96 ts->state_ptr = ti;
97 ti->next_copy = ts;
98 ti->prev_copy = ts;
99 ti->is_const = false;
100 ti->mask = -1;
Emilio G. Cota34184b02017-07-19 14:32:24 -0400101 set_bit(idx, temps_used->l);
Aurelien Jarno1208d7d2015-07-27 12:41:44 +0200102 }
103}
104
Emilio G. Cota34184b02017-07-19 14:32:24 -0400105static void init_arg_info(struct tcg_temp_info *infos,
106 TCGTempSet *temps_used, TCGArg arg)
Richard Henderson63490392017-06-20 13:43:15 -0700107{
Emilio G. Cota34184b02017-07-19 14:32:24 -0400108 init_ts_info(infos, temps_used, arg_temp(arg));
Richard Henderson63490392017-06-20 13:43:15 -0700109}
110
Blue Swirlfe0de7a2011-07-30 19:18:32 +0000111static int op_bits(TCGOpcode op)
Kirill Batuzov22613af2011-07-07 16:37:13 +0400112{
Richard Henderson8399ad52011-08-17 14:11:45 -0700113 const TCGOpDef *def = &tcg_op_defs[op];
114 return def->flags & TCG_OPF_64BIT ? 64 : 32;
Kirill Batuzov22613af2011-07-07 16:37:13 +0400115}
116
Richard Hendersona62f6f52014-05-22 10:59:12 -0700117static TCGOpcode op_to_mov(TCGOpcode op)
118{
119 switch (op_bits(op)) {
120 case 32:
121 return INDEX_op_mov_i32;
122 case 64:
123 return INDEX_op_mov_i64;
124 default:
125 fprintf(stderr, "op_to_mov: unexpected return value of "
126 "function op_bits.\n");
127 tcg_abort();
128 }
129}
130
Blue Swirlfe0de7a2011-07-30 19:18:32 +0000131static TCGOpcode op_to_movi(TCGOpcode op)
Kirill Batuzov22613af2011-07-07 16:37:13 +0400132{
133 switch (op_bits(op)) {
134 case 32:
135 return INDEX_op_movi_i32;
Kirill Batuzov22613af2011-07-07 16:37:13 +0400136 case 64:
137 return INDEX_op_movi_i64;
Kirill Batuzov22613af2011-07-07 16:37:13 +0400138 default:
139 fprintf(stderr, "op_to_movi: unexpected return value of "
140 "function op_bits.\n");
141 tcg_abort();
142 }
143}
144
Richard Henderson63490392017-06-20 13:43:15 -0700145static TCGTemp *find_better_copy(TCGContext *s, TCGTemp *ts)
Aurelien Jarnoe590d4e2012-09-11 12:31:21 +0200146{
Richard Henderson63490392017-06-20 13:43:15 -0700147 TCGTemp *i;
Aurelien Jarnoe590d4e2012-09-11 12:31:21 +0200148
149 /* If this is already a global, we can't do better. */
Richard Hendersonfa477d22016-11-02 11:20:15 -0600150 if (ts->temp_global) {
Richard Henderson63490392017-06-20 13:43:15 -0700151 return ts;
Aurelien Jarnoe590d4e2012-09-11 12:31:21 +0200152 }
153
154 /* Search for a global first. */
Richard Henderson63490392017-06-20 13:43:15 -0700155 for (i = ts_info(ts)->next_copy; i != ts; i = ts_info(i)->next_copy) {
156 if (i->temp_global) {
Aurelien Jarnoe590d4e2012-09-11 12:31:21 +0200157 return i;
158 }
159 }
160
161 /* If it is a temp, search for a temp local. */
Richard Hendersonfa477d22016-11-02 11:20:15 -0600162 if (!ts->temp_local) {
Richard Henderson63490392017-06-20 13:43:15 -0700163 for (i = ts_info(ts)->next_copy; i != ts; i = ts_info(i)->next_copy) {
164 if (ts->temp_local) {
Aurelien Jarnoe590d4e2012-09-11 12:31:21 +0200165 return i;
166 }
167 }
168 }
169
170 /* Failure to find a better representation, return the same temp. */
Richard Henderson63490392017-06-20 13:43:15 -0700171 return ts;
Aurelien Jarnoe590d4e2012-09-11 12:31:21 +0200172}
173
Richard Henderson63490392017-06-20 13:43:15 -0700174static bool ts_are_copies(TCGTemp *ts1, TCGTemp *ts2)
Aurelien Jarnoe590d4e2012-09-11 12:31:21 +0200175{
Richard Henderson63490392017-06-20 13:43:15 -0700176 TCGTemp *i;
Aurelien Jarnoe590d4e2012-09-11 12:31:21 +0200177
Richard Henderson63490392017-06-20 13:43:15 -0700178 if (ts1 == ts2) {
Aurelien Jarnoe590d4e2012-09-11 12:31:21 +0200179 return true;
180 }
181
Richard Henderson63490392017-06-20 13:43:15 -0700182 if (!ts_is_copy(ts1) || !ts_is_copy(ts2)) {
Aurelien Jarnoe590d4e2012-09-11 12:31:21 +0200183 return false;
184 }
185
Richard Henderson63490392017-06-20 13:43:15 -0700186 for (i = ts_info(ts1)->next_copy; i != ts1; i = ts_info(i)->next_copy) {
187 if (i == ts2) {
Aurelien Jarnoe590d4e2012-09-11 12:31:21 +0200188 return true;
189 }
190 }
191
192 return false;
193}
194
Richard Henderson63490392017-06-20 13:43:15 -0700195static bool args_are_copies(TCGArg arg1, TCGArg arg2)
196{
197 return ts_are_copies(arg_temp(arg1), arg_temp(arg2));
198}
199
Richard Hendersonacd93702016-12-08 12:28:42 -0800200static void tcg_opt_gen_movi(TCGContext *s, TCGOp *op, TCGArg dst, TCGArg val)
Aurelien Jarno97a79eb2015-06-05 11:19:18 +0200201{
202 TCGOpcode new_op = op_to_movi(op->opc);
203 tcg_target_ulong mask;
Richard Henderson63490392017-06-20 13:43:15 -0700204 struct tcg_temp_info *di = arg_info(dst);
Aurelien Jarno97a79eb2015-06-05 11:19:18 +0200205
206 op->opc = new_op;
207
208 reset_temp(dst);
Richard Henderson63490392017-06-20 13:43:15 -0700209 di->is_const = true;
210 di->val = val;
Aurelien Jarno97a79eb2015-06-05 11:19:18 +0200211 mask = val;
Aurelien Jarno96152122015-07-10 18:03:30 +0200212 if (TCG_TARGET_REG_BITS > 32 && new_op == INDEX_op_movi_i32) {
Aurelien Jarno97a79eb2015-06-05 11:19:18 +0200213 /* High bits of the destination are now garbage. */
214 mask |= ~0xffffffffull;
215 }
Richard Henderson63490392017-06-20 13:43:15 -0700216 di->mask = mask;
Aurelien Jarno97a79eb2015-06-05 11:19:18 +0200217
Richard Hendersonacd93702016-12-08 12:28:42 -0800218 op->args[0] = dst;
219 op->args[1] = val;
Aurelien Jarno97a79eb2015-06-05 11:19:18 +0200220}
221
Richard Hendersonacd93702016-12-08 12:28:42 -0800222static void tcg_opt_gen_mov(TCGContext *s, TCGOp *op, TCGArg dst, TCGArg src)
Kirill Batuzov22613af2011-07-07 16:37:13 +0400223{
Richard Henderson63490392017-06-20 13:43:15 -0700224 TCGTemp *dst_ts = arg_temp(dst);
225 TCGTemp *src_ts = arg_temp(src);
226 struct tcg_temp_info *di;
227 struct tcg_temp_info *si;
228 tcg_target_ulong mask;
229 TCGOpcode new_op;
230
231 if (ts_are_copies(dst_ts, src_ts)) {
Aurelien Jarno53657182015-06-04 21:53:25 +0200232 tcg_op_remove(s, op);
233 return;
234 }
235
Richard Henderson63490392017-06-20 13:43:15 -0700236 reset_ts(dst_ts);
237 di = ts_info(dst_ts);
238 si = ts_info(src_ts);
239 new_op = op_to_mov(op->opc);
Richard Hendersona62f6f52014-05-22 10:59:12 -0700240
Richard Hendersonc45cb8b2014-09-19 13:49:15 -0700241 op->opc = new_op;
Richard Henderson63490392017-06-20 13:43:15 -0700242 op->args[0] = dst;
243 op->args[1] = src;
Richard Hendersona62f6f52014-05-22 10:59:12 -0700244
Richard Henderson63490392017-06-20 13:43:15 -0700245 mask = si->mask;
Richard Henderson24666ba2014-05-22 11:14:10 -0700246 if (TCG_TARGET_REG_BITS > 32 && new_op == INDEX_op_mov_i32) {
247 /* High bits of the destination are now garbage. */
248 mask |= ~0xffffffffull;
249 }
Richard Henderson63490392017-06-20 13:43:15 -0700250 di->mask = mask;
Richard Henderson24666ba2014-05-22 11:14:10 -0700251
Richard Henderson63490392017-06-20 13:43:15 -0700252 if (src_ts->type == dst_ts->type) {
253 struct tcg_temp_info *ni = ts_info(si->next_copy);
254
255 di->next_copy = si->next_copy;
256 di->prev_copy = src_ts;
257 ni->prev_copy = dst_ts;
258 si->next_copy = dst_ts;
259 di->is_const = si->is_const;
260 di->val = si->val;
Paolo Bonzini3a9d8b12013-01-11 15:42:52 -0800261 }
Kirill Batuzov22613af2011-07-07 16:37:13 +0400262}
263
Blue Swirlfe0de7a2011-07-30 19:18:32 +0000264static TCGArg do_constant_folding_2(TCGOpcode op, TCGArg x, TCGArg y)
Kirill Batuzov53108fb2011-07-07 16:37:14 +0400265{
Richard Henderson03271522013-08-14 14:35:56 -0700266 uint64_t l64, h64;
267
Kirill Batuzov53108fb2011-07-07 16:37:14 +0400268 switch (op) {
269 CASE_OP_32_64(add):
270 return x + y;
271
272 CASE_OP_32_64(sub):
273 return x - y;
274
275 CASE_OP_32_64(mul):
276 return x * y;
277
Kirill Batuzov9a810902011-07-07 16:37:15 +0400278 CASE_OP_32_64(and):
279 return x & y;
280
281 CASE_OP_32_64(or):
282 return x | y;
283
284 CASE_OP_32_64(xor):
285 return x ^ y;
286
Kirill Batuzov55c09752011-07-07 16:37:16 +0400287 case INDEX_op_shl_i32:
Richard Henderson50c5c4d2014-03-18 07:45:39 -0700288 return (uint32_t)x << (y & 31);
Kirill Batuzov55c09752011-07-07 16:37:16 +0400289
Kirill Batuzov55c09752011-07-07 16:37:16 +0400290 case INDEX_op_shl_i64:
Richard Henderson50c5c4d2014-03-18 07:45:39 -0700291 return (uint64_t)x << (y & 63);
Kirill Batuzov55c09752011-07-07 16:37:16 +0400292
293 case INDEX_op_shr_i32:
Richard Henderson50c5c4d2014-03-18 07:45:39 -0700294 return (uint32_t)x >> (y & 31);
Kirill Batuzov55c09752011-07-07 16:37:16 +0400295
Kirill Batuzov55c09752011-07-07 16:37:16 +0400296 case INDEX_op_shr_i64:
Richard Henderson50c5c4d2014-03-18 07:45:39 -0700297 return (uint64_t)x >> (y & 63);
Kirill Batuzov55c09752011-07-07 16:37:16 +0400298
299 case INDEX_op_sar_i32:
Richard Henderson50c5c4d2014-03-18 07:45:39 -0700300 return (int32_t)x >> (y & 31);
Kirill Batuzov55c09752011-07-07 16:37:16 +0400301
Kirill Batuzov55c09752011-07-07 16:37:16 +0400302 case INDEX_op_sar_i64:
Richard Henderson50c5c4d2014-03-18 07:45:39 -0700303 return (int64_t)x >> (y & 63);
Kirill Batuzov55c09752011-07-07 16:37:16 +0400304
305 case INDEX_op_rotr_i32:
Richard Henderson50c5c4d2014-03-18 07:45:39 -0700306 return ror32(x, y & 31);
Kirill Batuzov55c09752011-07-07 16:37:16 +0400307
Kirill Batuzov55c09752011-07-07 16:37:16 +0400308 case INDEX_op_rotr_i64:
Richard Henderson50c5c4d2014-03-18 07:45:39 -0700309 return ror64(x, y & 63);
Kirill Batuzov55c09752011-07-07 16:37:16 +0400310
311 case INDEX_op_rotl_i32:
Richard Henderson50c5c4d2014-03-18 07:45:39 -0700312 return rol32(x, y & 31);
Kirill Batuzov55c09752011-07-07 16:37:16 +0400313
Kirill Batuzov55c09752011-07-07 16:37:16 +0400314 case INDEX_op_rotl_i64:
Richard Henderson50c5c4d2014-03-18 07:45:39 -0700315 return rol64(x, y & 63);
Kirill Batuzov55c09752011-07-07 16:37:16 +0400316
Richard Henderson25c4d9c2011-08-17 14:11:46 -0700317 CASE_OP_32_64(not):
Kirill Batuzova640f032011-07-07 16:37:17 +0400318 return ~x;
319
Richard Hendersoncb25c802011-08-17 14:11:47 -0700320 CASE_OP_32_64(neg):
321 return -x;
322
323 CASE_OP_32_64(andc):
324 return x & ~y;
325
326 CASE_OP_32_64(orc):
327 return x | ~y;
328
329 CASE_OP_32_64(eqv):
330 return ~(x ^ y);
331
332 CASE_OP_32_64(nand):
333 return ~(x & y);
334
335 CASE_OP_32_64(nor):
336 return ~(x | y);
337
Richard Henderson0e28d002016-11-16 09:23:28 +0100338 case INDEX_op_clz_i32:
339 return (uint32_t)x ? clz32(x) : y;
340
341 case INDEX_op_clz_i64:
342 return x ? clz64(x) : y;
343
344 case INDEX_op_ctz_i32:
345 return (uint32_t)x ? ctz32(x) : y;
346
347 case INDEX_op_ctz_i64:
348 return x ? ctz64(x) : y;
349
Richard Hendersona768e4e2016-11-21 11:13:39 +0100350 case INDEX_op_ctpop_i32:
351 return ctpop32(x);
352
353 case INDEX_op_ctpop_i64:
354 return ctpop64(x);
355
Richard Henderson25c4d9c2011-08-17 14:11:46 -0700356 CASE_OP_32_64(ext8s):
Kirill Batuzova640f032011-07-07 16:37:17 +0400357 return (int8_t)x;
358
Richard Henderson25c4d9c2011-08-17 14:11:46 -0700359 CASE_OP_32_64(ext16s):
Kirill Batuzova640f032011-07-07 16:37:17 +0400360 return (int16_t)x;
361
Richard Henderson25c4d9c2011-08-17 14:11:46 -0700362 CASE_OP_32_64(ext8u):
Kirill Batuzova640f032011-07-07 16:37:17 +0400363 return (uint8_t)x;
364
Richard Henderson25c4d9c2011-08-17 14:11:46 -0700365 CASE_OP_32_64(ext16u):
Kirill Batuzova640f032011-07-07 16:37:17 +0400366 return (uint16_t)x;
367
Aurelien Jarno8bcb5c82015-07-27 12:41:45 +0200368 case INDEX_op_ext_i32_i64:
Kirill Batuzova640f032011-07-07 16:37:17 +0400369 case INDEX_op_ext32s_i64:
370 return (int32_t)x;
371
Aurelien Jarno8bcb5c82015-07-27 12:41:45 +0200372 case INDEX_op_extu_i32_i64:
Richard Henderson609ad702015-07-24 07:16:00 -0700373 case INDEX_op_extrl_i64_i32:
Kirill Batuzova640f032011-07-07 16:37:17 +0400374 case INDEX_op_ext32u_i64:
375 return (uint32_t)x;
Kirill Batuzova640f032011-07-07 16:37:17 +0400376
Richard Henderson609ad702015-07-24 07:16:00 -0700377 case INDEX_op_extrh_i64_i32:
378 return (uint64_t)x >> 32;
379
Richard Henderson03271522013-08-14 14:35:56 -0700380 case INDEX_op_muluh_i32:
381 return ((uint64_t)(uint32_t)x * (uint32_t)y) >> 32;
382 case INDEX_op_mulsh_i32:
383 return ((int64_t)(int32_t)x * (int32_t)y) >> 32;
384
385 case INDEX_op_muluh_i64:
386 mulu64(&l64, &h64, x, y);
387 return h64;
388 case INDEX_op_mulsh_i64:
389 muls64(&l64, &h64, x, y);
390 return h64;
391
Richard Henderson01547f72013-08-14 15:22:46 -0700392 case INDEX_op_div_i32:
393 /* Avoid crashing on divide by zero, otherwise undefined. */
394 return (int32_t)x / ((int32_t)y ? : 1);
395 case INDEX_op_divu_i32:
396 return (uint32_t)x / ((uint32_t)y ? : 1);
397 case INDEX_op_div_i64:
398 return (int64_t)x / ((int64_t)y ? : 1);
399 case INDEX_op_divu_i64:
400 return (uint64_t)x / ((uint64_t)y ? : 1);
401
402 case INDEX_op_rem_i32:
403 return (int32_t)x % ((int32_t)y ? : 1);
404 case INDEX_op_remu_i32:
405 return (uint32_t)x % ((uint32_t)y ? : 1);
406 case INDEX_op_rem_i64:
407 return (int64_t)x % ((int64_t)y ? : 1);
408 case INDEX_op_remu_i64:
409 return (uint64_t)x % ((uint64_t)y ? : 1);
410
Kirill Batuzov53108fb2011-07-07 16:37:14 +0400411 default:
412 fprintf(stderr,
413 "Unrecognized operation %d in do_constant_folding.\n", op);
414 tcg_abort();
415 }
416}
417
Blue Swirlfe0de7a2011-07-30 19:18:32 +0000418static TCGArg do_constant_folding(TCGOpcode op, TCGArg x, TCGArg y)
Kirill Batuzov53108fb2011-07-07 16:37:14 +0400419{
420 TCGArg res = do_constant_folding_2(op, x, y);
Kirill Batuzov53108fb2011-07-07 16:37:14 +0400421 if (op_bits(op) == 32) {
Aurelien Jarno29f3ff82015-07-10 18:03:31 +0200422 res = (int32_t)res;
Kirill Batuzov53108fb2011-07-07 16:37:14 +0400423 }
Kirill Batuzov53108fb2011-07-07 16:37:14 +0400424 return res;
425}
426
Richard Henderson9519da72012-10-02 11:32:26 -0700427static bool do_constant_folding_cond_32(uint32_t x, uint32_t y, TCGCond c)
428{
429 switch (c) {
430 case TCG_COND_EQ:
431 return x == y;
432 case TCG_COND_NE:
433 return x != y;
434 case TCG_COND_LT:
435 return (int32_t)x < (int32_t)y;
436 case TCG_COND_GE:
437 return (int32_t)x >= (int32_t)y;
438 case TCG_COND_LE:
439 return (int32_t)x <= (int32_t)y;
440 case TCG_COND_GT:
441 return (int32_t)x > (int32_t)y;
442 case TCG_COND_LTU:
443 return x < y;
444 case TCG_COND_GEU:
445 return x >= y;
446 case TCG_COND_LEU:
447 return x <= y;
448 case TCG_COND_GTU:
449 return x > y;
450 default:
451 tcg_abort();
452 }
453}
454
455static bool do_constant_folding_cond_64(uint64_t x, uint64_t y, TCGCond c)
456{
457 switch (c) {
458 case TCG_COND_EQ:
459 return x == y;
460 case TCG_COND_NE:
461 return x != y;
462 case TCG_COND_LT:
463 return (int64_t)x < (int64_t)y;
464 case TCG_COND_GE:
465 return (int64_t)x >= (int64_t)y;
466 case TCG_COND_LE:
467 return (int64_t)x <= (int64_t)y;
468 case TCG_COND_GT:
469 return (int64_t)x > (int64_t)y;
470 case TCG_COND_LTU:
471 return x < y;
472 case TCG_COND_GEU:
473 return x >= y;
474 case TCG_COND_LEU:
475 return x <= y;
476 case TCG_COND_GTU:
477 return x > y;
478 default:
479 tcg_abort();
480 }
481}
482
483static bool do_constant_folding_cond_eq(TCGCond c)
484{
485 switch (c) {
486 case TCG_COND_GT:
487 case TCG_COND_LTU:
488 case TCG_COND_LT:
489 case TCG_COND_GTU:
490 case TCG_COND_NE:
491 return 0;
492 case TCG_COND_GE:
493 case TCG_COND_GEU:
494 case TCG_COND_LE:
495 case TCG_COND_LEU:
496 case TCG_COND_EQ:
497 return 1;
498 default:
499 tcg_abort();
500 }
501}
502
Aurelien Jarnob336ceb2012-09-18 19:37:00 +0200503/* Return 2 if the condition can't be simplified, and the result
504 of the condition (0 or 1) if it can */
Aurelien Jarnof8dd19e2012-09-06 16:47:14 +0200505static TCGArg do_constant_folding_cond(TCGOpcode op, TCGArg x,
506 TCGArg y, TCGCond c)
507{
Richard Henderson63490392017-06-20 13:43:15 -0700508 tcg_target_ulong xv = arg_info(x)->val;
509 tcg_target_ulong yv = arg_info(y)->val;
510 if (arg_is_const(x) && arg_is_const(y)) {
Aurelien Jarnob336ceb2012-09-18 19:37:00 +0200511 switch (op_bits(op)) {
512 case 32:
Richard Henderson63490392017-06-20 13:43:15 -0700513 return do_constant_folding_cond_32(xv, yv, c);
Aurelien Jarnob336ceb2012-09-18 19:37:00 +0200514 case 64:
Richard Henderson63490392017-06-20 13:43:15 -0700515 return do_constant_folding_cond_64(xv, yv, c);
Richard Henderson9519da72012-10-02 11:32:26 -0700516 default:
517 tcg_abort();
Aurelien Jarnof8dd19e2012-09-06 16:47:14 +0200518 }
Richard Henderson63490392017-06-20 13:43:15 -0700519 } else if (args_are_copies(x, y)) {
Richard Henderson9519da72012-10-02 11:32:26 -0700520 return do_constant_folding_cond_eq(c);
Richard Henderson63490392017-06-20 13:43:15 -0700521 } else if (arg_is_const(y) && yv == 0) {
Aurelien Jarnob336ceb2012-09-18 19:37:00 +0200522 switch (c) {
523 case TCG_COND_LTU:
524 return 0;
525 case TCG_COND_GEU:
526 return 1;
527 default:
528 return 2;
529 }
Aurelien Jarnof8dd19e2012-09-06 16:47:14 +0200530 }
Alex Bennée550276a2016-09-30 22:30:55 +0100531 return 2;
Aurelien Jarnof8dd19e2012-09-06 16:47:14 +0200532}
533
Richard Henderson6c4382f2012-10-02 11:32:27 -0700534/* Return 2 if the condition can't be simplified, and the result
535 of the condition (0 or 1) if it can */
536static TCGArg do_constant_folding_cond2(TCGArg *p1, TCGArg *p2, TCGCond c)
537{
538 TCGArg al = p1[0], ah = p1[1];
539 TCGArg bl = p2[0], bh = p2[1];
540
Richard Henderson63490392017-06-20 13:43:15 -0700541 if (arg_is_const(bl) && arg_is_const(bh)) {
542 tcg_target_ulong blv = arg_info(bl)->val;
543 tcg_target_ulong bhv = arg_info(bh)->val;
544 uint64_t b = deposit64(blv, 32, 32, bhv);
Richard Henderson6c4382f2012-10-02 11:32:27 -0700545
Richard Henderson63490392017-06-20 13:43:15 -0700546 if (arg_is_const(al) && arg_is_const(ah)) {
547 tcg_target_ulong alv = arg_info(al)->val;
548 tcg_target_ulong ahv = arg_info(ah)->val;
549 uint64_t a = deposit64(alv, 32, 32, ahv);
Richard Henderson6c4382f2012-10-02 11:32:27 -0700550 return do_constant_folding_cond_64(a, b, c);
551 }
552 if (b == 0) {
553 switch (c) {
554 case TCG_COND_LTU:
555 return 0;
556 case TCG_COND_GEU:
557 return 1;
558 default:
559 break;
560 }
561 }
562 }
Richard Henderson63490392017-06-20 13:43:15 -0700563 if (args_are_copies(al, bl) && args_are_copies(ah, bh)) {
Richard Henderson6c4382f2012-10-02 11:32:27 -0700564 return do_constant_folding_cond_eq(c);
565 }
566 return 2;
567}
568
Richard Henderson24c9ae42012-10-02 11:32:21 -0700569static bool swap_commutative(TCGArg dest, TCGArg *p1, TCGArg *p2)
570{
571 TCGArg a1 = *p1, a2 = *p2;
572 int sum = 0;
Richard Henderson63490392017-06-20 13:43:15 -0700573 sum += arg_is_const(a1);
574 sum -= arg_is_const(a2);
Richard Henderson24c9ae42012-10-02 11:32:21 -0700575
576 /* Prefer the constant in second argument, and then the form
577 op a, a, b, which is better handled on non-RISC hosts. */
578 if (sum > 0 || (sum == 0 && dest == a2)) {
579 *p1 = a2;
580 *p2 = a1;
581 return true;
582 }
583 return false;
584}
585
Richard Henderson0bfcb862012-10-02 11:32:23 -0700586static bool swap_commutative2(TCGArg *p1, TCGArg *p2)
587{
588 int sum = 0;
Richard Henderson63490392017-06-20 13:43:15 -0700589 sum += arg_is_const(p1[0]);
590 sum += arg_is_const(p1[1]);
591 sum -= arg_is_const(p2[0]);
592 sum -= arg_is_const(p2[1]);
Richard Henderson0bfcb862012-10-02 11:32:23 -0700593 if (sum > 0) {
594 TCGArg t;
595 t = p1[0], p1[0] = p2[0], p2[0] = t;
596 t = p1[1], p1[1] = p2[1], p2[1] = t;
597 return true;
598 }
599 return false;
600}
601
Kirill Batuzov22613af2011-07-07 16:37:13 +0400602/* Propagate constants and copies, fold constant expressions. */
Aurelien Jarno36e60ef2015-06-04 21:53:27 +0200603void tcg_optimize(TCGContext *s)
Kirill Batuzov8f2e8c02011-07-07 16:37:12 +0400604{
Richard Hendersonc45cb8b2014-09-19 13:49:15 -0700605 int oi, oi_next, nb_temps, nb_globals;
Richard Hendersonacd93702016-12-08 12:28:42 -0800606 TCGOp *prev_mb = NULL;
Emilio G. Cota34184b02017-07-19 14:32:24 -0400607 struct tcg_temp_info *infos;
608 TCGTempSet temps_used;
Richard Henderson5d8f5362012-09-21 10:13:38 -0700609
Kirill Batuzov22613af2011-07-07 16:37:13 +0400610 /* Array VALS has an element for each temp.
611 If this temp holds a constant then its value is kept in VALS' element.
Aurelien Jarnoe590d4e2012-09-11 12:31:21 +0200612 If this temp is a copy of other ones then the other copies are
613 available through the doubly linked circular list. */
Kirill Batuzov8f2e8c02011-07-07 16:37:12 +0400614
615 nb_temps = s->nb_temps;
616 nb_globals = s->nb_globals;
Emilio G. Cota34184b02017-07-19 14:32:24 -0400617 bitmap_zero(temps_used.l, nb_temps);
618 infos = tcg_malloc(sizeof(struct tcg_temp_info) * nb_temps);
Kirill Batuzov8f2e8c02011-07-07 16:37:12 +0400619
Richard Hendersondcb8e752016-06-22 19:42:31 -0700620 for (oi = s->gen_op_buf[0].next; oi != 0; oi = oi_next) {
Richard Henderson24666ba2014-05-22 11:14:10 -0700621 tcg_target_ulong mask, partmask, affected;
Richard Hendersonc45cb8b2014-09-19 13:49:15 -0700622 int nb_oargs, nb_iargs, i;
Richard Hendersoncf066672014-03-22 20:06:52 -0700623 TCGArg tmp;
624
Richard Hendersonc45cb8b2014-09-19 13:49:15 -0700625 TCGOp * const op = &s->gen_op_buf[oi];
Richard Hendersonc45cb8b2014-09-19 13:49:15 -0700626 TCGOpcode opc = op->opc;
627 const TCGOpDef *def = &tcg_op_defs[opc];
628
629 oi_next = op->next;
Aurelien Jarno1208d7d2015-07-27 12:41:44 +0200630
631 /* Count the arguments, and initialize the temps that are
632 going to be used */
Richard Hendersonc45cb8b2014-09-19 13:49:15 -0700633 if (opc == INDEX_op_call) {
634 nb_oargs = op->callo;
635 nb_iargs = op->calli;
Aurelien Jarno1208d7d2015-07-27 12:41:44 +0200636 for (i = 0; i < nb_oargs + nb_iargs; i++) {
Richard Henderson63490392017-06-20 13:43:15 -0700637 TCGTemp *ts = arg_temp(op->args[i]);
638 if (ts) {
Emilio G. Cota34184b02017-07-19 14:32:24 -0400639 init_ts_info(infos, &temps_used, ts);
Aurelien Jarno1208d7d2015-07-27 12:41:44 +0200640 }
641 }
Aurelien Jarno1ff8c542012-09-11 16:18:49 +0200642 } else {
Richard Hendersoncf066672014-03-22 20:06:52 -0700643 nb_oargs = def->nb_oargs;
644 nb_iargs = def->nb_iargs;
Aurelien Jarno1208d7d2015-07-27 12:41:44 +0200645 for (i = 0; i < nb_oargs + nb_iargs; i++) {
Emilio G. Cota34184b02017-07-19 14:32:24 -0400646 init_arg_info(infos, &temps_used, op->args[i]);
Aurelien Jarno1208d7d2015-07-27 12:41:44 +0200647 }
Richard Hendersoncf066672014-03-22 20:06:52 -0700648 }
649
650 /* Do copy propagation */
651 for (i = nb_oargs; i < nb_oargs + nb_iargs; i++) {
Richard Henderson63490392017-06-20 13:43:15 -0700652 TCGTemp *ts = arg_temp(op->args[i]);
653 if (ts && ts_is_copy(ts)) {
654 op->args[i] = temp_arg(find_better_copy(s, ts));
Kirill Batuzov22613af2011-07-07 16:37:13 +0400655 }
656 }
657
Kirill Batuzov53108fb2011-07-07 16:37:14 +0400658 /* For commutative operations make constant second argument */
Richard Hendersonc45cb8b2014-09-19 13:49:15 -0700659 switch (opc) {
Kirill Batuzov53108fb2011-07-07 16:37:14 +0400660 CASE_OP_32_64(add):
661 CASE_OP_32_64(mul):
Kirill Batuzov9a810902011-07-07 16:37:15 +0400662 CASE_OP_32_64(and):
663 CASE_OP_32_64(or):
664 CASE_OP_32_64(xor):
Richard Hendersoncb25c802011-08-17 14:11:47 -0700665 CASE_OP_32_64(eqv):
666 CASE_OP_32_64(nand):
667 CASE_OP_32_64(nor):
Richard Henderson03271522013-08-14 14:35:56 -0700668 CASE_OP_32_64(muluh):
669 CASE_OP_32_64(mulsh):
Richard Hendersonacd93702016-12-08 12:28:42 -0800670 swap_commutative(op->args[0], &op->args[1], &op->args[2]);
Kirill Batuzov53108fb2011-07-07 16:37:14 +0400671 break;
Aurelien Jarno65a7cce2012-09-06 16:47:14 +0200672 CASE_OP_32_64(brcond):
Richard Hendersonacd93702016-12-08 12:28:42 -0800673 if (swap_commutative(-1, &op->args[0], &op->args[1])) {
674 op->args[2] = tcg_swap_cond(op->args[2]);
Aurelien Jarno65a7cce2012-09-06 16:47:14 +0200675 }
676 break;
677 CASE_OP_32_64(setcond):
Richard Hendersonacd93702016-12-08 12:28:42 -0800678 if (swap_commutative(op->args[0], &op->args[1], &op->args[2])) {
679 op->args[3] = tcg_swap_cond(op->args[3]);
Aurelien Jarno65a7cce2012-09-06 16:47:14 +0200680 }
681 break;
Richard Hendersonfa01a202012-09-21 10:13:37 -0700682 CASE_OP_32_64(movcond):
Richard Hendersonacd93702016-12-08 12:28:42 -0800683 if (swap_commutative(-1, &op->args[1], &op->args[2])) {
684 op->args[5] = tcg_swap_cond(op->args[5]);
Richard Hendersonfa01a202012-09-21 10:13:37 -0700685 }
Richard Henderson5d8f5362012-09-21 10:13:38 -0700686 /* For movcond, we canonicalize the "false" input reg to match
687 the destination reg so that the tcg backend can implement
688 a "move if true" operation. */
Richard Hendersonacd93702016-12-08 12:28:42 -0800689 if (swap_commutative(op->args[0], &op->args[4], &op->args[3])) {
690 op->args[5] = tcg_invert_cond(op->args[5]);
Richard Henderson5d8f5362012-09-21 10:13:38 -0700691 }
Richard Henderson1e484e62012-10-02 11:32:22 -0700692 break;
Richard Hendersond7156f72013-02-19 23:51:52 -0800693 CASE_OP_32_64(add2):
Richard Hendersonacd93702016-12-08 12:28:42 -0800694 swap_commutative(op->args[0], &op->args[2], &op->args[4]);
695 swap_commutative(op->args[1], &op->args[3], &op->args[5]);
Richard Henderson1e484e62012-10-02 11:32:22 -0700696 break;
Richard Hendersond7156f72013-02-19 23:51:52 -0800697 CASE_OP_32_64(mulu2):
Richard Henderson4d3203f2013-02-19 23:51:53 -0800698 CASE_OP_32_64(muls2):
Richard Hendersonacd93702016-12-08 12:28:42 -0800699 swap_commutative(op->args[0], &op->args[2], &op->args[3]);
Richard Henderson14149682012-10-02 11:32:30 -0700700 break;
Richard Henderson0bfcb862012-10-02 11:32:23 -0700701 case INDEX_op_brcond2_i32:
Richard Hendersonacd93702016-12-08 12:28:42 -0800702 if (swap_commutative2(&op->args[0], &op->args[2])) {
703 op->args[4] = tcg_swap_cond(op->args[4]);
Richard Henderson0bfcb862012-10-02 11:32:23 -0700704 }
705 break;
706 case INDEX_op_setcond2_i32:
Richard Hendersonacd93702016-12-08 12:28:42 -0800707 if (swap_commutative2(&op->args[1], &op->args[3])) {
708 op->args[5] = tcg_swap_cond(op->args[5]);
Richard Henderson0bfcb862012-10-02 11:32:23 -0700709 }
710 break;
Kirill Batuzov53108fb2011-07-07 16:37:14 +0400711 default:
712 break;
713 }
714
Richard Henderson2d497542013-03-21 09:13:33 -0700715 /* Simplify expressions for "shift/rot r, 0, a => movi r, 0",
716 and "sub r, 0, a => neg r, a" case. */
Richard Hendersonc45cb8b2014-09-19 13:49:15 -0700717 switch (opc) {
Aurelien Jarno01ee5282012-09-06 16:47:14 +0200718 CASE_OP_32_64(shl):
719 CASE_OP_32_64(shr):
720 CASE_OP_32_64(sar):
721 CASE_OP_32_64(rotl):
722 CASE_OP_32_64(rotr):
Richard Henderson63490392017-06-20 13:43:15 -0700723 if (arg_is_const(op->args[1])
724 && arg_info(op->args[1])->val == 0) {
Richard Hendersonacd93702016-12-08 12:28:42 -0800725 tcg_opt_gen_movi(s, op, op->args[0], 0);
Aurelien Jarno01ee5282012-09-06 16:47:14 +0200726 continue;
727 }
728 break;
Richard Henderson2d497542013-03-21 09:13:33 -0700729 CASE_OP_32_64(sub):
730 {
731 TCGOpcode neg_op;
732 bool have_neg;
733
Richard Henderson63490392017-06-20 13:43:15 -0700734 if (arg_is_const(op->args[2])) {
Richard Henderson2d497542013-03-21 09:13:33 -0700735 /* Proceed with possible constant folding. */
736 break;
737 }
Richard Hendersonc45cb8b2014-09-19 13:49:15 -0700738 if (opc == INDEX_op_sub_i32) {
Richard Henderson2d497542013-03-21 09:13:33 -0700739 neg_op = INDEX_op_neg_i32;
740 have_neg = TCG_TARGET_HAS_neg_i32;
741 } else {
742 neg_op = INDEX_op_neg_i64;
743 have_neg = TCG_TARGET_HAS_neg_i64;
744 }
745 if (!have_neg) {
746 break;
747 }
Richard Henderson63490392017-06-20 13:43:15 -0700748 if (arg_is_const(op->args[1])
749 && arg_info(op->args[1])->val == 0) {
Richard Hendersonc45cb8b2014-09-19 13:49:15 -0700750 op->opc = neg_op;
Richard Hendersonacd93702016-12-08 12:28:42 -0800751 reset_temp(op->args[0]);
752 op->args[1] = op->args[2];
Richard Henderson2d497542013-03-21 09:13:33 -0700753 continue;
754 }
755 }
756 break;
Richard Hendersone201b562014-01-28 13:15:38 -0800757 CASE_OP_32_64(xor):
758 CASE_OP_32_64(nand):
Richard Henderson63490392017-06-20 13:43:15 -0700759 if (!arg_is_const(op->args[1])
760 && arg_is_const(op->args[2])
761 && arg_info(op->args[2])->val == -1) {
Richard Hendersone201b562014-01-28 13:15:38 -0800762 i = 1;
763 goto try_not;
764 }
765 break;
766 CASE_OP_32_64(nor):
Richard Henderson63490392017-06-20 13:43:15 -0700767 if (!arg_is_const(op->args[1])
768 && arg_is_const(op->args[2])
769 && arg_info(op->args[2])->val == 0) {
Richard Hendersone201b562014-01-28 13:15:38 -0800770 i = 1;
771 goto try_not;
772 }
773 break;
774 CASE_OP_32_64(andc):
Richard Henderson63490392017-06-20 13:43:15 -0700775 if (!arg_is_const(op->args[2])
776 && arg_is_const(op->args[1])
777 && arg_info(op->args[1])->val == -1) {
Richard Hendersone201b562014-01-28 13:15:38 -0800778 i = 2;
779 goto try_not;
780 }
781 break;
782 CASE_OP_32_64(orc):
783 CASE_OP_32_64(eqv):
Richard Henderson63490392017-06-20 13:43:15 -0700784 if (!arg_is_const(op->args[2])
785 && arg_is_const(op->args[1])
786 && arg_info(op->args[1])->val == 0) {
Richard Hendersone201b562014-01-28 13:15:38 -0800787 i = 2;
788 goto try_not;
789 }
790 break;
791 try_not:
792 {
793 TCGOpcode not_op;
794 bool have_not;
795
796 if (def->flags & TCG_OPF_64BIT) {
797 not_op = INDEX_op_not_i64;
798 have_not = TCG_TARGET_HAS_not_i64;
799 } else {
800 not_op = INDEX_op_not_i32;
801 have_not = TCG_TARGET_HAS_not_i32;
802 }
803 if (!have_not) {
804 break;
805 }
Richard Hendersonc45cb8b2014-09-19 13:49:15 -0700806 op->opc = not_op;
Richard Hendersonacd93702016-12-08 12:28:42 -0800807 reset_temp(op->args[0]);
808 op->args[1] = op->args[i];
Richard Hendersone201b562014-01-28 13:15:38 -0800809 continue;
810 }
Aurelien Jarno01ee5282012-09-06 16:47:14 +0200811 default:
812 break;
813 }
814
Richard Henderson464a1442014-01-31 07:42:11 -0600815 /* Simplify expression for "op r, a, const => mov r, a" cases */
Richard Hendersonc45cb8b2014-09-19 13:49:15 -0700816 switch (opc) {
Kirill Batuzov53108fb2011-07-07 16:37:14 +0400817 CASE_OP_32_64(add):
818 CASE_OP_32_64(sub):
Kirill Batuzov55c09752011-07-07 16:37:16 +0400819 CASE_OP_32_64(shl):
820 CASE_OP_32_64(shr):
821 CASE_OP_32_64(sar):
Richard Henderson25c4d9c2011-08-17 14:11:46 -0700822 CASE_OP_32_64(rotl):
823 CASE_OP_32_64(rotr):
Aurelien Jarno38ee1882012-09-06 16:47:14 +0200824 CASE_OP_32_64(or):
825 CASE_OP_32_64(xor):
Richard Henderson464a1442014-01-31 07:42:11 -0600826 CASE_OP_32_64(andc):
Richard Henderson63490392017-06-20 13:43:15 -0700827 if (!arg_is_const(op->args[1])
828 && arg_is_const(op->args[2])
829 && arg_info(op->args[2])->val == 0) {
Richard Hendersonacd93702016-12-08 12:28:42 -0800830 tcg_opt_gen_mov(s, op, op->args[0], op->args[1]);
Aurelien Jarno97a79eb2015-06-05 11:19:18 +0200831 continue;
Kirill Batuzov53108fb2011-07-07 16:37:14 +0400832 }
833 break;
Richard Henderson464a1442014-01-31 07:42:11 -0600834 CASE_OP_32_64(and):
835 CASE_OP_32_64(orc):
836 CASE_OP_32_64(eqv):
Richard Henderson63490392017-06-20 13:43:15 -0700837 if (!arg_is_const(op->args[1])
838 && arg_is_const(op->args[2])
839 && arg_info(op->args[2])->val == -1) {
Richard Hendersonacd93702016-12-08 12:28:42 -0800840 tcg_opt_gen_mov(s, op, op->args[0], op->args[1]);
Aurelien Jarno97a79eb2015-06-05 11:19:18 +0200841 continue;
Richard Henderson464a1442014-01-31 07:42:11 -0600842 }
843 break;
Aurelien Jarno56e49432012-09-06 16:47:13 +0200844 default:
845 break;
846 }
847
Aurelien Jarno30312442013-09-03 08:27:38 +0200848 /* Simplify using known-zero bits. Currently only ops with a single
849 output argument is supported. */
Paolo Bonzini3a9d8b12013-01-11 15:42:52 -0800850 mask = -1;
Paolo Bonzini633f6502013-01-11 15:42:53 -0800851 affected = -1;
Richard Hendersonc45cb8b2014-09-19 13:49:15 -0700852 switch (opc) {
Paolo Bonzini3a9d8b12013-01-11 15:42:52 -0800853 CASE_OP_32_64(ext8s):
Richard Henderson63490392017-06-20 13:43:15 -0700854 if ((arg_info(op->args[1])->mask & 0x80) != 0) {
Paolo Bonzini3a9d8b12013-01-11 15:42:52 -0800855 break;
856 }
857 CASE_OP_32_64(ext8u):
858 mask = 0xff;
859 goto and_const;
860 CASE_OP_32_64(ext16s):
Richard Henderson63490392017-06-20 13:43:15 -0700861 if ((arg_info(op->args[1])->mask & 0x8000) != 0) {
Paolo Bonzini3a9d8b12013-01-11 15:42:52 -0800862 break;
863 }
864 CASE_OP_32_64(ext16u):
865 mask = 0xffff;
866 goto and_const;
867 case INDEX_op_ext32s_i64:
Richard Henderson63490392017-06-20 13:43:15 -0700868 if ((arg_info(op->args[1])->mask & 0x80000000) != 0) {
Paolo Bonzini3a9d8b12013-01-11 15:42:52 -0800869 break;
870 }
871 case INDEX_op_ext32u_i64:
872 mask = 0xffffffffU;
873 goto and_const;
874
875 CASE_OP_32_64(and):
Richard Henderson63490392017-06-20 13:43:15 -0700876 mask = arg_info(op->args[2])->mask;
877 if (arg_is_const(op->args[2])) {
Paolo Bonzini3a9d8b12013-01-11 15:42:52 -0800878 and_const:
Richard Henderson63490392017-06-20 13:43:15 -0700879 affected = arg_info(op->args[1])->mask & ~mask;
Paolo Bonzini3a9d8b12013-01-11 15:42:52 -0800880 }
Richard Henderson63490392017-06-20 13:43:15 -0700881 mask = arg_info(op->args[1])->mask & mask;
Paolo Bonzini3a9d8b12013-01-11 15:42:52 -0800882 break;
883
Aurelien Jarno8bcb5c82015-07-27 12:41:45 +0200884 case INDEX_op_ext_i32_i64:
Richard Henderson63490392017-06-20 13:43:15 -0700885 if ((arg_info(op->args[1])->mask & 0x80000000) != 0) {
Aurelien Jarno8bcb5c82015-07-27 12:41:45 +0200886 break;
887 }
888 case INDEX_op_extu_i32_i64:
889 /* We do not compute affected as it is a size changing op. */
Richard Henderson63490392017-06-20 13:43:15 -0700890 mask = (uint32_t)arg_info(op->args[1])->mask;
Aurelien Jarno8bcb5c82015-07-27 12:41:45 +0200891 break;
892
Richard Henderson23ec69ed2014-01-28 12:03:24 -0800893 CASE_OP_32_64(andc):
894 /* Known-zeros does not imply known-ones. Therefore unless
Richard Hendersonacd93702016-12-08 12:28:42 -0800895 op->args[2] is constant, we can't infer anything from it. */
Richard Henderson63490392017-06-20 13:43:15 -0700896 if (arg_is_const(op->args[2])) {
897 mask = ~arg_info(op->args[2])->mask;
Richard Henderson23ec69ed2014-01-28 12:03:24 -0800898 goto and_const;
899 }
Richard Henderson63490392017-06-20 13:43:15 -0700900 /* But we certainly know nothing outside args[1] may be set. */
901 mask = arg_info(op->args[1])->mask;
Richard Henderson23ec69ed2014-01-28 12:03:24 -0800902 break;
903
Aurelien Jarnoe46b2252013-09-03 08:27:38 +0200904 case INDEX_op_sar_i32:
Richard Henderson63490392017-06-20 13:43:15 -0700905 if (arg_is_const(op->args[2])) {
906 tmp = arg_info(op->args[2])->val & 31;
907 mask = (int32_t)arg_info(op->args[1])->mask >> tmp;
Aurelien Jarnoe46b2252013-09-03 08:27:38 +0200908 }
909 break;
910 case INDEX_op_sar_i64:
Richard Henderson63490392017-06-20 13:43:15 -0700911 if (arg_is_const(op->args[2])) {
912 tmp = arg_info(op->args[2])->val & 63;
913 mask = (int64_t)arg_info(op->args[1])->mask >> tmp;
Paolo Bonzini3a9d8b12013-01-11 15:42:52 -0800914 }
915 break;
916
Aurelien Jarnoe46b2252013-09-03 08:27:38 +0200917 case INDEX_op_shr_i32:
Richard Henderson63490392017-06-20 13:43:15 -0700918 if (arg_is_const(op->args[2])) {
919 tmp = arg_info(op->args[2])->val & 31;
920 mask = (uint32_t)arg_info(op->args[1])->mask >> tmp;
Aurelien Jarnoe46b2252013-09-03 08:27:38 +0200921 }
922 break;
923 case INDEX_op_shr_i64:
Richard Henderson63490392017-06-20 13:43:15 -0700924 if (arg_is_const(op->args[2])) {
925 tmp = arg_info(op->args[2])->val & 63;
926 mask = (uint64_t)arg_info(op->args[1])->mask >> tmp;
Paolo Bonzini3a9d8b12013-01-11 15:42:52 -0800927 }
928 break;
929
Richard Henderson609ad702015-07-24 07:16:00 -0700930 case INDEX_op_extrl_i64_i32:
Richard Henderson63490392017-06-20 13:43:15 -0700931 mask = (uint32_t)arg_info(op->args[1])->mask;
Richard Henderson609ad702015-07-24 07:16:00 -0700932 break;
933 case INDEX_op_extrh_i64_i32:
Richard Henderson63490392017-06-20 13:43:15 -0700934 mask = (uint64_t)arg_info(op->args[1])->mask >> 32;
Richard Henderson4bb7a412013-09-09 17:03:24 -0700935 break;
936
Paolo Bonzini3a9d8b12013-01-11 15:42:52 -0800937 CASE_OP_32_64(shl):
Richard Henderson63490392017-06-20 13:43:15 -0700938 if (arg_is_const(op->args[2])) {
939 tmp = arg_info(op->args[2])->val & (TCG_TARGET_REG_BITS - 1);
940 mask = arg_info(op->args[1])->mask << tmp;
Paolo Bonzini3a9d8b12013-01-11 15:42:52 -0800941 }
942 break;
943
944 CASE_OP_32_64(neg):
945 /* Set to 1 all bits to the left of the rightmost. */
Richard Henderson63490392017-06-20 13:43:15 -0700946 mask = -(arg_info(op->args[1])->mask
947 & -arg_info(op->args[1])->mask);
Paolo Bonzini3a9d8b12013-01-11 15:42:52 -0800948 break;
949
950 CASE_OP_32_64(deposit):
Richard Henderson63490392017-06-20 13:43:15 -0700951 mask = deposit64(arg_info(op->args[1])->mask,
952 op->args[3], op->args[4],
953 arg_info(op->args[2])->mask);
Paolo Bonzini3a9d8b12013-01-11 15:42:52 -0800954 break;
955
Richard Henderson7ec8bab2016-10-14 12:04:32 -0500956 CASE_OP_32_64(extract):
Richard Henderson63490392017-06-20 13:43:15 -0700957 mask = extract64(arg_info(op->args[1])->mask,
958 op->args[2], op->args[3]);
Richard Hendersonacd93702016-12-08 12:28:42 -0800959 if (op->args[2] == 0) {
Richard Henderson63490392017-06-20 13:43:15 -0700960 affected = arg_info(op->args[1])->mask & ~mask;
Richard Henderson7ec8bab2016-10-14 12:04:32 -0500961 }
962 break;
963 CASE_OP_32_64(sextract):
Richard Henderson63490392017-06-20 13:43:15 -0700964 mask = sextract64(arg_info(op->args[1])->mask,
Richard Hendersonacd93702016-12-08 12:28:42 -0800965 op->args[2], op->args[3]);
966 if (op->args[2] == 0 && (tcg_target_long)mask >= 0) {
Richard Henderson63490392017-06-20 13:43:15 -0700967 affected = arg_info(op->args[1])->mask & ~mask;
Richard Henderson7ec8bab2016-10-14 12:04:32 -0500968 }
969 break;
970
Paolo Bonzini3a9d8b12013-01-11 15:42:52 -0800971 CASE_OP_32_64(or):
972 CASE_OP_32_64(xor):
Richard Henderson63490392017-06-20 13:43:15 -0700973 mask = arg_info(op->args[1])->mask | arg_info(op->args[2])->mask;
Paolo Bonzini3a9d8b12013-01-11 15:42:52 -0800974 break;
975
Richard Henderson0e28d002016-11-16 09:23:28 +0100976 case INDEX_op_clz_i32:
977 case INDEX_op_ctz_i32:
Richard Henderson63490392017-06-20 13:43:15 -0700978 mask = arg_info(op->args[2])->mask | 31;
Richard Henderson0e28d002016-11-16 09:23:28 +0100979 break;
980
981 case INDEX_op_clz_i64:
982 case INDEX_op_ctz_i64:
Richard Henderson63490392017-06-20 13:43:15 -0700983 mask = arg_info(op->args[2])->mask | 63;
Richard Henderson0e28d002016-11-16 09:23:28 +0100984 break;
985
Richard Hendersona768e4e2016-11-21 11:13:39 +0100986 case INDEX_op_ctpop_i32:
987 mask = 32 | 31;
988 break;
989 case INDEX_op_ctpop_i64:
990 mask = 64 | 63;
991 break;
992
Paolo Bonzini3a9d8b12013-01-11 15:42:52 -0800993 CASE_OP_32_64(setcond):
Richard Hendersona7635512014-04-23 22:18:30 -0700994 case INDEX_op_setcond2_i32:
Paolo Bonzini3a9d8b12013-01-11 15:42:52 -0800995 mask = 1;
996 break;
997
998 CASE_OP_32_64(movcond):
Richard Henderson63490392017-06-20 13:43:15 -0700999 mask = arg_info(op->args[3])->mask | arg_info(op->args[4])->mask;
Paolo Bonzini3a9d8b12013-01-11 15:42:52 -08001000 break;
1001
Aurelien Jarnoc8d70272013-09-03 08:27:39 +02001002 CASE_OP_32_64(ld8u):
Aurelien Jarnoc8d70272013-09-03 08:27:39 +02001003 mask = 0xff;
1004 break;
1005 CASE_OP_32_64(ld16u):
Aurelien Jarnoc8d70272013-09-03 08:27:39 +02001006 mask = 0xffff;
1007 break;
1008 case INDEX_op_ld32u_i64:
Aurelien Jarnoc8d70272013-09-03 08:27:39 +02001009 mask = 0xffffffffu;
1010 break;
1011
1012 CASE_OP_32_64(qemu_ld):
1013 {
Richard Hendersonacd93702016-12-08 12:28:42 -08001014 TCGMemOpIdx oi = op->args[nb_oargs + nb_iargs];
Richard Henderson59227d52015-05-12 11:51:44 -07001015 TCGMemOp mop = get_memop(oi);
Aurelien Jarnoc8d70272013-09-03 08:27:39 +02001016 if (!(mop & MO_SIGN)) {
1017 mask = (2ULL << ((8 << (mop & MO_SIZE)) - 1)) - 1;
1018 }
1019 }
1020 break;
1021
Paolo Bonzini3a9d8b12013-01-11 15:42:52 -08001022 default:
1023 break;
1024 }
1025
Richard Hendersonbc8d6882014-06-08 18:24:14 -07001026 /* 32-bit ops generate 32-bit results. For the result is zero test
1027 below, we can ignore high bits, but for further optimizations we
1028 need to record that the high bits contain garbage. */
Richard Henderson24666ba2014-05-22 11:14:10 -07001029 partmask = mask;
Richard Hendersonbc8d6882014-06-08 18:24:14 -07001030 if (!(def->flags & TCG_OPF_64BIT)) {
Richard Henderson24666ba2014-05-22 11:14:10 -07001031 mask |= ~(tcg_target_ulong)0xffffffffu;
1032 partmask &= 0xffffffffu;
1033 affected &= 0xffffffffu;
Aurelien Jarnof096dc92013-09-03 08:27:38 +02001034 }
1035
Richard Henderson24666ba2014-05-22 11:14:10 -07001036 if (partmask == 0) {
Aurelien Jarnoeabb7b92016-04-21 10:48:49 +02001037 tcg_debug_assert(nb_oargs == 1);
Richard Hendersonacd93702016-12-08 12:28:42 -08001038 tcg_opt_gen_movi(s, op, op->args[0], 0);
Paolo Bonzini633f6502013-01-11 15:42:53 -08001039 continue;
1040 }
1041 if (affected == 0) {
Aurelien Jarnoeabb7b92016-04-21 10:48:49 +02001042 tcg_debug_assert(nb_oargs == 1);
Richard Hendersonacd93702016-12-08 12:28:42 -08001043 tcg_opt_gen_mov(s, op, op->args[0], op->args[1]);
Paolo Bonzini633f6502013-01-11 15:42:53 -08001044 continue;
1045 }
1046
Aurelien Jarno56e49432012-09-06 16:47:13 +02001047 /* Simplify expression for "op r, a, 0 => movi r, 0" cases */
Richard Hendersonc45cb8b2014-09-19 13:49:15 -07001048 switch (opc) {
Aurelien Jarno61251c02012-09-06 16:47:14 +02001049 CASE_OP_32_64(and):
Kirill Batuzov53108fb2011-07-07 16:37:14 +04001050 CASE_OP_32_64(mul):
Richard Henderson03271522013-08-14 14:35:56 -07001051 CASE_OP_32_64(muluh):
1052 CASE_OP_32_64(mulsh):
Richard Henderson63490392017-06-20 13:43:15 -07001053 if (arg_is_const(op->args[2])
1054 && arg_info(op->args[2])->val == 0) {
Richard Hendersonacd93702016-12-08 12:28:42 -08001055 tcg_opt_gen_movi(s, op, op->args[0], 0);
Kirill Batuzov53108fb2011-07-07 16:37:14 +04001056 continue;
1057 }
1058 break;
Aurelien Jarno56e49432012-09-06 16:47:13 +02001059 default:
1060 break;
1061 }
1062
1063 /* Simplify expression for "op r, a, a => mov r, a" cases */
Richard Hendersonc45cb8b2014-09-19 13:49:15 -07001064 switch (opc) {
Kirill Batuzov9a810902011-07-07 16:37:15 +04001065 CASE_OP_32_64(or):
1066 CASE_OP_32_64(and):
Richard Henderson63490392017-06-20 13:43:15 -07001067 if (args_are_copies(op->args[1], op->args[2])) {
Richard Hendersonacd93702016-12-08 12:28:42 -08001068 tcg_opt_gen_mov(s, op, op->args[0], op->args[1]);
Kirill Batuzov9a810902011-07-07 16:37:15 +04001069 continue;
1070 }
1071 break;
Blue Swirlfe0de7a2011-07-30 19:18:32 +00001072 default:
1073 break;
Kirill Batuzov53108fb2011-07-07 16:37:14 +04001074 }
1075
Aurelien Jarno3c941932012-09-18 19:12:36 +02001076 /* Simplify expression for "op r, a, a => movi r, 0" cases */
Richard Hendersonc45cb8b2014-09-19 13:49:15 -07001077 switch (opc) {
Richard Hendersone64e9582014-01-28 13:26:17 -08001078 CASE_OP_32_64(andc):
Aurelien Jarno3c941932012-09-18 19:12:36 +02001079 CASE_OP_32_64(sub):
1080 CASE_OP_32_64(xor):
Richard Henderson63490392017-06-20 13:43:15 -07001081 if (args_are_copies(op->args[1], op->args[2])) {
Richard Hendersonacd93702016-12-08 12:28:42 -08001082 tcg_opt_gen_movi(s, op, op->args[0], 0);
Aurelien Jarno3c941932012-09-18 19:12:36 +02001083 continue;
1084 }
1085 break;
1086 default:
1087 break;
1088 }
1089
Kirill Batuzov22613af2011-07-07 16:37:13 +04001090 /* Propagate constants through copy operations and do constant
1091 folding. Constants will be substituted to arguments by register
1092 allocator where needed and possible. Also detect copies. */
Richard Hendersonc45cb8b2014-09-19 13:49:15 -07001093 switch (opc) {
Kirill Batuzov22613af2011-07-07 16:37:13 +04001094 CASE_OP_32_64(mov):
Richard Hendersonacd93702016-12-08 12:28:42 -08001095 tcg_opt_gen_mov(s, op, op->args[0], op->args[1]);
Aurelien Jarno97a79eb2015-06-05 11:19:18 +02001096 break;
Kirill Batuzov22613af2011-07-07 16:37:13 +04001097 CASE_OP_32_64(movi):
Richard Hendersonacd93702016-12-08 12:28:42 -08001098 tcg_opt_gen_movi(s, op, op->args[0], op->args[1]);
Kirill Batuzov22613af2011-07-07 16:37:13 +04001099 break;
Richard Henderson6e14e912012-10-02 11:32:24 -07001100
Kirill Batuzova640f032011-07-07 16:37:17 +04001101 CASE_OP_32_64(not):
Richard Hendersoncb25c802011-08-17 14:11:47 -07001102 CASE_OP_32_64(neg):
Richard Henderson25c4d9c2011-08-17 14:11:46 -07001103 CASE_OP_32_64(ext8s):
1104 CASE_OP_32_64(ext8u):
1105 CASE_OP_32_64(ext16s):
1106 CASE_OP_32_64(ext16u):
Richard Hendersona768e4e2016-11-21 11:13:39 +01001107 CASE_OP_32_64(ctpop):
Kirill Batuzova640f032011-07-07 16:37:17 +04001108 case INDEX_op_ext32s_i64:
1109 case INDEX_op_ext32u_i64:
Aurelien Jarno8bcb5c82015-07-27 12:41:45 +02001110 case INDEX_op_ext_i32_i64:
1111 case INDEX_op_extu_i32_i64:
Richard Henderson609ad702015-07-24 07:16:00 -07001112 case INDEX_op_extrl_i64_i32:
1113 case INDEX_op_extrh_i64_i32:
Richard Henderson63490392017-06-20 13:43:15 -07001114 if (arg_is_const(op->args[1])) {
1115 tmp = do_constant_folding(opc, arg_info(op->args[1])->val, 0);
Richard Hendersonacd93702016-12-08 12:28:42 -08001116 tcg_opt_gen_movi(s, op, op->args[0], tmp);
Richard Henderson6e14e912012-10-02 11:32:24 -07001117 break;
Kirill Batuzova640f032011-07-07 16:37:17 +04001118 }
Richard Henderson6e14e912012-10-02 11:32:24 -07001119 goto do_default;
1120
Kirill Batuzov53108fb2011-07-07 16:37:14 +04001121 CASE_OP_32_64(add):
1122 CASE_OP_32_64(sub):
1123 CASE_OP_32_64(mul):
Kirill Batuzov9a810902011-07-07 16:37:15 +04001124 CASE_OP_32_64(or):
1125 CASE_OP_32_64(and):
1126 CASE_OP_32_64(xor):
Kirill Batuzov55c09752011-07-07 16:37:16 +04001127 CASE_OP_32_64(shl):
1128 CASE_OP_32_64(shr):
1129 CASE_OP_32_64(sar):
Richard Henderson25c4d9c2011-08-17 14:11:46 -07001130 CASE_OP_32_64(rotl):
1131 CASE_OP_32_64(rotr):
Richard Hendersoncb25c802011-08-17 14:11:47 -07001132 CASE_OP_32_64(andc):
1133 CASE_OP_32_64(orc):
1134 CASE_OP_32_64(eqv):
1135 CASE_OP_32_64(nand):
1136 CASE_OP_32_64(nor):
Richard Henderson03271522013-08-14 14:35:56 -07001137 CASE_OP_32_64(muluh):
1138 CASE_OP_32_64(mulsh):
Richard Henderson01547f72013-08-14 15:22:46 -07001139 CASE_OP_32_64(div):
1140 CASE_OP_32_64(divu):
1141 CASE_OP_32_64(rem):
1142 CASE_OP_32_64(remu):
Richard Henderson63490392017-06-20 13:43:15 -07001143 if (arg_is_const(op->args[1]) && arg_is_const(op->args[2])) {
1144 tmp = do_constant_folding(opc, arg_info(op->args[1])->val,
1145 arg_info(op->args[2])->val);
Richard Hendersonacd93702016-12-08 12:28:42 -08001146 tcg_opt_gen_movi(s, op, op->args[0], tmp);
Richard Henderson6e14e912012-10-02 11:32:24 -07001147 break;
Kirill Batuzov53108fb2011-07-07 16:37:14 +04001148 }
Richard Henderson6e14e912012-10-02 11:32:24 -07001149 goto do_default;
1150
Richard Henderson0e28d002016-11-16 09:23:28 +01001151 CASE_OP_32_64(clz):
1152 CASE_OP_32_64(ctz):
Richard Henderson63490392017-06-20 13:43:15 -07001153 if (arg_is_const(op->args[1])) {
1154 TCGArg v = arg_info(op->args[1])->val;
Richard Henderson0e28d002016-11-16 09:23:28 +01001155 if (v != 0) {
1156 tmp = do_constant_folding(opc, v, 0);
Richard Hendersonacd93702016-12-08 12:28:42 -08001157 tcg_opt_gen_movi(s, op, op->args[0], tmp);
Richard Henderson0e28d002016-11-16 09:23:28 +01001158 } else {
Richard Hendersonacd93702016-12-08 12:28:42 -08001159 tcg_opt_gen_mov(s, op, op->args[0], op->args[2]);
Richard Henderson0e28d002016-11-16 09:23:28 +01001160 }
1161 break;
1162 }
1163 goto do_default;
1164
Aurelien Jarno7ef55fc2012-09-21 11:07:29 +02001165 CASE_OP_32_64(deposit):
Richard Henderson63490392017-06-20 13:43:15 -07001166 if (arg_is_const(op->args[1]) && arg_is_const(op->args[2])) {
1167 tmp = deposit64(arg_info(op->args[1])->val,
1168 op->args[3], op->args[4],
1169 arg_info(op->args[2])->val);
Richard Hendersonacd93702016-12-08 12:28:42 -08001170 tcg_opt_gen_movi(s, op, op->args[0], tmp);
Richard Henderson6e14e912012-10-02 11:32:24 -07001171 break;
Aurelien Jarno7ef55fc2012-09-21 11:07:29 +02001172 }
Richard Henderson6e14e912012-10-02 11:32:24 -07001173 goto do_default;
1174
Richard Henderson7ec8bab2016-10-14 12:04:32 -05001175 CASE_OP_32_64(extract):
Richard Henderson63490392017-06-20 13:43:15 -07001176 if (arg_is_const(op->args[1])) {
1177 tmp = extract64(arg_info(op->args[1])->val,
Richard Hendersonacd93702016-12-08 12:28:42 -08001178 op->args[2], op->args[3]);
1179 tcg_opt_gen_movi(s, op, op->args[0], tmp);
Richard Henderson7ec8bab2016-10-14 12:04:32 -05001180 break;
1181 }
1182 goto do_default;
1183
1184 CASE_OP_32_64(sextract):
Richard Henderson63490392017-06-20 13:43:15 -07001185 if (arg_is_const(op->args[1])) {
1186 tmp = sextract64(arg_info(op->args[1])->val,
Richard Hendersonacd93702016-12-08 12:28:42 -08001187 op->args[2], op->args[3]);
1188 tcg_opt_gen_movi(s, op, op->args[0], tmp);
Richard Henderson7ec8bab2016-10-14 12:04:32 -05001189 break;
1190 }
1191 goto do_default;
1192
Aurelien Jarnof8dd19e2012-09-06 16:47:14 +02001193 CASE_OP_32_64(setcond):
Richard Hendersonacd93702016-12-08 12:28:42 -08001194 tmp = do_constant_folding_cond(opc, op->args[1],
1195 op->args[2], op->args[3]);
Aurelien Jarnob336ceb2012-09-18 19:37:00 +02001196 if (tmp != 2) {
Richard Hendersonacd93702016-12-08 12:28:42 -08001197 tcg_opt_gen_movi(s, op, op->args[0], tmp);
Richard Henderson6e14e912012-10-02 11:32:24 -07001198 break;
Aurelien Jarnof8dd19e2012-09-06 16:47:14 +02001199 }
Richard Henderson6e14e912012-10-02 11:32:24 -07001200 goto do_default;
1201
Aurelien Jarnofbeaa262012-09-06 16:47:14 +02001202 CASE_OP_32_64(brcond):
Richard Hendersonacd93702016-12-08 12:28:42 -08001203 tmp = do_constant_folding_cond(opc, op->args[0],
1204 op->args[1], op->args[2]);
Aurelien Jarnob336ceb2012-09-18 19:37:00 +02001205 if (tmp != 2) {
1206 if (tmp) {
Emilio G. Cota34184b02017-07-19 14:32:24 -04001207 bitmap_zero(temps_used.l, nb_temps);
Richard Hendersonc45cb8b2014-09-19 13:49:15 -07001208 op->opc = INDEX_op_br;
Richard Hendersonacd93702016-12-08 12:28:42 -08001209 op->args[0] = op->args[3];
Aurelien Jarnofbeaa262012-09-06 16:47:14 +02001210 } else {
Richard Henderson0c627cd2014-03-30 16:51:54 -07001211 tcg_op_remove(s, op);
Aurelien Jarnofbeaa262012-09-06 16:47:14 +02001212 }
Richard Henderson6e14e912012-10-02 11:32:24 -07001213 break;
Aurelien Jarnofbeaa262012-09-06 16:47:14 +02001214 }
Richard Henderson6e14e912012-10-02 11:32:24 -07001215 goto do_default;
1216
Richard Hendersonfa01a202012-09-21 10:13:37 -07001217 CASE_OP_32_64(movcond):
Richard Hendersonacd93702016-12-08 12:28:42 -08001218 tmp = do_constant_folding_cond(opc, op->args[1],
1219 op->args[2], op->args[5]);
Aurelien Jarnob336ceb2012-09-18 19:37:00 +02001220 if (tmp != 2) {
Richard Hendersonacd93702016-12-08 12:28:42 -08001221 tcg_opt_gen_mov(s, op, op->args[0], op->args[4-tmp]);
Richard Henderson6e14e912012-10-02 11:32:24 -07001222 break;
Richard Hendersonfa01a202012-09-21 10:13:37 -07001223 }
Richard Henderson63490392017-06-20 13:43:15 -07001224 if (arg_is_const(op->args[3]) && arg_is_const(op->args[4])) {
1225 tcg_target_ulong tv = arg_info(op->args[3])->val;
1226 tcg_target_ulong fv = arg_info(op->args[4])->val;
Richard Hendersonacd93702016-12-08 12:28:42 -08001227 TCGCond cond = op->args[5];
Richard Henderson333b21b2016-10-23 20:44:32 -07001228 if (fv == 1 && tv == 0) {
1229 cond = tcg_invert_cond(cond);
1230 } else if (!(tv == 1 && fv == 0)) {
1231 goto do_default;
1232 }
Richard Hendersonacd93702016-12-08 12:28:42 -08001233 op->args[3] = cond;
Richard Henderson333b21b2016-10-23 20:44:32 -07001234 op->opc = opc = (opc == INDEX_op_movcond_i32
1235 ? INDEX_op_setcond_i32
1236 : INDEX_op_setcond_i64);
1237 nb_iargs = 2;
1238 }
Richard Henderson6e14e912012-10-02 11:32:24 -07001239 goto do_default;
1240
Richard Henderson212c3282012-10-02 11:32:28 -07001241 case INDEX_op_add2_i32:
1242 case INDEX_op_sub2_i32:
Richard Henderson63490392017-06-20 13:43:15 -07001243 if (arg_is_const(op->args[2]) && arg_is_const(op->args[3])
1244 && arg_is_const(op->args[4]) && arg_is_const(op->args[5])) {
1245 uint32_t al = arg_info(op->args[2])->val;
1246 uint32_t ah = arg_info(op->args[3])->val;
1247 uint32_t bl = arg_info(op->args[4])->val;
1248 uint32_t bh = arg_info(op->args[5])->val;
Richard Henderson212c3282012-10-02 11:32:28 -07001249 uint64_t a = ((uint64_t)ah << 32) | al;
1250 uint64_t b = ((uint64_t)bh << 32) | bl;
1251 TCGArg rl, rh;
Richard Henderson5a184072016-06-23 20:34:33 -07001252 TCGOp *op2 = tcg_op_insert_before(s, op, INDEX_op_movi_i32, 2);
Richard Henderson212c3282012-10-02 11:32:28 -07001253
Richard Hendersonc45cb8b2014-09-19 13:49:15 -07001254 if (opc == INDEX_op_add2_i32) {
Richard Henderson212c3282012-10-02 11:32:28 -07001255 a += b;
1256 } else {
1257 a -= b;
1258 }
1259
Richard Hendersonacd93702016-12-08 12:28:42 -08001260 rl = op->args[0];
1261 rh = op->args[1];
1262 tcg_opt_gen_movi(s, op, rl, (int32_t)a);
1263 tcg_opt_gen_movi(s, op2, rh, (int32_t)(a >> 32));
Richard Hendersonc45cb8b2014-09-19 13:49:15 -07001264
1265 /* We've done all we need to do with the movi. Skip it. */
1266 oi_next = op2->next;
Richard Henderson212c3282012-10-02 11:32:28 -07001267 break;
1268 }
1269 goto do_default;
1270
Richard Henderson14149682012-10-02 11:32:30 -07001271 case INDEX_op_mulu2_i32:
Richard Henderson63490392017-06-20 13:43:15 -07001272 if (arg_is_const(op->args[2]) && arg_is_const(op->args[3])) {
1273 uint32_t a = arg_info(op->args[2])->val;
1274 uint32_t b = arg_info(op->args[3])->val;
Richard Henderson14149682012-10-02 11:32:30 -07001275 uint64_t r = (uint64_t)a * b;
1276 TCGArg rl, rh;
Richard Henderson5a184072016-06-23 20:34:33 -07001277 TCGOp *op2 = tcg_op_insert_before(s, op, INDEX_op_movi_i32, 2);
Richard Henderson14149682012-10-02 11:32:30 -07001278
Richard Hendersonacd93702016-12-08 12:28:42 -08001279 rl = op->args[0];
1280 rh = op->args[1];
1281 tcg_opt_gen_movi(s, op, rl, (int32_t)r);
1282 tcg_opt_gen_movi(s, op2, rh, (int32_t)(r >> 32));
Richard Hendersonc45cb8b2014-09-19 13:49:15 -07001283
1284 /* We've done all we need to do with the movi. Skip it. */
1285 oi_next = op2->next;
Richard Henderson14149682012-10-02 11:32:30 -07001286 break;
1287 }
1288 goto do_default;
1289
Richard Hendersonbc1473e2012-10-02 11:32:25 -07001290 case INDEX_op_brcond2_i32:
Richard Hendersonacd93702016-12-08 12:28:42 -08001291 tmp = do_constant_folding_cond2(&op->args[0], &op->args[2],
1292 op->args[4]);
Richard Henderson6c4382f2012-10-02 11:32:27 -07001293 if (tmp != 2) {
1294 if (tmp) {
Richard Hendersona7635512014-04-23 22:18:30 -07001295 do_brcond_true:
Emilio G. Cota34184b02017-07-19 14:32:24 -04001296 bitmap_zero(temps_used.l, nb_temps);
Richard Hendersonc45cb8b2014-09-19 13:49:15 -07001297 op->opc = INDEX_op_br;
Richard Hendersonacd93702016-12-08 12:28:42 -08001298 op->args[0] = op->args[5];
Richard Henderson6c4382f2012-10-02 11:32:27 -07001299 } else {
Richard Hendersona7635512014-04-23 22:18:30 -07001300 do_brcond_false:
Richard Henderson0c627cd2014-03-30 16:51:54 -07001301 tcg_op_remove(s, op);
Richard Henderson6c4382f2012-10-02 11:32:27 -07001302 }
Richard Hendersonacd93702016-12-08 12:28:42 -08001303 } else if ((op->args[4] == TCG_COND_LT
1304 || op->args[4] == TCG_COND_GE)
Richard Henderson63490392017-06-20 13:43:15 -07001305 && arg_is_const(op->args[2])
1306 && arg_info(op->args[2])->val == 0
1307 && arg_is_const(op->args[3])
1308 && arg_info(op->args[3])->val == 0) {
Richard Henderson6c4382f2012-10-02 11:32:27 -07001309 /* Simplify LT/GE comparisons vs zero to a single compare
1310 vs the high word of the input. */
Richard Hendersona7635512014-04-23 22:18:30 -07001311 do_brcond_high:
Emilio G. Cota34184b02017-07-19 14:32:24 -04001312 bitmap_zero(temps_used.l, nb_temps);
Richard Hendersonc45cb8b2014-09-19 13:49:15 -07001313 op->opc = INDEX_op_brcond_i32;
Richard Hendersonacd93702016-12-08 12:28:42 -08001314 op->args[0] = op->args[1];
1315 op->args[1] = op->args[3];
1316 op->args[2] = op->args[4];
1317 op->args[3] = op->args[5];
1318 } else if (op->args[4] == TCG_COND_EQ) {
Richard Hendersona7635512014-04-23 22:18:30 -07001319 /* Simplify EQ comparisons where one of the pairs
1320 can be simplified. */
1321 tmp = do_constant_folding_cond(INDEX_op_brcond_i32,
Richard Hendersonacd93702016-12-08 12:28:42 -08001322 op->args[0], op->args[2],
1323 TCG_COND_EQ);
Richard Hendersona7635512014-04-23 22:18:30 -07001324 if (tmp == 0) {
1325 goto do_brcond_false;
1326 } else if (tmp == 1) {
1327 goto do_brcond_high;
1328 }
1329 tmp = do_constant_folding_cond(INDEX_op_brcond_i32,
Richard Hendersonacd93702016-12-08 12:28:42 -08001330 op->args[1], op->args[3],
1331 TCG_COND_EQ);
Richard Hendersona7635512014-04-23 22:18:30 -07001332 if (tmp == 0) {
1333 goto do_brcond_false;
1334 } else if (tmp != 1) {
1335 goto do_default;
1336 }
1337 do_brcond_low:
Emilio G. Cota34184b02017-07-19 14:32:24 -04001338 bitmap_zero(temps_used.l, nb_temps);
Richard Hendersonc45cb8b2014-09-19 13:49:15 -07001339 op->opc = INDEX_op_brcond_i32;
Richard Hendersonacd93702016-12-08 12:28:42 -08001340 op->args[1] = op->args[2];
1341 op->args[2] = op->args[4];
1342 op->args[3] = op->args[5];
1343 } else if (op->args[4] == TCG_COND_NE) {
Richard Hendersona7635512014-04-23 22:18:30 -07001344 /* Simplify NE comparisons where one of the pairs
1345 can be simplified. */
1346 tmp = do_constant_folding_cond(INDEX_op_brcond_i32,
Richard Hendersonacd93702016-12-08 12:28:42 -08001347 op->args[0], op->args[2],
1348 TCG_COND_NE);
Richard Hendersona7635512014-04-23 22:18:30 -07001349 if (tmp == 0) {
1350 goto do_brcond_high;
1351 } else if (tmp == 1) {
1352 goto do_brcond_true;
1353 }
1354 tmp = do_constant_folding_cond(INDEX_op_brcond_i32,
Richard Hendersonacd93702016-12-08 12:28:42 -08001355 op->args[1], op->args[3],
1356 TCG_COND_NE);
Richard Hendersona7635512014-04-23 22:18:30 -07001357 if (tmp == 0) {
1358 goto do_brcond_low;
1359 } else if (tmp == 1) {
1360 goto do_brcond_true;
1361 }
1362 goto do_default;
Richard Henderson6c4382f2012-10-02 11:32:27 -07001363 } else {
1364 goto do_default;
Richard Hendersonbc1473e2012-10-02 11:32:25 -07001365 }
Richard Henderson6c4382f2012-10-02 11:32:27 -07001366 break;
Richard Hendersonbc1473e2012-10-02 11:32:25 -07001367
1368 case INDEX_op_setcond2_i32:
Richard Hendersonacd93702016-12-08 12:28:42 -08001369 tmp = do_constant_folding_cond2(&op->args[1], &op->args[3],
1370 op->args[5]);
Richard Henderson6c4382f2012-10-02 11:32:27 -07001371 if (tmp != 2) {
Richard Hendersona7635512014-04-23 22:18:30 -07001372 do_setcond_const:
Richard Hendersonacd93702016-12-08 12:28:42 -08001373 tcg_opt_gen_movi(s, op, op->args[0], tmp);
1374 } else if ((op->args[5] == TCG_COND_LT
1375 || op->args[5] == TCG_COND_GE)
Richard Henderson63490392017-06-20 13:43:15 -07001376 && arg_is_const(op->args[3])
1377 && arg_info(op->args[3])->val == 0
1378 && arg_is_const(op->args[4])
1379 && arg_info(op->args[4])->val == 0) {
Richard Henderson6c4382f2012-10-02 11:32:27 -07001380 /* Simplify LT/GE comparisons vs zero to a single compare
1381 vs the high word of the input. */
Richard Hendersona7635512014-04-23 22:18:30 -07001382 do_setcond_high:
Richard Hendersonacd93702016-12-08 12:28:42 -08001383 reset_temp(op->args[0]);
Richard Henderson63490392017-06-20 13:43:15 -07001384 arg_info(op->args[0])->mask = 1;
Richard Hendersonc45cb8b2014-09-19 13:49:15 -07001385 op->opc = INDEX_op_setcond_i32;
Richard Hendersonacd93702016-12-08 12:28:42 -08001386 op->args[1] = op->args[2];
1387 op->args[2] = op->args[4];
1388 op->args[3] = op->args[5];
1389 } else if (op->args[5] == TCG_COND_EQ) {
Richard Hendersona7635512014-04-23 22:18:30 -07001390 /* Simplify EQ comparisons where one of the pairs
1391 can be simplified. */
1392 tmp = do_constant_folding_cond(INDEX_op_setcond_i32,
Richard Hendersonacd93702016-12-08 12:28:42 -08001393 op->args[1], op->args[3],
1394 TCG_COND_EQ);
Richard Hendersona7635512014-04-23 22:18:30 -07001395 if (tmp == 0) {
1396 goto do_setcond_const;
1397 } else if (tmp == 1) {
1398 goto do_setcond_high;
1399 }
1400 tmp = do_constant_folding_cond(INDEX_op_setcond_i32,
Richard Hendersonacd93702016-12-08 12:28:42 -08001401 op->args[2], op->args[4],
1402 TCG_COND_EQ);
Richard Hendersona7635512014-04-23 22:18:30 -07001403 if (tmp == 0) {
1404 goto do_setcond_high;
1405 } else if (tmp != 1) {
1406 goto do_default;
1407 }
1408 do_setcond_low:
Richard Hendersonacd93702016-12-08 12:28:42 -08001409 reset_temp(op->args[0]);
Richard Henderson63490392017-06-20 13:43:15 -07001410 arg_info(op->args[0])->mask = 1;
Richard Hendersonc45cb8b2014-09-19 13:49:15 -07001411 op->opc = INDEX_op_setcond_i32;
Richard Hendersonacd93702016-12-08 12:28:42 -08001412 op->args[2] = op->args[3];
1413 op->args[3] = op->args[5];
1414 } else if (op->args[5] == TCG_COND_NE) {
Richard Hendersona7635512014-04-23 22:18:30 -07001415 /* Simplify NE comparisons where one of the pairs
1416 can be simplified. */
1417 tmp = do_constant_folding_cond(INDEX_op_setcond_i32,
Richard Hendersonacd93702016-12-08 12:28:42 -08001418 op->args[1], op->args[3],
1419 TCG_COND_NE);
Richard Hendersona7635512014-04-23 22:18:30 -07001420 if (tmp == 0) {
1421 goto do_setcond_high;
1422 } else if (tmp == 1) {
1423 goto do_setcond_const;
1424 }
1425 tmp = do_constant_folding_cond(INDEX_op_setcond_i32,
Richard Hendersonacd93702016-12-08 12:28:42 -08001426 op->args[2], op->args[4],
1427 TCG_COND_NE);
Richard Hendersona7635512014-04-23 22:18:30 -07001428 if (tmp == 0) {
1429 goto do_setcond_low;
1430 } else if (tmp == 1) {
1431 goto do_setcond_const;
1432 }
1433 goto do_default;
Richard Henderson6c4382f2012-10-02 11:32:27 -07001434 } else {
1435 goto do_default;
Richard Hendersonbc1473e2012-10-02 11:32:25 -07001436 }
Richard Henderson6c4382f2012-10-02 11:32:27 -07001437 break;
Richard Hendersonbc1473e2012-10-02 11:32:25 -07001438
Kirill Batuzov8f2e8c02011-07-07 16:37:12 +04001439 case INDEX_op_call:
Richard Hendersonacd93702016-12-08 12:28:42 -08001440 if (!(op->args[nb_oargs + nb_iargs + 1]
Richard Hendersoncf066672014-03-22 20:06:52 -07001441 & (TCG_CALL_NO_READ_GLOBALS | TCG_CALL_NO_WRITE_GLOBALS))) {
Kirill Batuzov22613af2011-07-07 16:37:13 +04001442 for (i = 0; i < nb_globals; i++) {
Aurelien Jarno1208d7d2015-07-27 12:41:44 +02001443 if (test_bit(i, temps_used.l)) {
Richard Henderson63490392017-06-20 13:43:15 -07001444 reset_ts(&s->temps[i]);
Aurelien Jarno1208d7d2015-07-27 12:41:44 +02001445 }
Kirill Batuzov22613af2011-07-07 16:37:13 +04001446 }
1447 }
Richard Hendersoncf066672014-03-22 20:06:52 -07001448 goto do_reset_output;
Richard Henderson6e14e912012-10-02 11:32:24 -07001449
Kirill Batuzov8f2e8c02011-07-07 16:37:12 +04001450 default:
Richard Henderson6e14e912012-10-02 11:32:24 -07001451 do_default:
1452 /* Default case: we know nothing about operation (or were unable
1453 to compute the operation result) so no propagation is done.
1454 We trash everything if the operation is the end of a basic
Paolo Bonzini3a9d8b12013-01-11 15:42:52 -08001455 block, otherwise we only trash the output args. "mask" is
1456 the non-zero bits mask for the first output arg. */
Aurelien Jarnoa2550662012-09-19 21:40:30 +02001457 if (def->flags & TCG_OPF_BB_END) {
Emilio G. Cota34184b02017-07-19 14:32:24 -04001458 bitmap_zero(temps_used.l, nb_temps);
Aurelien Jarnoa2550662012-09-19 21:40:30 +02001459 } else {
Richard Hendersoncf066672014-03-22 20:06:52 -07001460 do_reset_output:
1461 for (i = 0; i < nb_oargs; i++) {
Richard Hendersonacd93702016-12-08 12:28:42 -08001462 reset_temp(op->args[i]);
Aurelien Jarno30312442013-09-03 08:27:38 +02001463 /* Save the corresponding known-zero bits mask for the
1464 first output argument (only one supported so far). */
1465 if (i == 0) {
Richard Henderson63490392017-06-20 13:43:15 -07001466 arg_info(op->args[i])->mask = mask;
Aurelien Jarno30312442013-09-03 08:27:38 +02001467 }
Aurelien Jarnoa2550662012-09-19 21:40:30 +02001468 }
Kirill Batuzov22613af2011-07-07 16:37:13 +04001469 }
Kirill Batuzov8f2e8c02011-07-07 16:37:12 +04001470 break;
1471 }
Pranith Kumar34f93922016-08-23 09:48:25 -04001472
1473 /* Eliminate duplicate and redundant fence instructions. */
Richard Hendersonacd93702016-12-08 12:28:42 -08001474 if (prev_mb) {
Pranith Kumar34f93922016-08-23 09:48:25 -04001475 switch (opc) {
1476 case INDEX_op_mb:
1477 /* Merge two barriers of the same type into one,
1478 * or a weaker barrier into a stronger one,
1479 * or two weaker barriers into a stronger one.
1480 * mb X; mb Y => mb X|Y
1481 * mb; strl => mb; st
1482 * ldaq; mb => ld; mb
1483 * ldaq; strl => ld; mb; st
1484 * Other combinations are also merged into a strong
1485 * barrier. This is stricter than specified but for
1486 * the purposes of TCG is better than not optimizing.
1487 */
Richard Hendersonacd93702016-12-08 12:28:42 -08001488 prev_mb->args[0] |= op->args[0];
Pranith Kumar34f93922016-08-23 09:48:25 -04001489 tcg_op_remove(s, op);
1490 break;
1491
1492 default:
1493 /* Opcodes that end the block stop the optimization. */
1494 if ((def->flags & TCG_OPF_BB_END) == 0) {
1495 break;
1496 }
1497 /* fallthru */
1498 case INDEX_op_qemu_ld_i32:
1499 case INDEX_op_qemu_ld_i64:
1500 case INDEX_op_qemu_st_i32:
1501 case INDEX_op_qemu_st_i64:
1502 case INDEX_op_call:
1503 /* Opcodes that touch guest memory stop the optimization. */
Richard Hendersonacd93702016-12-08 12:28:42 -08001504 prev_mb = NULL;
Pranith Kumar34f93922016-08-23 09:48:25 -04001505 break;
1506 }
1507 } else if (opc == INDEX_op_mb) {
Richard Hendersonacd93702016-12-08 12:28:42 -08001508 prev_mb = op;
Pranith Kumar34f93922016-08-23 09:48:25 -04001509 }
Kirill Batuzov8f2e8c02011-07-07 16:37:12 +04001510 }
Kirill Batuzov8f2e8c02011-07-07 16:37:12 +04001511}