blob: d7c71a608538e79f1cb6e37ff4a0aaac691eab40 [file] [log] [blame]
Kirill Batuzov8f2e8c02011-07-07 16:37:12 +04001/*
2 * Optimizations for Tiny Code Generator for QEMU
3 *
4 * Copyright (c) 2010 Samsung Electronics.
5 * Contributed by Kirill Batuzov <batuzovk@ispras.ru>
6 *
7 * Permission is hereby granted, free of charge, to any person obtaining a copy
8 * of this software and associated documentation files (the "Software"), to deal
9 * in the Software without restriction, including without limitation the rights
10 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
11 * copies of the Software, and to permit persons to whom the Software is
12 * furnished to do so, subject to the following conditions:
13 *
14 * The above copyright notice and this permission notice shall be included in
15 * all copies or substantial portions of the Software.
16 *
17 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
18 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
19 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
20 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
21 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
22 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
23 * THE SOFTWARE.
24 */
25
Peter Maydell757e7252016-01-26 18:17:08 +000026#include "qemu/osdep.h"
Paolo Bonzini00f6da62016-03-15 13:16:36 +010027#include "exec/cpu-common.h"
Kirill Batuzov8f2e8c02011-07-07 16:37:12 +040028#include "tcg-op.h"
29
Kirill Batuzov8f2e8c02011-07-07 16:37:12 +040030#define CASE_OP_32_64(x) \
31 glue(glue(case INDEX_op_, x), _i32): \
32 glue(glue(case INDEX_op_, x), _i64)
Kirill Batuzov8f2e8c02011-07-07 16:37:12 +040033
Richard Henderson170ba882017-11-22 09:07:11 +010034#define CASE_OP_32_64_VEC(x) \
35 glue(glue(case INDEX_op_, x), _i32): \
36 glue(glue(case INDEX_op_, x), _i64): \
37 glue(glue(case INDEX_op_, x), _vec)
38
Kirill Batuzov22613af2011-07-07 16:37:13 +040039struct tcg_temp_info {
Aurelien Jarnob41059d2015-07-27 12:41:44 +020040 bool is_const;
Richard Henderson63490392017-06-20 13:43:15 -070041 TCGTemp *prev_copy;
42 TCGTemp *next_copy;
Kirill Batuzov22613af2011-07-07 16:37:13 +040043 tcg_target_ulong val;
Paolo Bonzini3a9d8b12013-01-11 15:42:52 -080044 tcg_target_ulong mask;
Kirill Batuzov22613af2011-07-07 16:37:13 +040045};
46
Richard Henderson63490392017-06-20 13:43:15 -070047static inline struct tcg_temp_info *ts_info(TCGTemp *ts)
Aurelien Jarnod9c769c2015-07-27 12:41:44 +020048{
Richard Henderson63490392017-06-20 13:43:15 -070049 return ts->state_ptr;
Aurelien Jarnod9c769c2015-07-27 12:41:44 +020050}
51
Richard Henderson63490392017-06-20 13:43:15 -070052static inline struct tcg_temp_info *arg_info(TCGArg arg)
Aurelien Jarnod9c769c2015-07-27 12:41:44 +020053{
Richard Henderson63490392017-06-20 13:43:15 -070054 return ts_info(arg_temp(arg));
55}
56
57static inline bool ts_is_const(TCGTemp *ts)
58{
59 return ts_info(ts)->is_const;
60}
61
62static inline bool arg_is_const(TCGArg arg)
63{
64 return ts_is_const(arg_temp(arg));
65}
66
67static inline bool ts_is_copy(TCGTemp *ts)
68{
69 return ts_info(ts)->next_copy != ts;
Aurelien Jarnod9c769c2015-07-27 12:41:44 +020070}
71
Aurelien Jarnob41059d2015-07-27 12:41:44 +020072/* Reset TEMP's state, possibly removing the temp for the list of copies. */
Richard Henderson63490392017-06-20 13:43:15 -070073static void reset_ts(TCGTemp *ts)
Kirill Batuzov22613af2011-07-07 16:37:13 +040074{
Richard Henderson63490392017-06-20 13:43:15 -070075 struct tcg_temp_info *ti = ts_info(ts);
76 struct tcg_temp_info *pi = ts_info(ti->prev_copy);
77 struct tcg_temp_info *ni = ts_info(ti->next_copy);
78
79 ni->prev_copy = ti->prev_copy;
80 pi->next_copy = ti->next_copy;
81 ti->next_copy = ts;
82 ti->prev_copy = ts;
83 ti->is_const = false;
84 ti->mask = -1;
85}
86
87static void reset_temp(TCGArg arg)
88{
89 reset_ts(arg_temp(arg));
Kirill Batuzov22613af2011-07-07 16:37:13 +040090}
91
Aurelien Jarno1208d7d2015-07-27 12:41:44 +020092/* Initialize and activate a temporary. */
Emilio G. Cota34184b02017-07-19 14:32:24 -040093static void init_ts_info(struct tcg_temp_info *infos,
94 TCGTempSet *temps_used, TCGTemp *ts)
Aurelien Jarno1208d7d2015-07-27 12:41:44 +020095{
Richard Henderson63490392017-06-20 13:43:15 -070096 size_t idx = temp_idx(ts);
Emilio G. Cota34184b02017-07-19 14:32:24 -040097 if (!test_bit(idx, temps_used->l)) {
98 struct tcg_temp_info *ti = &infos[idx];
Richard Henderson63490392017-06-20 13:43:15 -070099
100 ts->state_ptr = ti;
101 ti->next_copy = ts;
102 ti->prev_copy = ts;
103 ti->is_const = false;
104 ti->mask = -1;
Emilio G. Cota34184b02017-07-19 14:32:24 -0400105 set_bit(idx, temps_used->l);
Aurelien Jarno1208d7d2015-07-27 12:41:44 +0200106 }
107}
108
Emilio G. Cota34184b02017-07-19 14:32:24 -0400109static void init_arg_info(struct tcg_temp_info *infos,
110 TCGTempSet *temps_used, TCGArg arg)
Richard Henderson63490392017-06-20 13:43:15 -0700111{
Emilio G. Cota34184b02017-07-19 14:32:24 -0400112 init_ts_info(infos, temps_used, arg_temp(arg));
Richard Henderson63490392017-06-20 13:43:15 -0700113}
114
Richard Henderson63490392017-06-20 13:43:15 -0700115static TCGTemp *find_better_copy(TCGContext *s, TCGTemp *ts)
Aurelien Jarnoe590d4e2012-09-11 12:31:21 +0200116{
Richard Henderson63490392017-06-20 13:43:15 -0700117 TCGTemp *i;
Aurelien Jarnoe590d4e2012-09-11 12:31:21 +0200118
119 /* If this is already a global, we can't do better. */
Richard Hendersonfa477d22016-11-02 11:20:15 -0600120 if (ts->temp_global) {
Richard Henderson63490392017-06-20 13:43:15 -0700121 return ts;
Aurelien Jarnoe590d4e2012-09-11 12:31:21 +0200122 }
123
124 /* Search for a global first. */
Richard Henderson63490392017-06-20 13:43:15 -0700125 for (i = ts_info(ts)->next_copy; i != ts; i = ts_info(i)->next_copy) {
126 if (i->temp_global) {
Aurelien Jarnoe590d4e2012-09-11 12:31:21 +0200127 return i;
128 }
129 }
130
131 /* If it is a temp, search for a temp local. */
Richard Hendersonfa477d22016-11-02 11:20:15 -0600132 if (!ts->temp_local) {
Richard Henderson63490392017-06-20 13:43:15 -0700133 for (i = ts_info(ts)->next_copy; i != ts; i = ts_info(i)->next_copy) {
134 if (ts->temp_local) {
Aurelien Jarnoe590d4e2012-09-11 12:31:21 +0200135 return i;
136 }
137 }
138 }
139
140 /* Failure to find a better representation, return the same temp. */
Richard Henderson63490392017-06-20 13:43:15 -0700141 return ts;
Aurelien Jarnoe590d4e2012-09-11 12:31:21 +0200142}
143
Richard Henderson63490392017-06-20 13:43:15 -0700144static bool ts_are_copies(TCGTemp *ts1, TCGTemp *ts2)
Aurelien Jarnoe590d4e2012-09-11 12:31:21 +0200145{
Richard Henderson63490392017-06-20 13:43:15 -0700146 TCGTemp *i;
Aurelien Jarnoe590d4e2012-09-11 12:31:21 +0200147
Richard Henderson63490392017-06-20 13:43:15 -0700148 if (ts1 == ts2) {
Aurelien Jarnoe590d4e2012-09-11 12:31:21 +0200149 return true;
150 }
151
Richard Henderson63490392017-06-20 13:43:15 -0700152 if (!ts_is_copy(ts1) || !ts_is_copy(ts2)) {
Aurelien Jarnoe590d4e2012-09-11 12:31:21 +0200153 return false;
154 }
155
Richard Henderson63490392017-06-20 13:43:15 -0700156 for (i = ts_info(ts1)->next_copy; i != ts1; i = ts_info(i)->next_copy) {
157 if (i == ts2) {
Aurelien Jarnoe590d4e2012-09-11 12:31:21 +0200158 return true;
159 }
160 }
161
162 return false;
163}
164
Richard Henderson63490392017-06-20 13:43:15 -0700165static bool args_are_copies(TCGArg arg1, TCGArg arg2)
166{
167 return ts_are_copies(arg_temp(arg1), arg_temp(arg2));
168}
169
Richard Hendersonacd93702016-12-08 12:28:42 -0800170static void tcg_opt_gen_movi(TCGContext *s, TCGOp *op, TCGArg dst, TCGArg val)
Aurelien Jarno97a79eb2015-06-05 11:19:18 +0200171{
Richard Henderson170ba882017-11-22 09:07:11 +0100172 const TCGOpDef *def;
173 TCGOpcode new_op;
Aurelien Jarno97a79eb2015-06-05 11:19:18 +0200174 tcg_target_ulong mask;
Richard Henderson63490392017-06-20 13:43:15 -0700175 struct tcg_temp_info *di = arg_info(dst);
Aurelien Jarno97a79eb2015-06-05 11:19:18 +0200176
Richard Henderson170ba882017-11-22 09:07:11 +0100177 def = &tcg_op_defs[op->opc];
178 if (def->flags & TCG_OPF_VECTOR) {
179 new_op = INDEX_op_dupi_vec;
180 } else if (def->flags & TCG_OPF_64BIT) {
181 new_op = INDEX_op_movi_i64;
182 } else {
183 new_op = INDEX_op_movi_i32;
184 }
Aurelien Jarno97a79eb2015-06-05 11:19:18 +0200185 op->opc = new_op;
Richard Henderson170ba882017-11-22 09:07:11 +0100186 /* TCGOP_VECL and TCGOP_VECE remain unchanged. */
187 op->args[0] = dst;
188 op->args[1] = val;
Aurelien Jarno97a79eb2015-06-05 11:19:18 +0200189
190 reset_temp(dst);
Richard Henderson63490392017-06-20 13:43:15 -0700191 di->is_const = true;
192 di->val = val;
Aurelien Jarno97a79eb2015-06-05 11:19:18 +0200193 mask = val;
Aurelien Jarno96152122015-07-10 18:03:30 +0200194 if (TCG_TARGET_REG_BITS > 32 && new_op == INDEX_op_movi_i32) {
Aurelien Jarno97a79eb2015-06-05 11:19:18 +0200195 /* High bits of the destination are now garbage. */
196 mask |= ~0xffffffffull;
197 }
Richard Henderson63490392017-06-20 13:43:15 -0700198 di->mask = mask;
Aurelien Jarno97a79eb2015-06-05 11:19:18 +0200199}
200
Richard Hendersonacd93702016-12-08 12:28:42 -0800201static void tcg_opt_gen_mov(TCGContext *s, TCGOp *op, TCGArg dst, TCGArg src)
Kirill Batuzov22613af2011-07-07 16:37:13 +0400202{
Richard Henderson63490392017-06-20 13:43:15 -0700203 TCGTemp *dst_ts = arg_temp(dst);
204 TCGTemp *src_ts = arg_temp(src);
Richard Henderson170ba882017-11-22 09:07:11 +0100205 const TCGOpDef *def;
Richard Henderson63490392017-06-20 13:43:15 -0700206 struct tcg_temp_info *di;
207 struct tcg_temp_info *si;
208 tcg_target_ulong mask;
209 TCGOpcode new_op;
210
211 if (ts_are_copies(dst_ts, src_ts)) {
Aurelien Jarno53657182015-06-04 21:53:25 +0200212 tcg_op_remove(s, op);
213 return;
214 }
215
Richard Henderson63490392017-06-20 13:43:15 -0700216 reset_ts(dst_ts);
217 di = ts_info(dst_ts);
218 si = ts_info(src_ts);
Richard Henderson170ba882017-11-22 09:07:11 +0100219 def = &tcg_op_defs[op->opc];
220 if (def->flags & TCG_OPF_VECTOR) {
221 new_op = INDEX_op_mov_vec;
222 } else if (def->flags & TCG_OPF_64BIT) {
223 new_op = INDEX_op_mov_i64;
224 } else {
225 new_op = INDEX_op_mov_i32;
226 }
Richard Hendersonc45cb8b2014-09-19 13:49:15 -0700227 op->opc = new_op;
Richard Henderson170ba882017-11-22 09:07:11 +0100228 /* TCGOP_VECL and TCGOP_VECE remain unchanged. */
Richard Henderson63490392017-06-20 13:43:15 -0700229 op->args[0] = dst;
230 op->args[1] = src;
Richard Hendersona62f6f52014-05-22 10:59:12 -0700231
Richard Henderson63490392017-06-20 13:43:15 -0700232 mask = si->mask;
Richard Henderson24666ba2014-05-22 11:14:10 -0700233 if (TCG_TARGET_REG_BITS > 32 && new_op == INDEX_op_mov_i32) {
234 /* High bits of the destination are now garbage. */
235 mask |= ~0xffffffffull;
236 }
Richard Henderson63490392017-06-20 13:43:15 -0700237 di->mask = mask;
Richard Henderson24666ba2014-05-22 11:14:10 -0700238
Richard Henderson63490392017-06-20 13:43:15 -0700239 if (src_ts->type == dst_ts->type) {
240 struct tcg_temp_info *ni = ts_info(si->next_copy);
241
242 di->next_copy = si->next_copy;
243 di->prev_copy = src_ts;
244 ni->prev_copy = dst_ts;
245 si->next_copy = dst_ts;
246 di->is_const = si->is_const;
247 di->val = si->val;
Paolo Bonzini3a9d8b12013-01-11 15:42:52 -0800248 }
Kirill Batuzov22613af2011-07-07 16:37:13 +0400249}
250
Blue Swirlfe0de7a2011-07-30 19:18:32 +0000251static TCGArg do_constant_folding_2(TCGOpcode op, TCGArg x, TCGArg y)
Kirill Batuzov53108fb2011-07-07 16:37:14 +0400252{
Richard Henderson03271522013-08-14 14:35:56 -0700253 uint64_t l64, h64;
254
Kirill Batuzov53108fb2011-07-07 16:37:14 +0400255 switch (op) {
256 CASE_OP_32_64(add):
257 return x + y;
258
259 CASE_OP_32_64(sub):
260 return x - y;
261
262 CASE_OP_32_64(mul):
263 return x * y;
264
Kirill Batuzov9a810902011-07-07 16:37:15 +0400265 CASE_OP_32_64(and):
266 return x & y;
267
268 CASE_OP_32_64(or):
269 return x | y;
270
271 CASE_OP_32_64(xor):
272 return x ^ y;
273
Kirill Batuzov55c09752011-07-07 16:37:16 +0400274 case INDEX_op_shl_i32:
Richard Henderson50c5c4d2014-03-18 07:45:39 -0700275 return (uint32_t)x << (y & 31);
Kirill Batuzov55c09752011-07-07 16:37:16 +0400276
Kirill Batuzov55c09752011-07-07 16:37:16 +0400277 case INDEX_op_shl_i64:
Richard Henderson50c5c4d2014-03-18 07:45:39 -0700278 return (uint64_t)x << (y & 63);
Kirill Batuzov55c09752011-07-07 16:37:16 +0400279
280 case INDEX_op_shr_i32:
Richard Henderson50c5c4d2014-03-18 07:45:39 -0700281 return (uint32_t)x >> (y & 31);
Kirill Batuzov55c09752011-07-07 16:37:16 +0400282
Kirill Batuzov55c09752011-07-07 16:37:16 +0400283 case INDEX_op_shr_i64:
Richard Henderson50c5c4d2014-03-18 07:45:39 -0700284 return (uint64_t)x >> (y & 63);
Kirill Batuzov55c09752011-07-07 16:37:16 +0400285
286 case INDEX_op_sar_i32:
Richard Henderson50c5c4d2014-03-18 07:45:39 -0700287 return (int32_t)x >> (y & 31);
Kirill Batuzov55c09752011-07-07 16:37:16 +0400288
Kirill Batuzov55c09752011-07-07 16:37:16 +0400289 case INDEX_op_sar_i64:
Richard Henderson50c5c4d2014-03-18 07:45:39 -0700290 return (int64_t)x >> (y & 63);
Kirill Batuzov55c09752011-07-07 16:37:16 +0400291
292 case INDEX_op_rotr_i32:
Richard Henderson50c5c4d2014-03-18 07:45:39 -0700293 return ror32(x, y & 31);
Kirill Batuzov55c09752011-07-07 16:37:16 +0400294
Kirill Batuzov55c09752011-07-07 16:37:16 +0400295 case INDEX_op_rotr_i64:
Richard Henderson50c5c4d2014-03-18 07:45:39 -0700296 return ror64(x, y & 63);
Kirill Batuzov55c09752011-07-07 16:37:16 +0400297
298 case INDEX_op_rotl_i32:
Richard Henderson50c5c4d2014-03-18 07:45:39 -0700299 return rol32(x, y & 31);
Kirill Batuzov55c09752011-07-07 16:37:16 +0400300
Kirill Batuzov55c09752011-07-07 16:37:16 +0400301 case INDEX_op_rotl_i64:
Richard Henderson50c5c4d2014-03-18 07:45:39 -0700302 return rol64(x, y & 63);
Kirill Batuzov55c09752011-07-07 16:37:16 +0400303
Richard Henderson25c4d9c2011-08-17 14:11:46 -0700304 CASE_OP_32_64(not):
Kirill Batuzova640f032011-07-07 16:37:17 +0400305 return ~x;
306
Richard Hendersoncb25c802011-08-17 14:11:47 -0700307 CASE_OP_32_64(neg):
308 return -x;
309
310 CASE_OP_32_64(andc):
311 return x & ~y;
312
313 CASE_OP_32_64(orc):
314 return x | ~y;
315
316 CASE_OP_32_64(eqv):
317 return ~(x ^ y);
318
319 CASE_OP_32_64(nand):
320 return ~(x & y);
321
322 CASE_OP_32_64(nor):
323 return ~(x | y);
324
Richard Henderson0e28d002016-11-16 09:23:28 +0100325 case INDEX_op_clz_i32:
326 return (uint32_t)x ? clz32(x) : y;
327
328 case INDEX_op_clz_i64:
329 return x ? clz64(x) : y;
330
331 case INDEX_op_ctz_i32:
332 return (uint32_t)x ? ctz32(x) : y;
333
334 case INDEX_op_ctz_i64:
335 return x ? ctz64(x) : y;
336
Richard Hendersona768e4e2016-11-21 11:13:39 +0100337 case INDEX_op_ctpop_i32:
338 return ctpop32(x);
339
340 case INDEX_op_ctpop_i64:
341 return ctpop64(x);
342
Richard Henderson25c4d9c2011-08-17 14:11:46 -0700343 CASE_OP_32_64(ext8s):
Kirill Batuzova640f032011-07-07 16:37:17 +0400344 return (int8_t)x;
345
Richard Henderson25c4d9c2011-08-17 14:11:46 -0700346 CASE_OP_32_64(ext16s):
Kirill Batuzova640f032011-07-07 16:37:17 +0400347 return (int16_t)x;
348
Richard Henderson25c4d9c2011-08-17 14:11:46 -0700349 CASE_OP_32_64(ext8u):
Kirill Batuzova640f032011-07-07 16:37:17 +0400350 return (uint8_t)x;
351
Richard Henderson25c4d9c2011-08-17 14:11:46 -0700352 CASE_OP_32_64(ext16u):
Kirill Batuzova640f032011-07-07 16:37:17 +0400353 return (uint16_t)x;
354
Richard Henderson64985942018-11-20 08:53:34 +0100355 CASE_OP_32_64(bswap16):
356 return bswap16(x);
357
358 CASE_OP_32_64(bswap32):
359 return bswap32(x);
360
361 case INDEX_op_bswap64_i64:
362 return bswap64(x);
363
Aurelien Jarno8bcb5c82015-07-27 12:41:45 +0200364 case INDEX_op_ext_i32_i64:
Kirill Batuzova640f032011-07-07 16:37:17 +0400365 case INDEX_op_ext32s_i64:
366 return (int32_t)x;
367
Aurelien Jarno8bcb5c82015-07-27 12:41:45 +0200368 case INDEX_op_extu_i32_i64:
Richard Henderson609ad702015-07-24 07:16:00 -0700369 case INDEX_op_extrl_i64_i32:
Kirill Batuzova640f032011-07-07 16:37:17 +0400370 case INDEX_op_ext32u_i64:
371 return (uint32_t)x;
Kirill Batuzova640f032011-07-07 16:37:17 +0400372
Richard Henderson609ad702015-07-24 07:16:00 -0700373 case INDEX_op_extrh_i64_i32:
374 return (uint64_t)x >> 32;
375
Richard Henderson03271522013-08-14 14:35:56 -0700376 case INDEX_op_muluh_i32:
377 return ((uint64_t)(uint32_t)x * (uint32_t)y) >> 32;
378 case INDEX_op_mulsh_i32:
379 return ((int64_t)(int32_t)x * (int32_t)y) >> 32;
380
381 case INDEX_op_muluh_i64:
382 mulu64(&l64, &h64, x, y);
383 return h64;
384 case INDEX_op_mulsh_i64:
385 muls64(&l64, &h64, x, y);
386 return h64;
387
Richard Henderson01547f72013-08-14 15:22:46 -0700388 case INDEX_op_div_i32:
389 /* Avoid crashing on divide by zero, otherwise undefined. */
390 return (int32_t)x / ((int32_t)y ? : 1);
391 case INDEX_op_divu_i32:
392 return (uint32_t)x / ((uint32_t)y ? : 1);
393 case INDEX_op_div_i64:
394 return (int64_t)x / ((int64_t)y ? : 1);
395 case INDEX_op_divu_i64:
396 return (uint64_t)x / ((uint64_t)y ? : 1);
397
398 case INDEX_op_rem_i32:
399 return (int32_t)x % ((int32_t)y ? : 1);
400 case INDEX_op_remu_i32:
401 return (uint32_t)x % ((uint32_t)y ? : 1);
402 case INDEX_op_rem_i64:
403 return (int64_t)x % ((int64_t)y ? : 1);
404 case INDEX_op_remu_i64:
405 return (uint64_t)x % ((uint64_t)y ? : 1);
406
Kirill Batuzov53108fb2011-07-07 16:37:14 +0400407 default:
408 fprintf(stderr,
409 "Unrecognized operation %d in do_constant_folding.\n", op);
410 tcg_abort();
411 }
412}
413
Blue Swirlfe0de7a2011-07-30 19:18:32 +0000414static TCGArg do_constant_folding(TCGOpcode op, TCGArg x, TCGArg y)
Kirill Batuzov53108fb2011-07-07 16:37:14 +0400415{
Richard Henderson170ba882017-11-22 09:07:11 +0100416 const TCGOpDef *def = &tcg_op_defs[op];
Kirill Batuzov53108fb2011-07-07 16:37:14 +0400417 TCGArg res = do_constant_folding_2(op, x, y);
Richard Henderson170ba882017-11-22 09:07:11 +0100418 if (!(def->flags & TCG_OPF_64BIT)) {
Aurelien Jarno29f3ff82015-07-10 18:03:31 +0200419 res = (int32_t)res;
Kirill Batuzov53108fb2011-07-07 16:37:14 +0400420 }
Kirill Batuzov53108fb2011-07-07 16:37:14 +0400421 return res;
422}
423
Richard Henderson9519da72012-10-02 11:32:26 -0700424static bool do_constant_folding_cond_32(uint32_t x, uint32_t y, TCGCond c)
425{
426 switch (c) {
427 case TCG_COND_EQ:
428 return x == y;
429 case TCG_COND_NE:
430 return x != y;
431 case TCG_COND_LT:
432 return (int32_t)x < (int32_t)y;
433 case TCG_COND_GE:
434 return (int32_t)x >= (int32_t)y;
435 case TCG_COND_LE:
436 return (int32_t)x <= (int32_t)y;
437 case TCG_COND_GT:
438 return (int32_t)x > (int32_t)y;
439 case TCG_COND_LTU:
440 return x < y;
441 case TCG_COND_GEU:
442 return x >= y;
443 case TCG_COND_LEU:
444 return x <= y;
445 case TCG_COND_GTU:
446 return x > y;
447 default:
448 tcg_abort();
449 }
450}
451
452static bool do_constant_folding_cond_64(uint64_t x, uint64_t y, TCGCond c)
453{
454 switch (c) {
455 case TCG_COND_EQ:
456 return x == y;
457 case TCG_COND_NE:
458 return x != y;
459 case TCG_COND_LT:
460 return (int64_t)x < (int64_t)y;
461 case TCG_COND_GE:
462 return (int64_t)x >= (int64_t)y;
463 case TCG_COND_LE:
464 return (int64_t)x <= (int64_t)y;
465 case TCG_COND_GT:
466 return (int64_t)x > (int64_t)y;
467 case TCG_COND_LTU:
468 return x < y;
469 case TCG_COND_GEU:
470 return x >= y;
471 case TCG_COND_LEU:
472 return x <= y;
473 case TCG_COND_GTU:
474 return x > y;
475 default:
476 tcg_abort();
477 }
478}
479
480static bool do_constant_folding_cond_eq(TCGCond c)
481{
482 switch (c) {
483 case TCG_COND_GT:
484 case TCG_COND_LTU:
485 case TCG_COND_LT:
486 case TCG_COND_GTU:
487 case TCG_COND_NE:
488 return 0;
489 case TCG_COND_GE:
490 case TCG_COND_GEU:
491 case TCG_COND_LE:
492 case TCG_COND_LEU:
493 case TCG_COND_EQ:
494 return 1;
495 default:
496 tcg_abort();
497 }
498}
499
Aurelien Jarnob336ceb2012-09-18 19:37:00 +0200500/* Return 2 if the condition can't be simplified, and the result
501 of the condition (0 or 1) if it can */
Aurelien Jarnof8dd19e2012-09-06 16:47:14 +0200502static TCGArg do_constant_folding_cond(TCGOpcode op, TCGArg x,
503 TCGArg y, TCGCond c)
504{
Richard Henderson63490392017-06-20 13:43:15 -0700505 tcg_target_ulong xv = arg_info(x)->val;
506 tcg_target_ulong yv = arg_info(y)->val;
507 if (arg_is_const(x) && arg_is_const(y)) {
Richard Henderson170ba882017-11-22 09:07:11 +0100508 const TCGOpDef *def = &tcg_op_defs[op];
509 tcg_debug_assert(!(def->flags & TCG_OPF_VECTOR));
510 if (def->flags & TCG_OPF_64BIT) {
Richard Henderson63490392017-06-20 13:43:15 -0700511 return do_constant_folding_cond_64(xv, yv, c);
Richard Henderson170ba882017-11-22 09:07:11 +0100512 } else {
513 return do_constant_folding_cond_32(xv, yv, c);
Aurelien Jarnof8dd19e2012-09-06 16:47:14 +0200514 }
Richard Henderson63490392017-06-20 13:43:15 -0700515 } else if (args_are_copies(x, y)) {
Richard Henderson9519da72012-10-02 11:32:26 -0700516 return do_constant_folding_cond_eq(c);
Richard Henderson63490392017-06-20 13:43:15 -0700517 } else if (arg_is_const(y) && yv == 0) {
Aurelien Jarnob336ceb2012-09-18 19:37:00 +0200518 switch (c) {
519 case TCG_COND_LTU:
520 return 0;
521 case TCG_COND_GEU:
522 return 1;
523 default:
524 return 2;
525 }
Aurelien Jarnof8dd19e2012-09-06 16:47:14 +0200526 }
Alex Bennée550276a2016-09-30 22:30:55 +0100527 return 2;
Aurelien Jarnof8dd19e2012-09-06 16:47:14 +0200528}
529
Richard Henderson6c4382f2012-10-02 11:32:27 -0700530/* Return 2 if the condition can't be simplified, and the result
531 of the condition (0 or 1) if it can */
532static TCGArg do_constant_folding_cond2(TCGArg *p1, TCGArg *p2, TCGCond c)
533{
534 TCGArg al = p1[0], ah = p1[1];
535 TCGArg bl = p2[0], bh = p2[1];
536
Richard Henderson63490392017-06-20 13:43:15 -0700537 if (arg_is_const(bl) && arg_is_const(bh)) {
538 tcg_target_ulong blv = arg_info(bl)->val;
539 tcg_target_ulong bhv = arg_info(bh)->val;
540 uint64_t b = deposit64(blv, 32, 32, bhv);
Richard Henderson6c4382f2012-10-02 11:32:27 -0700541
Richard Henderson63490392017-06-20 13:43:15 -0700542 if (arg_is_const(al) && arg_is_const(ah)) {
543 tcg_target_ulong alv = arg_info(al)->val;
544 tcg_target_ulong ahv = arg_info(ah)->val;
545 uint64_t a = deposit64(alv, 32, 32, ahv);
Richard Henderson6c4382f2012-10-02 11:32:27 -0700546 return do_constant_folding_cond_64(a, b, c);
547 }
548 if (b == 0) {
549 switch (c) {
550 case TCG_COND_LTU:
551 return 0;
552 case TCG_COND_GEU:
553 return 1;
554 default:
555 break;
556 }
557 }
558 }
Richard Henderson63490392017-06-20 13:43:15 -0700559 if (args_are_copies(al, bl) && args_are_copies(ah, bh)) {
Richard Henderson6c4382f2012-10-02 11:32:27 -0700560 return do_constant_folding_cond_eq(c);
561 }
562 return 2;
563}
564
Richard Henderson24c9ae42012-10-02 11:32:21 -0700565static bool swap_commutative(TCGArg dest, TCGArg *p1, TCGArg *p2)
566{
567 TCGArg a1 = *p1, a2 = *p2;
568 int sum = 0;
Richard Henderson63490392017-06-20 13:43:15 -0700569 sum += arg_is_const(a1);
570 sum -= arg_is_const(a2);
Richard Henderson24c9ae42012-10-02 11:32:21 -0700571
572 /* Prefer the constant in second argument, and then the form
573 op a, a, b, which is better handled on non-RISC hosts. */
574 if (sum > 0 || (sum == 0 && dest == a2)) {
575 *p1 = a2;
576 *p2 = a1;
577 return true;
578 }
579 return false;
580}
581
Richard Henderson0bfcb862012-10-02 11:32:23 -0700582static bool swap_commutative2(TCGArg *p1, TCGArg *p2)
583{
584 int sum = 0;
Richard Henderson63490392017-06-20 13:43:15 -0700585 sum += arg_is_const(p1[0]);
586 sum += arg_is_const(p1[1]);
587 sum -= arg_is_const(p2[0]);
588 sum -= arg_is_const(p2[1]);
Richard Henderson0bfcb862012-10-02 11:32:23 -0700589 if (sum > 0) {
590 TCGArg t;
591 t = p1[0], p1[0] = p2[0], p2[0] = t;
592 t = p1[1], p1[1] = p2[1], p2[1] = t;
593 return true;
594 }
595 return false;
596}
597
Kirill Batuzov22613af2011-07-07 16:37:13 +0400598/* Propagate constants and copies, fold constant expressions. */
Aurelien Jarno36e60ef2015-06-04 21:53:27 +0200599void tcg_optimize(TCGContext *s)
Kirill Batuzov8f2e8c02011-07-07 16:37:12 +0400600{
Richard Henderson15fa08f2017-11-02 15:19:14 +0100601 int nb_temps, nb_globals;
602 TCGOp *op, *op_next, *prev_mb = NULL;
Emilio G. Cota34184b02017-07-19 14:32:24 -0400603 struct tcg_temp_info *infos;
604 TCGTempSet temps_used;
Richard Henderson5d8f5362012-09-21 10:13:38 -0700605
Kirill Batuzov22613af2011-07-07 16:37:13 +0400606 /* Array VALS has an element for each temp.
607 If this temp holds a constant then its value is kept in VALS' element.
Aurelien Jarnoe590d4e2012-09-11 12:31:21 +0200608 If this temp is a copy of other ones then the other copies are
609 available through the doubly linked circular list. */
Kirill Batuzov8f2e8c02011-07-07 16:37:12 +0400610
611 nb_temps = s->nb_temps;
612 nb_globals = s->nb_globals;
Emilio G. Cota34184b02017-07-19 14:32:24 -0400613 bitmap_zero(temps_used.l, nb_temps);
614 infos = tcg_malloc(sizeof(struct tcg_temp_info) * nb_temps);
Kirill Batuzov8f2e8c02011-07-07 16:37:12 +0400615
Richard Henderson15fa08f2017-11-02 15:19:14 +0100616 QTAILQ_FOREACH_SAFE(op, &s->ops, link, op_next) {
Richard Henderson24666ba2014-05-22 11:14:10 -0700617 tcg_target_ulong mask, partmask, affected;
Richard Hendersonc45cb8b2014-09-19 13:49:15 -0700618 int nb_oargs, nb_iargs, i;
Richard Hendersoncf066672014-03-22 20:06:52 -0700619 TCGArg tmp;
Richard Hendersonc45cb8b2014-09-19 13:49:15 -0700620 TCGOpcode opc = op->opc;
621 const TCGOpDef *def = &tcg_op_defs[opc];
622
Aurelien Jarno1208d7d2015-07-27 12:41:44 +0200623 /* Count the arguments, and initialize the temps that are
624 going to be used */
Richard Hendersonc45cb8b2014-09-19 13:49:15 -0700625 if (opc == INDEX_op_call) {
Richard Hendersoncd9090a2017-11-14 13:02:51 +0100626 nb_oargs = TCGOP_CALLO(op);
627 nb_iargs = TCGOP_CALLI(op);
Aurelien Jarno1208d7d2015-07-27 12:41:44 +0200628 for (i = 0; i < nb_oargs + nb_iargs; i++) {
Richard Henderson63490392017-06-20 13:43:15 -0700629 TCGTemp *ts = arg_temp(op->args[i]);
630 if (ts) {
Emilio G. Cota34184b02017-07-19 14:32:24 -0400631 init_ts_info(infos, &temps_used, ts);
Aurelien Jarno1208d7d2015-07-27 12:41:44 +0200632 }
633 }
Aurelien Jarno1ff8c542012-09-11 16:18:49 +0200634 } else {
Richard Hendersoncf066672014-03-22 20:06:52 -0700635 nb_oargs = def->nb_oargs;
636 nb_iargs = def->nb_iargs;
Aurelien Jarno1208d7d2015-07-27 12:41:44 +0200637 for (i = 0; i < nb_oargs + nb_iargs; i++) {
Emilio G. Cota34184b02017-07-19 14:32:24 -0400638 init_arg_info(infos, &temps_used, op->args[i]);
Aurelien Jarno1208d7d2015-07-27 12:41:44 +0200639 }
Richard Hendersoncf066672014-03-22 20:06:52 -0700640 }
641
642 /* Do copy propagation */
643 for (i = nb_oargs; i < nb_oargs + nb_iargs; i++) {
Richard Henderson63490392017-06-20 13:43:15 -0700644 TCGTemp *ts = arg_temp(op->args[i]);
645 if (ts && ts_is_copy(ts)) {
646 op->args[i] = temp_arg(find_better_copy(s, ts));
Kirill Batuzov22613af2011-07-07 16:37:13 +0400647 }
648 }
649
Kirill Batuzov53108fb2011-07-07 16:37:14 +0400650 /* For commutative operations make constant second argument */
Richard Hendersonc45cb8b2014-09-19 13:49:15 -0700651 switch (opc) {
Richard Henderson170ba882017-11-22 09:07:11 +0100652 CASE_OP_32_64_VEC(add):
653 CASE_OP_32_64_VEC(mul):
654 CASE_OP_32_64_VEC(and):
655 CASE_OP_32_64_VEC(or):
656 CASE_OP_32_64_VEC(xor):
Richard Hendersoncb25c802011-08-17 14:11:47 -0700657 CASE_OP_32_64(eqv):
658 CASE_OP_32_64(nand):
659 CASE_OP_32_64(nor):
Richard Henderson03271522013-08-14 14:35:56 -0700660 CASE_OP_32_64(muluh):
661 CASE_OP_32_64(mulsh):
Richard Hendersonacd93702016-12-08 12:28:42 -0800662 swap_commutative(op->args[0], &op->args[1], &op->args[2]);
Kirill Batuzov53108fb2011-07-07 16:37:14 +0400663 break;
Aurelien Jarno65a7cce2012-09-06 16:47:14 +0200664 CASE_OP_32_64(brcond):
Richard Hendersonacd93702016-12-08 12:28:42 -0800665 if (swap_commutative(-1, &op->args[0], &op->args[1])) {
666 op->args[2] = tcg_swap_cond(op->args[2]);
Aurelien Jarno65a7cce2012-09-06 16:47:14 +0200667 }
668 break;
669 CASE_OP_32_64(setcond):
Richard Hendersonacd93702016-12-08 12:28:42 -0800670 if (swap_commutative(op->args[0], &op->args[1], &op->args[2])) {
671 op->args[3] = tcg_swap_cond(op->args[3]);
Aurelien Jarno65a7cce2012-09-06 16:47:14 +0200672 }
673 break;
Richard Hendersonfa01a202012-09-21 10:13:37 -0700674 CASE_OP_32_64(movcond):
Richard Hendersonacd93702016-12-08 12:28:42 -0800675 if (swap_commutative(-1, &op->args[1], &op->args[2])) {
676 op->args[5] = tcg_swap_cond(op->args[5]);
Richard Hendersonfa01a202012-09-21 10:13:37 -0700677 }
Richard Henderson5d8f5362012-09-21 10:13:38 -0700678 /* For movcond, we canonicalize the "false" input reg to match
679 the destination reg so that the tcg backend can implement
680 a "move if true" operation. */
Richard Hendersonacd93702016-12-08 12:28:42 -0800681 if (swap_commutative(op->args[0], &op->args[4], &op->args[3])) {
682 op->args[5] = tcg_invert_cond(op->args[5]);
Richard Henderson5d8f5362012-09-21 10:13:38 -0700683 }
Richard Henderson1e484e62012-10-02 11:32:22 -0700684 break;
Richard Hendersond7156f72013-02-19 23:51:52 -0800685 CASE_OP_32_64(add2):
Richard Hendersonacd93702016-12-08 12:28:42 -0800686 swap_commutative(op->args[0], &op->args[2], &op->args[4]);
687 swap_commutative(op->args[1], &op->args[3], &op->args[5]);
Richard Henderson1e484e62012-10-02 11:32:22 -0700688 break;
Richard Hendersond7156f72013-02-19 23:51:52 -0800689 CASE_OP_32_64(mulu2):
Richard Henderson4d3203f2013-02-19 23:51:53 -0800690 CASE_OP_32_64(muls2):
Richard Hendersonacd93702016-12-08 12:28:42 -0800691 swap_commutative(op->args[0], &op->args[2], &op->args[3]);
Richard Henderson14149682012-10-02 11:32:30 -0700692 break;
Richard Henderson0bfcb862012-10-02 11:32:23 -0700693 case INDEX_op_brcond2_i32:
Richard Hendersonacd93702016-12-08 12:28:42 -0800694 if (swap_commutative2(&op->args[0], &op->args[2])) {
695 op->args[4] = tcg_swap_cond(op->args[4]);
Richard Henderson0bfcb862012-10-02 11:32:23 -0700696 }
697 break;
698 case INDEX_op_setcond2_i32:
Richard Hendersonacd93702016-12-08 12:28:42 -0800699 if (swap_commutative2(&op->args[1], &op->args[3])) {
700 op->args[5] = tcg_swap_cond(op->args[5]);
Richard Henderson0bfcb862012-10-02 11:32:23 -0700701 }
702 break;
Kirill Batuzov53108fb2011-07-07 16:37:14 +0400703 default:
704 break;
705 }
706
Richard Henderson2d497542013-03-21 09:13:33 -0700707 /* Simplify expressions for "shift/rot r, 0, a => movi r, 0",
708 and "sub r, 0, a => neg r, a" case. */
Richard Hendersonc45cb8b2014-09-19 13:49:15 -0700709 switch (opc) {
Aurelien Jarno01ee5282012-09-06 16:47:14 +0200710 CASE_OP_32_64(shl):
711 CASE_OP_32_64(shr):
712 CASE_OP_32_64(sar):
713 CASE_OP_32_64(rotl):
714 CASE_OP_32_64(rotr):
Richard Henderson63490392017-06-20 13:43:15 -0700715 if (arg_is_const(op->args[1])
716 && arg_info(op->args[1])->val == 0) {
Richard Hendersonacd93702016-12-08 12:28:42 -0800717 tcg_opt_gen_movi(s, op, op->args[0], 0);
Aurelien Jarno01ee5282012-09-06 16:47:14 +0200718 continue;
719 }
720 break;
Richard Henderson170ba882017-11-22 09:07:11 +0100721 CASE_OP_32_64_VEC(sub):
Richard Henderson2d497542013-03-21 09:13:33 -0700722 {
723 TCGOpcode neg_op;
724 bool have_neg;
725
Richard Henderson63490392017-06-20 13:43:15 -0700726 if (arg_is_const(op->args[2])) {
Richard Henderson2d497542013-03-21 09:13:33 -0700727 /* Proceed with possible constant folding. */
728 break;
729 }
Richard Hendersonc45cb8b2014-09-19 13:49:15 -0700730 if (opc == INDEX_op_sub_i32) {
Richard Henderson2d497542013-03-21 09:13:33 -0700731 neg_op = INDEX_op_neg_i32;
732 have_neg = TCG_TARGET_HAS_neg_i32;
Richard Henderson170ba882017-11-22 09:07:11 +0100733 } else if (opc == INDEX_op_sub_i64) {
Richard Henderson2d497542013-03-21 09:13:33 -0700734 neg_op = INDEX_op_neg_i64;
735 have_neg = TCG_TARGET_HAS_neg_i64;
Richard Hendersonac383dd2019-04-20 00:27:24 +0000736 } else if (TCG_TARGET_HAS_neg_vec) {
737 TCGType type = TCGOP_VECL(op) + TCG_TYPE_V64;
738 unsigned vece = TCGOP_VECE(op);
Richard Henderson170ba882017-11-22 09:07:11 +0100739 neg_op = INDEX_op_neg_vec;
Richard Hendersonac383dd2019-04-20 00:27:24 +0000740 have_neg = tcg_can_emit_vec_op(neg_op, type, vece) > 0;
741 } else {
742 break;
Richard Henderson2d497542013-03-21 09:13:33 -0700743 }
744 if (!have_neg) {
745 break;
746 }
Richard Henderson63490392017-06-20 13:43:15 -0700747 if (arg_is_const(op->args[1])
748 && arg_info(op->args[1])->val == 0) {
Richard Hendersonc45cb8b2014-09-19 13:49:15 -0700749 op->opc = neg_op;
Richard Hendersonacd93702016-12-08 12:28:42 -0800750 reset_temp(op->args[0]);
751 op->args[1] = op->args[2];
Richard Henderson2d497542013-03-21 09:13:33 -0700752 continue;
753 }
754 }
755 break;
Richard Henderson170ba882017-11-22 09:07:11 +0100756 CASE_OP_32_64_VEC(xor):
Richard Hendersone201b562014-01-28 13:15:38 -0800757 CASE_OP_32_64(nand):
Richard Henderson63490392017-06-20 13:43:15 -0700758 if (!arg_is_const(op->args[1])
759 && arg_is_const(op->args[2])
760 && arg_info(op->args[2])->val == -1) {
Richard Hendersone201b562014-01-28 13:15:38 -0800761 i = 1;
762 goto try_not;
763 }
764 break;
765 CASE_OP_32_64(nor):
Richard Henderson63490392017-06-20 13:43:15 -0700766 if (!arg_is_const(op->args[1])
767 && arg_is_const(op->args[2])
768 && arg_info(op->args[2])->val == 0) {
Richard Hendersone201b562014-01-28 13:15:38 -0800769 i = 1;
770 goto try_not;
771 }
772 break;
Richard Henderson170ba882017-11-22 09:07:11 +0100773 CASE_OP_32_64_VEC(andc):
Richard Henderson63490392017-06-20 13:43:15 -0700774 if (!arg_is_const(op->args[2])
775 && arg_is_const(op->args[1])
776 && arg_info(op->args[1])->val == -1) {
Richard Hendersone201b562014-01-28 13:15:38 -0800777 i = 2;
778 goto try_not;
779 }
780 break;
Richard Henderson170ba882017-11-22 09:07:11 +0100781 CASE_OP_32_64_VEC(orc):
Richard Hendersone201b562014-01-28 13:15:38 -0800782 CASE_OP_32_64(eqv):
Richard Henderson63490392017-06-20 13:43:15 -0700783 if (!arg_is_const(op->args[2])
784 && arg_is_const(op->args[1])
785 && arg_info(op->args[1])->val == 0) {
Richard Hendersone201b562014-01-28 13:15:38 -0800786 i = 2;
787 goto try_not;
788 }
789 break;
790 try_not:
791 {
792 TCGOpcode not_op;
793 bool have_not;
794
Richard Henderson170ba882017-11-22 09:07:11 +0100795 if (def->flags & TCG_OPF_VECTOR) {
796 not_op = INDEX_op_not_vec;
797 have_not = TCG_TARGET_HAS_not_vec;
798 } else if (def->flags & TCG_OPF_64BIT) {
Richard Hendersone201b562014-01-28 13:15:38 -0800799 not_op = INDEX_op_not_i64;
800 have_not = TCG_TARGET_HAS_not_i64;
801 } else {
802 not_op = INDEX_op_not_i32;
803 have_not = TCG_TARGET_HAS_not_i32;
804 }
805 if (!have_not) {
806 break;
807 }
Richard Hendersonc45cb8b2014-09-19 13:49:15 -0700808 op->opc = not_op;
Richard Hendersonacd93702016-12-08 12:28:42 -0800809 reset_temp(op->args[0]);
810 op->args[1] = op->args[i];
Richard Hendersone201b562014-01-28 13:15:38 -0800811 continue;
812 }
Aurelien Jarno01ee5282012-09-06 16:47:14 +0200813 default:
814 break;
815 }
816
Richard Henderson464a1442014-01-31 07:42:11 -0600817 /* Simplify expression for "op r, a, const => mov r, a" cases */
Richard Hendersonc45cb8b2014-09-19 13:49:15 -0700818 switch (opc) {
Richard Henderson170ba882017-11-22 09:07:11 +0100819 CASE_OP_32_64_VEC(add):
820 CASE_OP_32_64_VEC(sub):
821 CASE_OP_32_64_VEC(or):
822 CASE_OP_32_64_VEC(xor):
823 CASE_OP_32_64_VEC(andc):
Kirill Batuzov55c09752011-07-07 16:37:16 +0400824 CASE_OP_32_64(shl):
825 CASE_OP_32_64(shr):
826 CASE_OP_32_64(sar):
Richard Henderson25c4d9c2011-08-17 14:11:46 -0700827 CASE_OP_32_64(rotl):
828 CASE_OP_32_64(rotr):
Richard Henderson63490392017-06-20 13:43:15 -0700829 if (!arg_is_const(op->args[1])
830 && arg_is_const(op->args[2])
831 && arg_info(op->args[2])->val == 0) {
Richard Hendersonacd93702016-12-08 12:28:42 -0800832 tcg_opt_gen_mov(s, op, op->args[0], op->args[1]);
Aurelien Jarno97a79eb2015-06-05 11:19:18 +0200833 continue;
Kirill Batuzov53108fb2011-07-07 16:37:14 +0400834 }
835 break;
Richard Henderson170ba882017-11-22 09:07:11 +0100836 CASE_OP_32_64_VEC(and):
837 CASE_OP_32_64_VEC(orc):
Richard Henderson464a1442014-01-31 07:42:11 -0600838 CASE_OP_32_64(eqv):
Richard Henderson63490392017-06-20 13:43:15 -0700839 if (!arg_is_const(op->args[1])
840 && arg_is_const(op->args[2])
841 && arg_info(op->args[2])->val == -1) {
Richard Hendersonacd93702016-12-08 12:28:42 -0800842 tcg_opt_gen_mov(s, op, op->args[0], op->args[1]);
Aurelien Jarno97a79eb2015-06-05 11:19:18 +0200843 continue;
Richard Henderson464a1442014-01-31 07:42:11 -0600844 }
845 break;
Aurelien Jarno56e49432012-09-06 16:47:13 +0200846 default:
847 break;
848 }
849
Aurelien Jarno30312442013-09-03 08:27:38 +0200850 /* Simplify using known-zero bits. Currently only ops with a single
851 output argument is supported. */
Paolo Bonzini3a9d8b12013-01-11 15:42:52 -0800852 mask = -1;
Paolo Bonzini633f6502013-01-11 15:42:53 -0800853 affected = -1;
Richard Hendersonc45cb8b2014-09-19 13:49:15 -0700854 switch (opc) {
Paolo Bonzini3a9d8b12013-01-11 15:42:52 -0800855 CASE_OP_32_64(ext8s):
Richard Henderson63490392017-06-20 13:43:15 -0700856 if ((arg_info(op->args[1])->mask & 0x80) != 0) {
Paolo Bonzini3a9d8b12013-01-11 15:42:52 -0800857 break;
858 }
859 CASE_OP_32_64(ext8u):
860 mask = 0xff;
861 goto and_const;
862 CASE_OP_32_64(ext16s):
Richard Henderson63490392017-06-20 13:43:15 -0700863 if ((arg_info(op->args[1])->mask & 0x8000) != 0) {
Paolo Bonzini3a9d8b12013-01-11 15:42:52 -0800864 break;
865 }
866 CASE_OP_32_64(ext16u):
867 mask = 0xffff;
868 goto and_const;
869 case INDEX_op_ext32s_i64:
Richard Henderson63490392017-06-20 13:43:15 -0700870 if ((arg_info(op->args[1])->mask & 0x80000000) != 0) {
Paolo Bonzini3a9d8b12013-01-11 15:42:52 -0800871 break;
872 }
873 case INDEX_op_ext32u_i64:
874 mask = 0xffffffffU;
875 goto and_const;
876
877 CASE_OP_32_64(and):
Richard Henderson63490392017-06-20 13:43:15 -0700878 mask = arg_info(op->args[2])->mask;
879 if (arg_is_const(op->args[2])) {
Paolo Bonzini3a9d8b12013-01-11 15:42:52 -0800880 and_const:
Richard Henderson63490392017-06-20 13:43:15 -0700881 affected = arg_info(op->args[1])->mask & ~mask;
Paolo Bonzini3a9d8b12013-01-11 15:42:52 -0800882 }
Richard Henderson63490392017-06-20 13:43:15 -0700883 mask = arg_info(op->args[1])->mask & mask;
Paolo Bonzini3a9d8b12013-01-11 15:42:52 -0800884 break;
885
Aurelien Jarno8bcb5c82015-07-27 12:41:45 +0200886 case INDEX_op_ext_i32_i64:
Richard Henderson63490392017-06-20 13:43:15 -0700887 if ((arg_info(op->args[1])->mask & 0x80000000) != 0) {
Aurelien Jarno8bcb5c82015-07-27 12:41:45 +0200888 break;
889 }
890 case INDEX_op_extu_i32_i64:
891 /* We do not compute affected as it is a size changing op. */
Richard Henderson63490392017-06-20 13:43:15 -0700892 mask = (uint32_t)arg_info(op->args[1])->mask;
Aurelien Jarno8bcb5c82015-07-27 12:41:45 +0200893 break;
894
Richard Henderson23ec69ed2014-01-28 12:03:24 -0800895 CASE_OP_32_64(andc):
896 /* Known-zeros does not imply known-ones. Therefore unless
Richard Hendersonacd93702016-12-08 12:28:42 -0800897 op->args[2] is constant, we can't infer anything from it. */
Richard Henderson63490392017-06-20 13:43:15 -0700898 if (arg_is_const(op->args[2])) {
899 mask = ~arg_info(op->args[2])->mask;
Richard Henderson23ec69ed2014-01-28 12:03:24 -0800900 goto and_const;
901 }
Richard Henderson63490392017-06-20 13:43:15 -0700902 /* But we certainly know nothing outside args[1] may be set. */
903 mask = arg_info(op->args[1])->mask;
Richard Henderson23ec69ed2014-01-28 12:03:24 -0800904 break;
905
Aurelien Jarnoe46b2252013-09-03 08:27:38 +0200906 case INDEX_op_sar_i32:
Richard Henderson63490392017-06-20 13:43:15 -0700907 if (arg_is_const(op->args[2])) {
908 tmp = arg_info(op->args[2])->val & 31;
909 mask = (int32_t)arg_info(op->args[1])->mask >> tmp;
Aurelien Jarnoe46b2252013-09-03 08:27:38 +0200910 }
911 break;
912 case INDEX_op_sar_i64:
Richard Henderson63490392017-06-20 13:43:15 -0700913 if (arg_is_const(op->args[2])) {
914 tmp = arg_info(op->args[2])->val & 63;
915 mask = (int64_t)arg_info(op->args[1])->mask >> tmp;
Paolo Bonzini3a9d8b12013-01-11 15:42:52 -0800916 }
917 break;
918
Aurelien Jarnoe46b2252013-09-03 08:27:38 +0200919 case INDEX_op_shr_i32:
Richard Henderson63490392017-06-20 13:43:15 -0700920 if (arg_is_const(op->args[2])) {
921 tmp = arg_info(op->args[2])->val & 31;
922 mask = (uint32_t)arg_info(op->args[1])->mask >> tmp;
Aurelien Jarnoe46b2252013-09-03 08:27:38 +0200923 }
924 break;
925 case INDEX_op_shr_i64:
Richard Henderson63490392017-06-20 13:43:15 -0700926 if (arg_is_const(op->args[2])) {
927 tmp = arg_info(op->args[2])->val & 63;
928 mask = (uint64_t)arg_info(op->args[1])->mask >> tmp;
Paolo Bonzini3a9d8b12013-01-11 15:42:52 -0800929 }
930 break;
931
Richard Henderson609ad702015-07-24 07:16:00 -0700932 case INDEX_op_extrl_i64_i32:
Richard Henderson63490392017-06-20 13:43:15 -0700933 mask = (uint32_t)arg_info(op->args[1])->mask;
Richard Henderson609ad702015-07-24 07:16:00 -0700934 break;
935 case INDEX_op_extrh_i64_i32:
Richard Henderson63490392017-06-20 13:43:15 -0700936 mask = (uint64_t)arg_info(op->args[1])->mask >> 32;
Richard Henderson4bb7a412013-09-09 17:03:24 -0700937 break;
938
Paolo Bonzini3a9d8b12013-01-11 15:42:52 -0800939 CASE_OP_32_64(shl):
Richard Henderson63490392017-06-20 13:43:15 -0700940 if (arg_is_const(op->args[2])) {
941 tmp = arg_info(op->args[2])->val & (TCG_TARGET_REG_BITS - 1);
942 mask = arg_info(op->args[1])->mask << tmp;
Paolo Bonzini3a9d8b12013-01-11 15:42:52 -0800943 }
944 break;
945
946 CASE_OP_32_64(neg):
947 /* Set to 1 all bits to the left of the rightmost. */
Richard Henderson63490392017-06-20 13:43:15 -0700948 mask = -(arg_info(op->args[1])->mask
949 & -arg_info(op->args[1])->mask);
Paolo Bonzini3a9d8b12013-01-11 15:42:52 -0800950 break;
951
952 CASE_OP_32_64(deposit):
Richard Henderson63490392017-06-20 13:43:15 -0700953 mask = deposit64(arg_info(op->args[1])->mask,
954 op->args[3], op->args[4],
955 arg_info(op->args[2])->mask);
Paolo Bonzini3a9d8b12013-01-11 15:42:52 -0800956 break;
957
Richard Henderson7ec8bab2016-10-14 12:04:32 -0500958 CASE_OP_32_64(extract):
Richard Henderson63490392017-06-20 13:43:15 -0700959 mask = extract64(arg_info(op->args[1])->mask,
960 op->args[2], op->args[3]);
Richard Hendersonacd93702016-12-08 12:28:42 -0800961 if (op->args[2] == 0) {
Richard Henderson63490392017-06-20 13:43:15 -0700962 affected = arg_info(op->args[1])->mask & ~mask;
Richard Henderson7ec8bab2016-10-14 12:04:32 -0500963 }
964 break;
965 CASE_OP_32_64(sextract):
Richard Henderson63490392017-06-20 13:43:15 -0700966 mask = sextract64(arg_info(op->args[1])->mask,
Richard Hendersonacd93702016-12-08 12:28:42 -0800967 op->args[2], op->args[3]);
968 if (op->args[2] == 0 && (tcg_target_long)mask >= 0) {
Richard Henderson63490392017-06-20 13:43:15 -0700969 affected = arg_info(op->args[1])->mask & ~mask;
Richard Henderson7ec8bab2016-10-14 12:04:32 -0500970 }
971 break;
972
Paolo Bonzini3a9d8b12013-01-11 15:42:52 -0800973 CASE_OP_32_64(or):
974 CASE_OP_32_64(xor):
Richard Henderson63490392017-06-20 13:43:15 -0700975 mask = arg_info(op->args[1])->mask | arg_info(op->args[2])->mask;
Paolo Bonzini3a9d8b12013-01-11 15:42:52 -0800976 break;
977
Richard Henderson0e28d002016-11-16 09:23:28 +0100978 case INDEX_op_clz_i32:
979 case INDEX_op_ctz_i32:
Richard Henderson63490392017-06-20 13:43:15 -0700980 mask = arg_info(op->args[2])->mask | 31;
Richard Henderson0e28d002016-11-16 09:23:28 +0100981 break;
982
983 case INDEX_op_clz_i64:
984 case INDEX_op_ctz_i64:
Richard Henderson63490392017-06-20 13:43:15 -0700985 mask = arg_info(op->args[2])->mask | 63;
Richard Henderson0e28d002016-11-16 09:23:28 +0100986 break;
987
Richard Hendersona768e4e2016-11-21 11:13:39 +0100988 case INDEX_op_ctpop_i32:
989 mask = 32 | 31;
990 break;
991 case INDEX_op_ctpop_i64:
992 mask = 64 | 63;
993 break;
994
Paolo Bonzini3a9d8b12013-01-11 15:42:52 -0800995 CASE_OP_32_64(setcond):
Richard Hendersona7635512014-04-23 22:18:30 -0700996 case INDEX_op_setcond2_i32:
Paolo Bonzini3a9d8b12013-01-11 15:42:52 -0800997 mask = 1;
998 break;
999
1000 CASE_OP_32_64(movcond):
Richard Henderson63490392017-06-20 13:43:15 -07001001 mask = arg_info(op->args[3])->mask | arg_info(op->args[4])->mask;
Paolo Bonzini3a9d8b12013-01-11 15:42:52 -08001002 break;
1003
Aurelien Jarnoc8d70272013-09-03 08:27:39 +02001004 CASE_OP_32_64(ld8u):
Aurelien Jarnoc8d70272013-09-03 08:27:39 +02001005 mask = 0xff;
1006 break;
1007 CASE_OP_32_64(ld16u):
Aurelien Jarnoc8d70272013-09-03 08:27:39 +02001008 mask = 0xffff;
1009 break;
1010 case INDEX_op_ld32u_i64:
Aurelien Jarnoc8d70272013-09-03 08:27:39 +02001011 mask = 0xffffffffu;
1012 break;
1013
1014 CASE_OP_32_64(qemu_ld):
1015 {
Richard Hendersonacd93702016-12-08 12:28:42 -08001016 TCGMemOpIdx oi = op->args[nb_oargs + nb_iargs];
Richard Henderson59227d52015-05-12 11:51:44 -07001017 TCGMemOp mop = get_memop(oi);
Aurelien Jarnoc8d70272013-09-03 08:27:39 +02001018 if (!(mop & MO_SIGN)) {
1019 mask = (2ULL << ((8 << (mop & MO_SIZE)) - 1)) - 1;
1020 }
1021 }
1022 break;
1023
Paolo Bonzini3a9d8b12013-01-11 15:42:52 -08001024 default:
1025 break;
1026 }
1027
Richard Hendersonbc8d6882014-06-08 18:24:14 -07001028 /* 32-bit ops generate 32-bit results. For the result is zero test
1029 below, we can ignore high bits, but for further optimizations we
1030 need to record that the high bits contain garbage. */
Richard Henderson24666ba2014-05-22 11:14:10 -07001031 partmask = mask;
Richard Hendersonbc8d6882014-06-08 18:24:14 -07001032 if (!(def->flags & TCG_OPF_64BIT)) {
Richard Henderson24666ba2014-05-22 11:14:10 -07001033 mask |= ~(tcg_target_ulong)0xffffffffu;
1034 partmask &= 0xffffffffu;
1035 affected &= 0xffffffffu;
Aurelien Jarnof096dc92013-09-03 08:27:38 +02001036 }
1037
Richard Henderson24666ba2014-05-22 11:14:10 -07001038 if (partmask == 0) {
Aurelien Jarnoeabb7b92016-04-21 10:48:49 +02001039 tcg_debug_assert(nb_oargs == 1);
Richard Hendersonacd93702016-12-08 12:28:42 -08001040 tcg_opt_gen_movi(s, op, op->args[0], 0);
Paolo Bonzini633f6502013-01-11 15:42:53 -08001041 continue;
1042 }
1043 if (affected == 0) {
Aurelien Jarnoeabb7b92016-04-21 10:48:49 +02001044 tcg_debug_assert(nb_oargs == 1);
Richard Hendersonacd93702016-12-08 12:28:42 -08001045 tcg_opt_gen_mov(s, op, op->args[0], op->args[1]);
Paolo Bonzini633f6502013-01-11 15:42:53 -08001046 continue;
1047 }
1048
Aurelien Jarno56e49432012-09-06 16:47:13 +02001049 /* Simplify expression for "op r, a, 0 => movi r, 0" cases */
Richard Hendersonc45cb8b2014-09-19 13:49:15 -07001050 switch (opc) {
Richard Henderson170ba882017-11-22 09:07:11 +01001051 CASE_OP_32_64_VEC(and):
1052 CASE_OP_32_64_VEC(mul):
Richard Henderson03271522013-08-14 14:35:56 -07001053 CASE_OP_32_64(muluh):
1054 CASE_OP_32_64(mulsh):
Richard Henderson63490392017-06-20 13:43:15 -07001055 if (arg_is_const(op->args[2])
1056 && arg_info(op->args[2])->val == 0) {
Richard Hendersonacd93702016-12-08 12:28:42 -08001057 tcg_opt_gen_movi(s, op, op->args[0], 0);
Kirill Batuzov53108fb2011-07-07 16:37:14 +04001058 continue;
1059 }
1060 break;
Aurelien Jarno56e49432012-09-06 16:47:13 +02001061 default:
1062 break;
1063 }
1064
1065 /* Simplify expression for "op r, a, a => mov r, a" cases */
Richard Hendersonc45cb8b2014-09-19 13:49:15 -07001066 switch (opc) {
Richard Henderson170ba882017-11-22 09:07:11 +01001067 CASE_OP_32_64_VEC(or):
1068 CASE_OP_32_64_VEC(and):
Richard Henderson63490392017-06-20 13:43:15 -07001069 if (args_are_copies(op->args[1], op->args[2])) {
Richard Hendersonacd93702016-12-08 12:28:42 -08001070 tcg_opt_gen_mov(s, op, op->args[0], op->args[1]);
Kirill Batuzov9a810902011-07-07 16:37:15 +04001071 continue;
1072 }
1073 break;
Blue Swirlfe0de7a2011-07-30 19:18:32 +00001074 default:
1075 break;
Kirill Batuzov53108fb2011-07-07 16:37:14 +04001076 }
1077
Aurelien Jarno3c941932012-09-18 19:12:36 +02001078 /* Simplify expression for "op r, a, a => movi r, 0" cases */
Richard Hendersonc45cb8b2014-09-19 13:49:15 -07001079 switch (opc) {
Richard Henderson170ba882017-11-22 09:07:11 +01001080 CASE_OP_32_64_VEC(andc):
1081 CASE_OP_32_64_VEC(sub):
1082 CASE_OP_32_64_VEC(xor):
Richard Henderson63490392017-06-20 13:43:15 -07001083 if (args_are_copies(op->args[1], op->args[2])) {
Richard Hendersonacd93702016-12-08 12:28:42 -08001084 tcg_opt_gen_movi(s, op, op->args[0], 0);
Aurelien Jarno3c941932012-09-18 19:12:36 +02001085 continue;
1086 }
1087 break;
1088 default:
1089 break;
1090 }
1091
Kirill Batuzov22613af2011-07-07 16:37:13 +04001092 /* Propagate constants through copy operations and do constant
1093 folding. Constants will be substituted to arguments by register
1094 allocator where needed and possible. Also detect copies. */
Richard Hendersonc45cb8b2014-09-19 13:49:15 -07001095 switch (opc) {
Richard Henderson170ba882017-11-22 09:07:11 +01001096 CASE_OP_32_64_VEC(mov):
Richard Hendersonacd93702016-12-08 12:28:42 -08001097 tcg_opt_gen_mov(s, op, op->args[0], op->args[1]);
Aurelien Jarno97a79eb2015-06-05 11:19:18 +02001098 break;
Kirill Batuzov22613af2011-07-07 16:37:13 +04001099 CASE_OP_32_64(movi):
Richard Henderson170ba882017-11-22 09:07:11 +01001100 case INDEX_op_dupi_vec:
Richard Hendersonacd93702016-12-08 12:28:42 -08001101 tcg_opt_gen_movi(s, op, op->args[0], op->args[1]);
Kirill Batuzov22613af2011-07-07 16:37:13 +04001102 break;
Richard Henderson6e14e912012-10-02 11:32:24 -07001103
Richard Henderson170ba882017-11-22 09:07:11 +01001104 case INDEX_op_dup_vec:
1105 if (arg_is_const(op->args[1])) {
1106 tmp = arg_info(op->args[1])->val;
1107 tmp = dup_const(TCGOP_VECE(op), tmp);
1108 tcg_opt_gen_movi(s, op, op->args[0], tmp);
Richard Henderson1fb57da72018-08-05 16:32:58 -07001109 break;
Richard Henderson170ba882017-11-22 09:07:11 +01001110 }
Richard Henderson1fb57da72018-08-05 16:32:58 -07001111 goto do_default;
Richard Henderson170ba882017-11-22 09:07:11 +01001112
Kirill Batuzova640f032011-07-07 16:37:17 +04001113 CASE_OP_32_64(not):
Richard Hendersoncb25c802011-08-17 14:11:47 -07001114 CASE_OP_32_64(neg):
Richard Henderson25c4d9c2011-08-17 14:11:46 -07001115 CASE_OP_32_64(ext8s):
1116 CASE_OP_32_64(ext8u):
1117 CASE_OP_32_64(ext16s):
1118 CASE_OP_32_64(ext16u):
Richard Hendersona768e4e2016-11-21 11:13:39 +01001119 CASE_OP_32_64(ctpop):
Richard Henderson64985942018-11-20 08:53:34 +01001120 CASE_OP_32_64(bswap16):
1121 CASE_OP_32_64(bswap32):
1122 case INDEX_op_bswap64_i64:
Kirill Batuzova640f032011-07-07 16:37:17 +04001123 case INDEX_op_ext32s_i64:
1124 case INDEX_op_ext32u_i64:
Aurelien Jarno8bcb5c82015-07-27 12:41:45 +02001125 case INDEX_op_ext_i32_i64:
1126 case INDEX_op_extu_i32_i64:
Richard Henderson609ad702015-07-24 07:16:00 -07001127 case INDEX_op_extrl_i64_i32:
1128 case INDEX_op_extrh_i64_i32:
Richard Henderson63490392017-06-20 13:43:15 -07001129 if (arg_is_const(op->args[1])) {
1130 tmp = do_constant_folding(opc, arg_info(op->args[1])->val, 0);
Richard Hendersonacd93702016-12-08 12:28:42 -08001131 tcg_opt_gen_movi(s, op, op->args[0], tmp);
Richard Henderson6e14e912012-10-02 11:32:24 -07001132 break;
Kirill Batuzova640f032011-07-07 16:37:17 +04001133 }
Richard Henderson6e14e912012-10-02 11:32:24 -07001134 goto do_default;
1135
Kirill Batuzov53108fb2011-07-07 16:37:14 +04001136 CASE_OP_32_64(add):
1137 CASE_OP_32_64(sub):
1138 CASE_OP_32_64(mul):
Kirill Batuzov9a810902011-07-07 16:37:15 +04001139 CASE_OP_32_64(or):
1140 CASE_OP_32_64(and):
1141 CASE_OP_32_64(xor):
Kirill Batuzov55c09752011-07-07 16:37:16 +04001142 CASE_OP_32_64(shl):
1143 CASE_OP_32_64(shr):
1144 CASE_OP_32_64(sar):
Richard Henderson25c4d9c2011-08-17 14:11:46 -07001145 CASE_OP_32_64(rotl):
1146 CASE_OP_32_64(rotr):
Richard Hendersoncb25c802011-08-17 14:11:47 -07001147 CASE_OP_32_64(andc):
1148 CASE_OP_32_64(orc):
1149 CASE_OP_32_64(eqv):
1150 CASE_OP_32_64(nand):
1151 CASE_OP_32_64(nor):
Richard Henderson03271522013-08-14 14:35:56 -07001152 CASE_OP_32_64(muluh):
1153 CASE_OP_32_64(mulsh):
Richard Henderson01547f72013-08-14 15:22:46 -07001154 CASE_OP_32_64(div):
1155 CASE_OP_32_64(divu):
1156 CASE_OP_32_64(rem):
1157 CASE_OP_32_64(remu):
Richard Henderson63490392017-06-20 13:43:15 -07001158 if (arg_is_const(op->args[1]) && arg_is_const(op->args[2])) {
1159 tmp = do_constant_folding(opc, arg_info(op->args[1])->val,
1160 arg_info(op->args[2])->val);
Richard Hendersonacd93702016-12-08 12:28:42 -08001161 tcg_opt_gen_movi(s, op, op->args[0], tmp);
Richard Henderson6e14e912012-10-02 11:32:24 -07001162 break;
Kirill Batuzov53108fb2011-07-07 16:37:14 +04001163 }
Richard Henderson6e14e912012-10-02 11:32:24 -07001164 goto do_default;
1165
Richard Henderson0e28d002016-11-16 09:23:28 +01001166 CASE_OP_32_64(clz):
1167 CASE_OP_32_64(ctz):
Richard Henderson63490392017-06-20 13:43:15 -07001168 if (arg_is_const(op->args[1])) {
1169 TCGArg v = arg_info(op->args[1])->val;
Richard Henderson0e28d002016-11-16 09:23:28 +01001170 if (v != 0) {
1171 tmp = do_constant_folding(opc, v, 0);
Richard Hendersonacd93702016-12-08 12:28:42 -08001172 tcg_opt_gen_movi(s, op, op->args[0], tmp);
Richard Henderson0e28d002016-11-16 09:23:28 +01001173 } else {
Richard Hendersonacd93702016-12-08 12:28:42 -08001174 tcg_opt_gen_mov(s, op, op->args[0], op->args[2]);
Richard Henderson0e28d002016-11-16 09:23:28 +01001175 }
1176 break;
1177 }
1178 goto do_default;
1179
Aurelien Jarno7ef55fc2012-09-21 11:07:29 +02001180 CASE_OP_32_64(deposit):
Richard Henderson63490392017-06-20 13:43:15 -07001181 if (arg_is_const(op->args[1]) && arg_is_const(op->args[2])) {
1182 tmp = deposit64(arg_info(op->args[1])->val,
1183 op->args[3], op->args[4],
1184 arg_info(op->args[2])->val);
Richard Hendersonacd93702016-12-08 12:28:42 -08001185 tcg_opt_gen_movi(s, op, op->args[0], tmp);
Richard Henderson6e14e912012-10-02 11:32:24 -07001186 break;
Aurelien Jarno7ef55fc2012-09-21 11:07:29 +02001187 }
Richard Henderson6e14e912012-10-02 11:32:24 -07001188 goto do_default;
1189
Richard Henderson7ec8bab2016-10-14 12:04:32 -05001190 CASE_OP_32_64(extract):
Richard Henderson63490392017-06-20 13:43:15 -07001191 if (arg_is_const(op->args[1])) {
1192 tmp = extract64(arg_info(op->args[1])->val,
Richard Hendersonacd93702016-12-08 12:28:42 -08001193 op->args[2], op->args[3]);
1194 tcg_opt_gen_movi(s, op, op->args[0], tmp);
Richard Henderson7ec8bab2016-10-14 12:04:32 -05001195 break;
1196 }
1197 goto do_default;
1198
1199 CASE_OP_32_64(sextract):
Richard Henderson63490392017-06-20 13:43:15 -07001200 if (arg_is_const(op->args[1])) {
1201 tmp = sextract64(arg_info(op->args[1])->val,
Richard Hendersonacd93702016-12-08 12:28:42 -08001202 op->args[2], op->args[3]);
1203 tcg_opt_gen_movi(s, op, op->args[0], tmp);
Richard Henderson7ec8bab2016-10-14 12:04:32 -05001204 break;
1205 }
1206 goto do_default;
1207
Richard Hendersonfce12962019-02-25 10:29:25 -08001208 CASE_OP_32_64(extract2):
1209 if (arg_is_const(op->args[1]) && arg_is_const(op->args[2])) {
1210 TCGArg v1 = arg_info(op->args[1])->val;
1211 TCGArg v2 = arg_info(op->args[2])->val;
1212
1213 if (opc == INDEX_op_extract2_i64) {
1214 tmp = (v1 >> op->args[3]) | (v2 << (64 - op->args[3]));
1215 } else {
1216 tmp = (v1 >> op->args[3]) | (v2 << (32 - op->args[3]));
1217 tmp = (int32_t)tmp;
1218 }
1219 tcg_opt_gen_movi(s, op, op->args[0], tmp);
1220 break;
1221 }
1222 goto do_default;
1223
Aurelien Jarnof8dd19e2012-09-06 16:47:14 +02001224 CASE_OP_32_64(setcond):
Richard Hendersonacd93702016-12-08 12:28:42 -08001225 tmp = do_constant_folding_cond(opc, op->args[1],
1226 op->args[2], op->args[3]);
Aurelien Jarnob336ceb2012-09-18 19:37:00 +02001227 if (tmp != 2) {
Richard Hendersonacd93702016-12-08 12:28:42 -08001228 tcg_opt_gen_movi(s, op, op->args[0], tmp);
Richard Henderson6e14e912012-10-02 11:32:24 -07001229 break;
Aurelien Jarnof8dd19e2012-09-06 16:47:14 +02001230 }
Richard Henderson6e14e912012-10-02 11:32:24 -07001231 goto do_default;
1232
Aurelien Jarnofbeaa262012-09-06 16:47:14 +02001233 CASE_OP_32_64(brcond):
Richard Hendersonacd93702016-12-08 12:28:42 -08001234 tmp = do_constant_folding_cond(opc, op->args[0],
1235 op->args[1], op->args[2]);
Aurelien Jarnob336ceb2012-09-18 19:37:00 +02001236 if (tmp != 2) {
1237 if (tmp) {
Emilio G. Cota34184b02017-07-19 14:32:24 -04001238 bitmap_zero(temps_used.l, nb_temps);
Richard Hendersonc45cb8b2014-09-19 13:49:15 -07001239 op->opc = INDEX_op_br;
Richard Hendersonacd93702016-12-08 12:28:42 -08001240 op->args[0] = op->args[3];
Aurelien Jarnofbeaa262012-09-06 16:47:14 +02001241 } else {
Richard Henderson0c627cd2014-03-30 16:51:54 -07001242 tcg_op_remove(s, op);
Aurelien Jarnofbeaa262012-09-06 16:47:14 +02001243 }
Richard Henderson6e14e912012-10-02 11:32:24 -07001244 break;
Aurelien Jarnofbeaa262012-09-06 16:47:14 +02001245 }
Richard Henderson6e14e912012-10-02 11:32:24 -07001246 goto do_default;
1247
Richard Hendersonfa01a202012-09-21 10:13:37 -07001248 CASE_OP_32_64(movcond):
Richard Hendersonacd93702016-12-08 12:28:42 -08001249 tmp = do_constant_folding_cond(opc, op->args[1],
1250 op->args[2], op->args[5]);
Aurelien Jarnob336ceb2012-09-18 19:37:00 +02001251 if (tmp != 2) {
Richard Hendersonacd93702016-12-08 12:28:42 -08001252 tcg_opt_gen_mov(s, op, op->args[0], op->args[4-tmp]);
Richard Henderson6e14e912012-10-02 11:32:24 -07001253 break;
Richard Hendersonfa01a202012-09-21 10:13:37 -07001254 }
Richard Henderson63490392017-06-20 13:43:15 -07001255 if (arg_is_const(op->args[3]) && arg_is_const(op->args[4])) {
1256 tcg_target_ulong tv = arg_info(op->args[3])->val;
1257 tcg_target_ulong fv = arg_info(op->args[4])->val;
Richard Hendersonacd93702016-12-08 12:28:42 -08001258 TCGCond cond = op->args[5];
Richard Henderson333b21b2016-10-23 20:44:32 -07001259 if (fv == 1 && tv == 0) {
1260 cond = tcg_invert_cond(cond);
1261 } else if (!(tv == 1 && fv == 0)) {
1262 goto do_default;
1263 }
Richard Hendersonacd93702016-12-08 12:28:42 -08001264 op->args[3] = cond;
Richard Henderson333b21b2016-10-23 20:44:32 -07001265 op->opc = opc = (opc == INDEX_op_movcond_i32
1266 ? INDEX_op_setcond_i32
1267 : INDEX_op_setcond_i64);
1268 nb_iargs = 2;
1269 }
Richard Henderson6e14e912012-10-02 11:32:24 -07001270 goto do_default;
1271
Richard Henderson212c3282012-10-02 11:32:28 -07001272 case INDEX_op_add2_i32:
1273 case INDEX_op_sub2_i32:
Richard Henderson63490392017-06-20 13:43:15 -07001274 if (arg_is_const(op->args[2]) && arg_is_const(op->args[3])
1275 && arg_is_const(op->args[4]) && arg_is_const(op->args[5])) {
1276 uint32_t al = arg_info(op->args[2])->val;
1277 uint32_t ah = arg_info(op->args[3])->val;
1278 uint32_t bl = arg_info(op->args[4])->val;
1279 uint32_t bh = arg_info(op->args[5])->val;
Richard Henderson212c3282012-10-02 11:32:28 -07001280 uint64_t a = ((uint64_t)ah << 32) | al;
1281 uint64_t b = ((uint64_t)bh << 32) | bl;
1282 TCGArg rl, rh;
Emilio G. Cotaac1043f2018-12-09 14:37:19 -05001283 TCGOp *op2 = tcg_op_insert_before(s, op, INDEX_op_movi_i32);
Richard Henderson212c3282012-10-02 11:32:28 -07001284
Richard Hendersonc45cb8b2014-09-19 13:49:15 -07001285 if (opc == INDEX_op_add2_i32) {
Richard Henderson212c3282012-10-02 11:32:28 -07001286 a += b;
1287 } else {
1288 a -= b;
1289 }
1290
Richard Hendersonacd93702016-12-08 12:28:42 -08001291 rl = op->args[0];
1292 rh = op->args[1];
1293 tcg_opt_gen_movi(s, op, rl, (int32_t)a);
1294 tcg_opt_gen_movi(s, op2, rh, (int32_t)(a >> 32));
Richard Henderson212c3282012-10-02 11:32:28 -07001295 break;
1296 }
1297 goto do_default;
1298
Richard Henderson14149682012-10-02 11:32:30 -07001299 case INDEX_op_mulu2_i32:
Richard Henderson63490392017-06-20 13:43:15 -07001300 if (arg_is_const(op->args[2]) && arg_is_const(op->args[3])) {
1301 uint32_t a = arg_info(op->args[2])->val;
1302 uint32_t b = arg_info(op->args[3])->val;
Richard Henderson14149682012-10-02 11:32:30 -07001303 uint64_t r = (uint64_t)a * b;
1304 TCGArg rl, rh;
Emilio G. Cotaac1043f2018-12-09 14:37:19 -05001305 TCGOp *op2 = tcg_op_insert_before(s, op, INDEX_op_movi_i32);
Richard Henderson14149682012-10-02 11:32:30 -07001306
Richard Hendersonacd93702016-12-08 12:28:42 -08001307 rl = op->args[0];
1308 rh = op->args[1];
1309 tcg_opt_gen_movi(s, op, rl, (int32_t)r);
1310 tcg_opt_gen_movi(s, op2, rh, (int32_t)(r >> 32));
Richard Henderson14149682012-10-02 11:32:30 -07001311 break;
1312 }
1313 goto do_default;
1314
Richard Hendersonbc1473e2012-10-02 11:32:25 -07001315 case INDEX_op_brcond2_i32:
Richard Hendersonacd93702016-12-08 12:28:42 -08001316 tmp = do_constant_folding_cond2(&op->args[0], &op->args[2],
1317 op->args[4]);
Richard Henderson6c4382f2012-10-02 11:32:27 -07001318 if (tmp != 2) {
1319 if (tmp) {
Richard Hendersona7635512014-04-23 22:18:30 -07001320 do_brcond_true:
Emilio G. Cota34184b02017-07-19 14:32:24 -04001321 bitmap_zero(temps_used.l, nb_temps);
Richard Hendersonc45cb8b2014-09-19 13:49:15 -07001322 op->opc = INDEX_op_br;
Richard Hendersonacd93702016-12-08 12:28:42 -08001323 op->args[0] = op->args[5];
Richard Henderson6c4382f2012-10-02 11:32:27 -07001324 } else {
Richard Hendersona7635512014-04-23 22:18:30 -07001325 do_brcond_false:
Richard Henderson0c627cd2014-03-30 16:51:54 -07001326 tcg_op_remove(s, op);
Richard Henderson6c4382f2012-10-02 11:32:27 -07001327 }
Richard Hendersonacd93702016-12-08 12:28:42 -08001328 } else if ((op->args[4] == TCG_COND_LT
1329 || op->args[4] == TCG_COND_GE)
Richard Henderson63490392017-06-20 13:43:15 -07001330 && arg_is_const(op->args[2])
1331 && arg_info(op->args[2])->val == 0
1332 && arg_is_const(op->args[3])
1333 && arg_info(op->args[3])->val == 0) {
Richard Henderson6c4382f2012-10-02 11:32:27 -07001334 /* Simplify LT/GE comparisons vs zero to a single compare
1335 vs the high word of the input. */
Richard Hendersona7635512014-04-23 22:18:30 -07001336 do_brcond_high:
Emilio G. Cota34184b02017-07-19 14:32:24 -04001337 bitmap_zero(temps_used.l, nb_temps);
Richard Hendersonc45cb8b2014-09-19 13:49:15 -07001338 op->opc = INDEX_op_brcond_i32;
Richard Hendersonacd93702016-12-08 12:28:42 -08001339 op->args[0] = op->args[1];
1340 op->args[1] = op->args[3];
1341 op->args[2] = op->args[4];
1342 op->args[3] = op->args[5];
1343 } else if (op->args[4] == TCG_COND_EQ) {
Richard Hendersona7635512014-04-23 22:18:30 -07001344 /* Simplify EQ comparisons where one of the pairs
1345 can be simplified. */
1346 tmp = do_constant_folding_cond(INDEX_op_brcond_i32,
Richard Hendersonacd93702016-12-08 12:28:42 -08001347 op->args[0], op->args[2],
1348 TCG_COND_EQ);
Richard Hendersona7635512014-04-23 22:18:30 -07001349 if (tmp == 0) {
1350 goto do_brcond_false;
1351 } else if (tmp == 1) {
1352 goto do_brcond_high;
1353 }
1354 tmp = do_constant_folding_cond(INDEX_op_brcond_i32,
Richard Hendersonacd93702016-12-08 12:28:42 -08001355 op->args[1], op->args[3],
1356 TCG_COND_EQ);
Richard Hendersona7635512014-04-23 22:18:30 -07001357 if (tmp == 0) {
1358 goto do_brcond_false;
1359 } else if (tmp != 1) {
1360 goto do_default;
1361 }
1362 do_brcond_low:
Emilio G. Cota34184b02017-07-19 14:32:24 -04001363 bitmap_zero(temps_used.l, nb_temps);
Richard Hendersonc45cb8b2014-09-19 13:49:15 -07001364 op->opc = INDEX_op_brcond_i32;
Richard Hendersonacd93702016-12-08 12:28:42 -08001365 op->args[1] = op->args[2];
1366 op->args[2] = op->args[4];
1367 op->args[3] = op->args[5];
1368 } else if (op->args[4] == TCG_COND_NE) {
Richard Hendersona7635512014-04-23 22:18:30 -07001369 /* Simplify NE comparisons where one of the pairs
1370 can be simplified. */
1371 tmp = do_constant_folding_cond(INDEX_op_brcond_i32,
Richard Hendersonacd93702016-12-08 12:28:42 -08001372 op->args[0], op->args[2],
1373 TCG_COND_NE);
Richard Hendersona7635512014-04-23 22:18:30 -07001374 if (tmp == 0) {
1375 goto do_brcond_high;
1376 } else if (tmp == 1) {
1377 goto do_brcond_true;
1378 }
1379 tmp = do_constant_folding_cond(INDEX_op_brcond_i32,
Richard Hendersonacd93702016-12-08 12:28:42 -08001380 op->args[1], op->args[3],
1381 TCG_COND_NE);
Richard Hendersona7635512014-04-23 22:18:30 -07001382 if (tmp == 0) {
1383 goto do_brcond_low;
1384 } else if (tmp == 1) {
1385 goto do_brcond_true;
1386 }
1387 goto do_default;
Richard Henderson6c4382f2012-10-02 11:32:27 -07001388 } else {
1389 goto do_default;
Richard Hendersonbc1473e2012-10-02 11:32:25 -07001390 }
Richard Henderson6c4382f2012-10-02 11:32:27 -07001391 break;
Richard Hendersonbc1473e2012-10-02 11:32:25 -07001392
1393 case INDEX_op_setcond2_i32:
Richard Hendersonacd93702016-12-08 12:28:42 -08001394 tmp = do_constant_folding_cond2(&op->args[1], &op->args[3],
1395 op->args[5]);
Richard Henderson6c4382f2012-10-02 11:32:27 -07001396 if (tmp != 2) {
Richard Hendersona7635512014-04-23 22:18:30 -07001397 do_setcond_const:
Richard Hendersonacd93702016-12-08 12:28:42 -08001398 tcg_opt_gen_movi(s, op, op->args[0], tmp);
1399 } else if ((op->args[5] == TCG_COND_LT
1400 || op->args[5] == TCG_COND_GE)
Richard Henderson63490392017-06-20 13:43:15 -07001401 && arg_is_const(op->args[3])
1402 && arg_info(op->args[3])->val == 0
1403 && arg_is_const(op->args[4])
1404 && arg_info(op->args[4])->val == 0) {
Richard Henderson6c4382f2012-10-02 11:32:27 -07001405 /* Simplify LT/GE comparisons vs zero to a single compare
1406 vs the high word of the input. */
Richard Hendersona7635512014-04-23 22:18:30 -07001407 do_setcond_high:
Richard Hendersonacd93702016-12-08 12:28:42 -08001408 reset_temp(op->args[0]);
Richard Henderson63490392017-06-20 13:43:15 -07001409 arg_info(op->args[0])->mask = 1;
Richard Hendersonc45cb8b2014-09-19 13:49:15 -07001410 op->opc = INDEX_op_setcond_i32;
Richard Hendersonacd93702016-12-08 12:28:42 -08001411 op->args[1] = op->args[2];
1412 op->args[2] = op->args[4];
1413 op->args[3] = op->args[5];
1414 } else if (op->args[5] == TCG_COND_EQ) {
Richard Hendersona7635512014-04-23 22:18:30 -07001415 /* Simplify EQ comparisons where one of the pairs
1416 can be simplified. */
1417 tmp = do_constant_folding_cond(INDEX_op_setcond_i32,
Richard Hendersonacd93702016-12-08 12:28:42 -08001418 op->args[1], op->args[3],
1419 TCG_COND_EQ);
Richard Hendersona7635512014-04-23 22:18:30 -07001420 if (tmp == 0) {
1421 goto do_setcond_const;
1422 } else if (tmp == 1) {
1423 goto do_setcond_high;
1424 }
1425 tmp = do_constant_folding_cond(INDEX_op_setcond_i32,
Richard Hendersonacd93702016-12-08 12:28:42 -08001426 op->args[2], op->args[4],
1427 TCG_COND_EQ);
Richard Hendersona7635512014-04-23 22:18:30 -07001428 if (tmp == 0) {
1429 goto do_setcond_high;
1430 } else if (tmp != 1) {
1431 goto do_default;
1432 }
1433 do_setcond_low:
Richard Hendersonacd93702016-12-08 12:28:42 -08001434 reset_temp(op->args[0]);
Richard Henderson63490392017-06-20 13:43:15 -07001435 arg_info(op->args[0])->mask = 1;
Richard Hendersonc45cb8b2014-09-19 13:49:15 -07001436 op->opc = INDEX_op_setcond_i32;
Richard Hendersonacd93702016-12-08 12:28:42 -08001437 op->args[2] = op->args[3];
1438 op->args[3] = op->args[5];
1439 } else if (op->args[5] == TCG_COND_NE) {
Richard Hendersona7635512014-04-23 22:18:30 -07001440 /* Simplify NE comparisons where one of the pairs
1441 can be simplified. */
1442 tmp = do_constant_folding_cond(INDEX_op_setcond_i32,
Richard Hendersonacd93702016-12-08 12:28:42 -08001443 op->args[1], op->args[3],
1444 TCG_COND_NE);
Richard Hendersona7635512014-04-23 22:18:30 -07001445 if (tmp == 0) {
1446 goto do_setcond_high;
1447 } else if (tmp == 1) {
1448 goto do_setcond_const;
1449 }
1450 tmp = do_constant_folding_cond(INDEX_op_setcond_i32,
Richard Hendersonacd93702016-12-08 12:28:42 -08001451 op->args[2], op->args[4],
1452 TCG_COND_NE);
Richard Hendersona7635512014-04-23 22:18:30 -07001453 if (tmp == 0) {
1454 goto do_setcond_low;
1455 } else if (tmp == 1) {
1456 goto do_setcond_const;
1457 }
1458 goto do_default;
Richard Henderson6c4382f2012-10-02 11:32:27 -07001459 } else {
1460 goto do_default;
Richard Hendersonbc1473e2012-10-02 11:32:25 -07001461 }
Richard Henderson6c4382f2012-10-02 11:32:27 -07001462 break;
Richard Hendersonbc1473e2012-10-02 11:32:25 -07001463
Kirill Batuzov8f2e8c02011-07-07 16:37:12 +04001464 case INDEX_op_call:
Richard Hendersonacd93702016-12-08 12:28:42 -08001465 if (!(op->args[nb_oargs + nb_iargs + 1]
Richard Hendersoncf066672014-03-22 20:06:52 -07001466 & (TCG_CALL_NO_READ_GLOBALS | TCG_CALL_NO_WRITE_GLOBALS))) {
Kirill Batuzov22613af2011-07-07 16:37:13 +04001467 for (i = 0; i < nb_globals; i++) {
Aurelien Jarno1208d7d2015-07-27 12:41:44 +02001468 if (test_bit(i, temps_used.l)) {
Richard Henderson63490392017-06-20 13:43:15 -07001469 reset_ts(&s->temps[i]);
Aurelien Jarno1208d7d2015-07-27 12:41:44 +02001470 }
Kirill Batuzov22613af2011-07-07 16:37:13 +04001471 }
1472 }
Richard Hendersoncf066672014-03-22 20:06:52 -07001473 goto do_reset_output;
Richard Henderson6e14e912012-10-02 11:32:24 -07001474
Kirill Batuzov8f2e8c02011-07-07 16:37:12 +04001475 default:
Richard Henderson6e14e912012-10-02 11:32:24 -07001476 do_default:
1477 /* Default case: we know nothing about operation (or were unable
1478 to compute the operation result) so no propagation is done.
1479 We trash everything if the operation is the end of a basic
Paolo Bonzini3a9d8b12013-01-11 15:42:52 -08001480 block, otherwise we only trash the output args. "mask" is
1481 the non-zero bits mask for the first output arg. */
Aurelien Jarnoa2550662012-09-19 21:40:30 +02001482 if (def->flags & TCG_OPF_BB_END) {
Emilio G. Cota34184b02017-07-19 14:32:24 -04001483 bitmap_zero(temps_used.l, nb_temps);
Aurelien Jarnoa2550662012-09-19 21:40:30 +02001484 } else {
Richard Hendersoncf066672014-03-22 20:06:52 -07001485 do_reset_output:
1486 for (i = 0; i < nb_oargs; i++) {
Richard Hendersonacd93702016-12-08 12:28:42 -08001487 reset_temp(op->args[i]);
Aurelien Jarno30312442013-09-03 08:27:38 +02001488 /* Save the corresponding known-zero bits mask for the
1489 first output argument (only one supported so far). */
1490 if (i == 0) {
Richard Henderson63490392017-06-20 13:43:15 -07001491 arg_info(op->args[i])->mask = mask;
Aurelien Jarno30312442013-09-03 08:27:38 +02001492 }
Aurelien Jarnoa2550662012-09-19 21:40:30 +02001493 }
Kirill Batuzov22613af2011-07-07 16:37:13 +04001494 }
Kirill Batuzov8f2e8c02011-07-07 16:37:12 +04001495 break;
1496 }
Pranith Kumar34f93922016-08-23 09:48:25 -04001497
1498 /* Eliminate duplicate and redundant fence instructions. */
Richard Hendersonacd93702016-12-08 12:28:42 -08001499 if (prev_mb) {
Pranith Kumar34f93922016-08-23 09:48:25 -04001500 switch (opc) {
1501 case INDEX_op_mb:
1502 /* Merge two barriers of the same type into one,
1503 * or a weaker barrier into a stronger one,
1504 * or two weaker barriers into a stronger one.
1505 * mb X; mb Y => mb X|Y
1506 * mb; strl => mb; st
1507 * ldaq; mb => ld; mb
1508 * ldaq; strl => ld; mb; st
1509 * Other combinations are also merged into a strong
1510 * barrier. This is stricter than specified but for
1511 * the purposes of TCG is better than not optimizing.
1512 */
Richard Hendersonacd93702016-12-08 12:28:42 -08001513 prev_mb->args[0] |= op->args[0];
Pranith Kumar34f93922016-08-23 09:48:25 -04001514 tcg_op_remove(s, op);
1515 break;
1516
1517 default:
1518 /* Opcodes that end the block stop the optimization. */
1519 if ((def->flags & TCG_OPF_BB_END) == 0) {
1520 break;
1521 }
1522 /* fallthru */
1523 case INDEX_op_qemu_ld_i32:
1524 case INDEX_op_qemu_ld_i64:
1525 case INDEX_op_qemu_st_i32:
1526 case INDEX_op_qemu_st_i64:
1527 case INDEX_op_call:
1528 /* Opcodes that touch guest memory stop the optimization. */
Richard Hendersonacd93702016-12-08 12:28:42 -08001529 prev_mb = NULL;
Pranith Kumar34f93922016-08-23 09:48:25 -04001530 break;
1531 }
1532 } else if (opc == INDEX_op_mb) {
Richard Hendersonacd93702016-12-08 12:28:42 -08001533 prev_mb = op;
Pranith Kumar34f93922016-08-23 09:48:25 -04001534 }
Kirill Batuzov8f2e8c02011-07-07 16:37:12 +04001535 }
Kirill Batuzov8f2e8c02011-07-07 16:37:12 +04001536}