chell/lars: Add override for JTAG to UART for USBPD

Enable access to USBPD on chell/lars boards.  Re-structure the
placement in this file to collect all the sklake boards in the
same place.

BUG=chrome-os-partner:46289
TEST=successfully run "flash_ec --board=chell_pd"

Change-Id: If5757377f0e59c484d540637230811d584b14e40
Signed-off-by: Duncan Laurie <dlaurie@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/308747
Reviewed-by: Todd Broch <tbroch@chromium.org>
diff --git a/servo/servo_interfaces.py b/servo/servo_interfaces.py
index 70fbe8f..1ce5ea3 100644
--- a/servo/servo_interfaces.py
+++ b/servo/servo_interfaces.py
@@ -82,10 +82,6 @@
 INTERFACE_BOARDS['samus'][0x18d1][0x5002] = \
     list(INTERFACE_DEFAULTS[0x18d1][0x5002])
 INTERFACE_BOARDS['samus'][0x18d1][0x5002][5] = 'ftdi_uart'
-# Glados re-purposes JTAG to be UART
-INTERFACE_BOARDS['glados'][0x18d1][0x5002] = \
-    list(INTERFACE_DEFAULTS[0x18d1][0x5002])
-INTERFACE_BOARDS['glados'][0x18d1][0x5002][0] = 'ftdi_uart'
 # oak re-purposes EC SPI to be USB PD UART
 INTERFACE_BOARDS['oak'][0x18d1][0x5002] = \
     list(INTERFACE_DEFAULTS[0x18d1][0x5002])
@@ -94,7 +90,17 @@
 INTERFACE_BOARDS['strago'][0x18d1][0x5002] = \
     list(INTERFACE_DEFAULTS[0x18d1][0x5002])
 INTERFACE_BOARDS['strago'][0x18d1][0x5002][0] = 'ftdi_uart'
-# kunimitsu re-purposes JTAG to be UART
+
+# Skylake boards re-purpose JTAG to be UART
+INTERFACE_BOARDS['chell'][0x18d1][0x5002] = \
+    list(INTERFACE_DEFAULTS[0x18d1][0x5002])
+INTERFACE_BOARDS['chell'][0x18d1][0x5002][0] = 'ftdi_uart'
+INTERFACE_BOARDS['glados'][0x18d1][0x5002] = \
+    list(INTERFACE_DEFAULTS[0x18d1][0x5002])
+INTERFACE_BOARDS['glados'][0x18d1][0x5002][0] = 'ftdi_uart'
 INTERFACE_BOARDS['kunimitsu'][0x18d1][0x5002] = \
     list(INTERFACE_DEFAULTS[0x18d1][0x5002])
 INTERFACE_BOARDS['kunimitsu'][0x18d1][0x5002][0] = 'ftdi_uart'
+INTERFACE_BOARDS['lars'][0x18d1][0x5002] = \
+    list(INTERFACE_DEFAULTS[0x18d1][0x5002])
+INTERFACE_BOARDS['lars'][0x18d1][0x5002][0] = 'ftdi_uart'