blob: fb6e5ed7b59e9e5e341ab0e86a36243017d316a3 [file] [log] [blame]
rminnich8d3ff912003-10-25 17:01:29 +00001/*
uweb25f1ea2007-08-29 17:52:32 +00002 * This file is part of the flashrom project.
rminnich8d3ff912003-10-25 17:01:29 +00003 *
uwe555dd972007-09-09 20:21:05 +00004 * Copyright (C) 2000 Silicon Integrated System Corporation
5 * Copyright (C) 2006 Giampiero Giancipoli <gianci@email.it>
6 * Copyright (C) 2006 coresystems GmbH <info@coresystems.de>
hailfinger428f2012007-12-31 01:49:00 +00007 * Copyright (C) 2007 Carl-Daniel Hailfinger
rminnich8d3ff912003-10-25 17:01:29 +00008 *
uweb25f1ea2007-08-29 17:52:32 +00009 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License as published by
11 * the Free Software Foundation; either version 2 of the License, or
12 * (at your option) any later version.
rminnich8d3ff912003-10-25 17:01:29 +000013 *
uweb25f1ea2007-08-29 17:52:32 +000014 * This program is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details.
rminnich8d3ff912003-10-25 17:01:29 +000018 *
uweb25f1ea2007-08-29 17:52:32 +000019 * You should have received a copy of the GNU General Public License
20 * along with this program; if not, write to the Free Software
21 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
rminnich8d3ff912003-10-25 17:01:29 +000022 */
23
rminnich8d3ff912003-10-25 17:01:29 +000024#include "flash.h"
rminnich8d3ff912003-10-25 17:01:29 +000025
stepan7abc6322006-11-22 00:29:51 +000026#define MAX_REFLASH_TRIES 0x10
27
hailfinger79cf3672008-05-14 12:03:06 +000028/* Check one byte for odd parity */
29uint8_t oddparity(uint8_t val)
30{
31 val = (val ^ (val >> 4)) & 0xf;
32 val = (val ^ (val >> 2)) & 0x3;
33 return (val ^ (val >> 1)) & 0x1;
34}
35
hailfinger82719632009-05-16 21:22:56 +000036void toggle_ready_jedec(chipaddr dst)
uwedf467892007-08-23 10:20:40 +000037{
38 unsigned int i = 0;
39 uint8_t tmp1, tmp2;
40
hailfinger1ff6e362009-03-06 22:26:00 +000041 tmp1 = chip_readb(dst) & 0x40;
uwedf467892007-08-23 10:20:40 +000042
43 while (i++ < 0xFFFFFFF) {
hailfinger1ff6e362009-03-06 22:26:00 +000044 tmp2 = chip_readb(dst) & 0x40;
uwedf467892007-08-23 10:20:40 +000045 if (tmp1 == tmp2) {
46 break;
47 }
48 tmp1 = tmp2;
49 }
50}
51
hailfinger82719632009-05-16 21:22:56 +000052void data_polling_jedec(chipaddr dst, uint8_t data)
uwedf467892007-08-23 10:20:40 +000053{
54 unsigned int i = 0;
55 uint8_t tmp;
56
57 data &= 0x80;
58
59 while (i++ < 0xFFFFFFF) {
hailfinger1ff6e362009-03-06 22:26:00 +000060 tmp = chip_readb(dst) & 0x80;
uwedf467892007-08-23 10:20:40 +000061 if (tmp == data) {
62 break;
63 }
64 }
65}
66
hailfinger82719632009-05-16 21:22:56 +000067void unprotect_jedec(chipaddr bios)
uwedf467892007-08-23 10:20:40 +000068{
hailfinger1ff6e362009-03-06 22:26:00 +000069 chip_writeb(0xAA, bios + 0x5555);
70 chip_writeb(0x55, bios + 0x2AAA);
71 chip_writeb(0x80, bios + 0x5555);
72 chip_writeb(0xAA, bios + 0x5555);
73 chip_writeb(0x55, bios + 0x2AAA);
74 chip_writeb(0x20, bios + 0x5555);
uwedf467892007-08-23 10:20:40 +000075
hailfingere5829f62009-06-05 17:48:08 +000076 programmer_delay(200);
uwedf467892007-08-23 10:20:40 +000077}
78
hailfinger82719632009-05-16 21:22:56 +000079void protect_jedec(chipaddr bios)
uwedf467892007-08-23 10:20:40 +000080{
hailfinger1ff6e362009-03-06 22:26:00 +000081 chip_writeb(0xAA, bios + 0x5555);
82 chip_writeb(0x55, bios + 0x2AAA);
83 chip_writeb(0xA0, bios + 0x5555);
uwedf467892007-08-23 10:20:40 +000084
hailfingere5829f62009-06-05 17:48:08 +000085 programmer_delay(200);
uwedf467892007-08-23 10:20:40 +000086}
87
ollie5b621572004-03-20 16:46:10 +000088int probe_jedec(struct flashchip *flash)
rminnich8d3ff912003-10-25 17:01:29 +000089{
hailfinger82719632009-05-16 21:22:56 +000090 chipaddr bios = flash->virtual_memory;
ollie6a600992005-11-26 21:55:36 +000091 uint8_t id1, id2;
hailfinger428f2012007-12-31 01:49:00 +000092 uint32_t largeid1, largeid2;
hailfinger027d7d92009-05-11 14:40:31 +000093 uint32_t flashcontent1, flashcontent2;
hailfingerd5b35922009-06-03 14:46:22 +000094 int probe_timing_enter, probe_timing_exit;
95
96 if (flash->probe_timing > 0)
97 probe_timing_enter = probe_timing_exit = flash->probe_timing;
98 else if (flash->probe_timing == TIMING_ZERO) { /* No delay. */
99 probe_timing_enter = probe_timing_exit = 0;
100 } else if (flash->probe_timing == TIMING_FIXME) { /* == _IGNORED */
101 printf_debug("Chip lacks correct probe timing information, "
hailfinger0cb68252009-07-23 01:33:43 +0000102 "using default 10mS/40uS. ");
hailfingerd5b35922009-06-03 14:46:22 +0000103 probe_timing_enter = 10000;
104 probe_timing_exit = 40;
105 } else {
106 printf("Chip has negative value in probe_timing, failing "
107 "without chip access\n");
108 return 0;
109 }
rminnich8d3ff912003-10-25 17:01:29 +0000110
ollie5b621572004-03-20 16:46:10 +0000111 /* Issue JEDEC Product ID Entry command */
hailfinger1ff6e362009-03-06 22:26:00 +0000112 chip_writeb(0xAA, bios + 0x5555);
hailfingere5829f62009-06-05 17:48:08 +0000113 programmer_delay(10);
hailfinger1ff6e362009-03-06 22:26:00 +0000114 chip_writeb(0x55, bios + 0x2AAA);
hailfingere5829f62009-06-05 17:48:08 +0000115 programmer_delay(10);
hailfinger1ff6e362009-03-06 22:26:00 +0000116 chip_writeb(0x90, bios + 0x5555);
hailfingere5829f62009-06-05 17:48:08 +0000117 programmer_delay(probe_timing_enter);
rminnich8d3ff912003-10-25 17:01:29 +0000118
ollie5b621572004-03-20 16:46:10 +0000119 /* Read product ID */
hailfinger1ff6e362009-03-06 22:26:00 +0000120 id1 = chip_readb(bios);
121 id2 = chip_readb(bios + 0x01);
hailfinger428f2012007-12-31 01:49:00 +0000122 largeid1 = id1;
123 largeid2 = id2;
124
125 /* Check if it is a continuation ID, this should be a while loop. */
126 if (id1 == 0x7F) {
127 largeid1 <<= 8;
hailfinger1ff6e362009-03-06 22:26:00 +0000128 id1 = chip_readb(bios + 0x100);
hailfinger428f2012007-12-31 01:49:00 +0000129 largeid1 |= id1;
130 }
131 if (id2 == 0x7F) {
132 largeid2 <<= 8;
hailfinger1ff6e362009-03-06 22:26:00 +0000133 id2 = chip_readb(bios + 0x101);
hailfinger428f2012007-12-31 01:49:00 +0000134 largeid2 |= id2;
135 }
rminnich8d3ff912003-10-25 17:01:29 +0000136
ollie5b621572004-03-20 16:46:10 +0000137 /* Issue JEDEC Product ID Exit command */
hailfinger1ff6e362009-03-06 22:26:00 +0000138 chip_writeb(0xAA, bios + 0x5555);
hailfingere5829f62009-06-05 17:48:08 +0000139 programmer_delay(10);
hailfinger1ff6e362009-03-06 22:26:00 +0000140 chip_writeb(0x55, bios + 0x2AAA);
hailfingere5829f62009-06-05 17:48:08 +0000141 programmer_delay(10);
hailfinger1ff6e362009-03-06 22:26:00 +0000142 chip_writeb(0xF0, bios + 0x5555);
hailfingere5829f62009-06-05 17:48:08 +0000143 programmer_delay(probe_timing_exit);
rminnich8d3ff912003-10-25 17:01:29 +0000144
uwe2a414342009-09-02 22:09:00 +0000145 printf_debug("%s: id1 0x%02x, id2 0x%02x", __func__, largeid1, largeid2);
hailfinger79cf3672008-05-14 12:03:06 +0000146 if (!oddparity(id1))
147 printf_debug(", id1 parity violation");
hailfinger027d7d92009-05-11 14:40:31 +0000148
149 /* Read the product ID location again. We should now see normal flash contents. */
150 flashcontent1 = chip_readb(bios);
151 flashcontent2 = chip_readb(bios + 0x01);
152
153 /* Check if it is a continuation ID, this should be a while loop. */
154 if (flashcontent1 == 0x7F) {
155 flashcontent1 <<= 8;
156 flashcontent1 |= chip_readb(bios + 0x100);
157 }
158 if (flashcontent2 == 0x7F) {
159 flashcontent2 <<= 8;
160 flashcontent2 |= chip_readb(bios + 0x101);
161 }
162
163 if (largeid1 == flashcontent1)
164 printf_debug(", id1 is normal flash content");
165 if (largeid2 == flashcontent2)
166 printf_debug(", id2 is normal flash content");
167
hailfinger79cf3672008-05-14 12:03:06 +0000168 printf_debug("\n");
hailfinger428f2012007-12-31 01:49:00 +0000169 if (largeid1 == flash->manufacture_id && largeid2 == flash->model_id)
ollie5b621572004-03-20 16:46:10 +0000170 return 1;
rminnich8d3ff912003-10-25 17:01:29 +0000171
ollie5b621572004-03-20 16:46:10 +0000172 return 0;
olliea3def632004-03-19 22:10:07 +0000173}
174
hailfinger80f48682009-09-23 22:01:33 +0000175int erase_sector_jedec(struct flashchip *flash, unsigned int page, unsigned int pagesize)
olliea3def632004-03-19 22:10:07 +0000176{
hailfinger7af83692009-06-15 17:23:36 +0000177 chipaddr bios = flash->virtual_memory;
178
ollie5b621572004-03-20 16:46:10 +0000179 /* Issue the Sector Erase command */
hailfinger1ff6e362009-03-06 22:26:00 +0000180 chip_writeb(0xAA, bios + 0x5555);
hailfingere5829f62009-06-05 17:48:08 +0000181 programmer_delay(10);
hailfinger1ff6e362009-03-06 22:26:00 +0000182 chip_writeb(0x55, bios + 0x2AAA);
hailfingere5829f62009-06-05 17:48:08 +0000183 programmer_delay(10);
hailfinger1ff6e362009-03-06 22:26:00 +0000184 chip_writeb(0x80, bios + 0x5555);
hailfingere5829f62009-06-05 17:48:08 +0000185 programmer_delay(10);
ollie0eb62d62004-12-08 20:10:01 +0000186
hailfinger1ff6e362009-03-06 22:26:00 +0000187 chip_writeb(0xAA, bios + 0x5555);
hailfingere5829f62009-06-05 17:48:08 +0000188 programmer_delay(10);
hailfinger1ff6e362009-03-06 22:26:00 +0000189 chip_writeb(0x55, bios + 0x2AAA);
hailfingere5829f62009-06-05 17:48:08 +0000190 programmer_delay(10);
hailfinger1ff6e362009-03-06 22:26:00 +0000191 chip_writeb(0x30, bios + page);
hailfingere5829f62009-06-05 17:48:08 +0000192 programmer_delay(10);
ollie5b621572004-03-20 16:46:10 +0000193
olliea3def632004-03-19 22:10:07 +0000194 /* wait for Toggle bit ready */
195 toggle_ready_jedec(bios);
196
hailfinger7af83692009-06-15 17:23:36 +0000197 if (check_erased_range(flash, page, pagesize)) {
198 fprintf(stderr,"ERASE FAILED!\n");
199 return -1;
200 }
uwebe4477b2007-08-23 16:08:21 +0000201 return 0;
rminnich8d3ff912003-10-25 17:01:29 +0000202}
olliea4302802004-12-07 03:15:51 +0000203
hailfinger80f48682009-09-23 22:01:33 +0000204int erase_block_jedec(struct flashchip *flash, unsigned int block, unsigned int blocksize)
rminnichdfcbaa72004-09-30 16:37:01 +0000205{
hailfinger7af83692009-06-15 17:23:36 +0000206 chipaddr bios = flash->virtual_memory;
207
rminnichdfcbaa72004-09-30 16:37:01 +0000208 /* Issue the Sector Erase command */
hailfinger1ff6e362009-03-06 22:26:00 +0000209 chip_writeb(0xAA, bios + 0x5555);
hailfingere5829f62009-06-05 17:48:08 +0000210 programmer_delay(10);
hailfinger1ff6e362009-03-06 22:26:00 +0000211 chip_writeb(0x55, bios + 0x2AAA);
hailfingere5829f62009-06-05 17:48:08 +0000212 programmer_delay(10);
hailfinger1ff6e362009-03-06 22:26:00 +0000213 chip_writeb(0x80, bios + 0x5555);
hailfingere5829f62009-06-05 17:48:08 +0000214 programmer_delay(10);
ollie0eb62d62004-12-08 20:10:01 +0000215
hailfinger1ff6e362009-03-06 22:26:00 +0000216 chip_writeb(0xAA, bios + 0x5555);
hailfingere5829f62009-06-05 17:48:08 +0000217 programmer_delay(10);
hailfinger1ff6e362009-03-06 22:26:00 +0000218 chip_writeb(0x55, bios + 0x2AAA);
hailfingere5829f62009-06-05 17:48:08 +0000219 programmer_delay(10);
hailfinger1ff6e362009-03-06 22:26:00 +0000220 chip_writeb(0x50, bios + block);
hailfingere5829f62009-06-05 17:48:08 +0000221 programmer_delay(10);
rminnichdfcbaa72004-09-30 16:37:01 +0000222
223 /* wait for Toggle bit ready */
224 toggle_ready_jedec(bios);
225
hailfinger7af83692009-06-15 17:23:36 +0000226 if (check_erased_range(flash, block, blocksize)) {
227 fprintf(stderr,"ERASE FAILED!\n");
228 return -1;
229 }
uwebe4477b2007-08-23 16:08:21 +0000230 return 0;
rminnichdfcbaa72004-09-30 16:37:01 +0000231}
rminnich8d3ff912003-10-25 17:01:29 +0000232
ollie5b621572004-03-20 16:46:10 +0000233int erase_chip_jedec(struct flashchip *flash)
rminnich8d3ff912003-10-25 17:01:29 +0000234{
hailfinger7af83692009-06-15 17:23:36 +0000235 int total_size = flash->total_size * 1024;
hailfinger82719632009-05-16 21:22:56 +0000236 chipaddr bios = flash->virtual_memory;
rminnich8d3ff912003-10-25 17:01:29 +0000237
ollie5b621572004-03-20 16:46:10 +0000238 /* Issue the JEDEC Chip Erase command */
hailfinger1ff6e362009-03-06 22:26:00 +0000239 chip_writeb(0xAA, bios + 0x5555);
hailfingere5829f62009-06-05 17:48:08 +0000240 programmer_delay(10);
hailfinger1ff6e362009-03-06 22:26:00 +0000241 chip_writeb(0x55, bios + 0x2AAA);
hailfingere5829f62009-06-05 17:48:08 +0000242 programmer_delay(10);
hailfinger1ff6e362009-03-06 22:26:00 +0000243 chip_writeb(0x80, bios + 0x5555);
hailfingere5829f62009-06-05 17:48:08 +0000244 programmer_delay(10);
ollie0eb62d62004-12-08 20:10:01 +0000245
hailfinger1ff6e362009-03-06 22:26:00 +0000246 chip_writeb(0xAA, bios + 0x5555);
hailfingere5829f62009-06-05 17:48:08 +0000247 programmer_delay(10);
hailfinger1ff6e362009-03-06 22:26:00 +0000248 chip_writeb(0x55, bios + 0x2AAA);
hailfingere5829f62009-06-05 17:48:08 +0000249 programmer_delay(10);
hailfinger1ff6e362009-03-06 22:26:00 +0000250 chip_writeb(0x10, bios + 0x5555);
hailfingere5829f62009-06-05 17:48:08 +0000251 programmer_delay(10);
olliea3def632004-03-19 22:10:07 +0000252
rminnich8d3ff912003-10-25 17:01:29 +0000253 toggle_ready_jedec(bios);
254
hailfinger7af83692009-06-15 17:23:36 +0000255 if (check_erased_range(flash, 0, total_size)) {
256 fprintf(stderr,"ERASE FAILED!\n");
257 return -1;
258 }
uwebe4477b2007-08-23 16:08:21 +0000259 return 0;
rminnich8d3ff912003-10-25 17:01:29 +0000260}
261
hailfingerc2cfc592009-06-25 13:57:31 +0000262int write_page_write_jedec(struct flashchip *flash, uint8_t *src,
263 int start, int page_size)
rminnich8d3ff912003-10-25 17:01:29 +0000264{
stepan7abc6322006-11-22 00:29:51 +0000265 int i, tried = 0, start_index = 0, ok;
stepan7abc6322006-11-22 00:29:51 +0000266 uint8_t *s = src;
hailfingerc2cfc592009-06-25 13:57:31 +0000267 chipaddr bios = flash->virtual_memory;
268 chipaddr dst = bios + start;
269 chipaddr d = dst;
rminnich8d3ff912003-10-25 17:01:29 +0000270
stepan7abc6322006-11-22 00:29:51 +0000271retry:
ollie5b621572004-03-20 16:46:10 +0000272 /* Issue JEDEC Data Unprotect comand */
hailfinger1ff6e362009-03-06 22:26:00 +0000273 chip_writeb(0xAA, bios + 0x5555);
274 chip_writeb(0x55, bios + 0x2AAA);
275 chip_writeb(0xA0, bios + 0x5555);
ollie5b621572004-03-20 16:46:10 +0000276
olliea4302802004-12-07 03:15:51 +0000277 /* transfer data from source to destination */
stepan7abc6322006-11-22 00:29:51 +0000278 for (i = start_index; i < page_size; i++) {
olliea4302802004-12-07 03:15:51 +0000279 /* If the data is 0xFF, don't program it */
uwef6641642007-05-09 10:17:44 +0000280 if (*src != 0xFF)
hailfinger1ff6e362009-03-06 22:26:00 +0000281 chip_writeb(*src, dst);
stepan7abc6322006-11-22 00:29:51 +0000282 dst++;
283 src++;
ollie5b621572004-03-20 16:46:10 +0000284 }
285
ollie5b621572004-03-20 16:46:10 +0000286 toggle_ready_jedec(dst - 1);
olliea4302802004-12-07 03:15:51 +0000287
stepan7abc6322006-11-22 00:29:51 +0000288 dst = d;
289 src = s;
hailfingerc2cfc592009-06-25 13:57:31 +0000290 ok = !verify_range(flash, src, start, page_size, NULL);
uwef6641642007-05-09 10:17:44 +0000291
stepan7abc6322006-11-22 00:29:51 +0000292 if (!ok && tried++ < MAX_REFLASH_TRIES) {
293 start_index = i;
uwef6641642007-05-09 10:17:44 +0000294 goto retry;
295 }
stepan7abc6322006-11-22 00:29:51 +0000296 if (!ok) {
hailfinger82719632009-05-16 21:22:56 +0000297 fprintf(stderr, " page 0x%lx failed!\n",
298 (d - bios) / page_size);
stepan7abc6322006-11-22 00:29:51 +0000299 }
uwebe4477b2007-08-23 16:08:21 +0000300 return !ok;
ollie5b621572004-03-20 16:46:10 +0000301}
302
hailfinger82719632009-05-16 21:22:56 +0000303int write_byte_program_jedec(chipaddr bios, uint8_t *src,
304 chipaddr dst)
olliebb5917a2004-03-22 22:19:17 +0000305{
stepan7abc6322006-11-22 00:29:51 +0000306 int tried = 0, ok = 1;
olliedd68ded2004-12-08 02:10:33 +0000307
olliea4302802004-12-07 03:15:51 +0000308 /* If the data is 0xFF, don't program it */
olliebb5917a2004-03-22 22:19:17 +0000309 if (*src == 0xFF) {
stepan7abc6322006-11-22 00:29:51 +0000310 return -1;
olliebb5917a2004-03-22 22:19:17 +0000311 }
olliea4302802004-12-07 03:15:51 +0000312
olliedd68ded2004-12-08 02:10:33 +0000313retry:
olliebb5917a2004-03-22 22:19:17 +0000314 /* Issue JEDEC Byte Program command */
hailfinger1ff6e362009-03-06 22:26:00 +0000315 chip_writeb(0xAA, bios + 0x5555);
316 chip_writeb(0x55, bios + 0x2AAA);
317 chip_writeb(0xA0, bios + 0x5555);
olliea4302802004-12-07 03:15:51 +0000318
319 /* transfer data from source to destination */
hailfinger1ff6e362009-03-06 22:26:00 +0000320 chip_writeb(*src, dst);
olliebb5917a2004-03-22 22:19:17 +0000321 toggle_ready_jedec(bios);
ollief1845bd2004-03-27 00:18:15 +0000322
hailfinger1ff6e362009-03-06 22:26:00 +0000323 if (chip_readb(dst) != *src && tried++ < MAX_REFLASH_TRIES) {
uwef6641642007-05-09 10:17:44 +0000324 goto retry;
325 }
olliedd68ded2004-12-08 02:10:33 +0000326
stepan7abc6322006-11-22 00:29:51 +0000327 if (tried >= MAX_REFLASH_TRIES)
uwef6641642007-05-09 10:17:44 +0000328 ok = 0;
stepan7abc6322006-11-22 00:29:51 +0000329
uwebe4477b2007-08-23 16:08:21 +0000330 return !ok;
olliebb5917a2004-03-22 22:19:17 +0000331}
332
hailfinger82719632009-05-16 21:22:56 +0000333int write_sector_jedec(chipaddr bios, uint8_t *src,
334 chipaddr dst, unsigned int page_size)
ollie5b621572004-03-20 16:46:10 +0000335{
336 int i;
ollie5b621572004-03-20 16:46:10 +0000337
338 for (i = 0; i < page_size; i++) {
ollief1845bd2004-03-27 00:18:15 +0000339 write_byte_program_jedec(bios, src, dst);
340 dst++, src++;
ollie5b621572004-03-20 16:46:10 +0000341 }
342
uwebe4477b2007-08-23 16:08:21 +0000343 return 0;
ollie5b621572004-03-20 16:46:10 +0000344}
345
ollie6a600992005-11-26 21:55:36 +0000346int write_jedec(struct flashchip *flash, uint8_t *buf)
ollie5b621572004-03-20 16:46:10 +0000347{
348 int i;
olliebb5917a2004-03-22 22:19:17 +0000349 int total_size = flash->total_size * 1024;
350 int page_size = flash->page_size;
hailfinger82719632009-05-16 21:22:56 +0000351 chipaddr bios = flash->virtual_memory;
ollie5b621572004-03-20 16:46:10 +0000352
hailfinger7af83692009-06-15 17:23:36 +0000353 if (erase_chip_jedec(flash)) {
354 fprintf(stderr,"ERASE FAILED!\n");
355 return -1;
uwef6641642007-05-09 10:17:44 +0000356 }
hailfinger7af83692009-06-15 17:23:36 +0000357
uwefd2d0fe2007-10-17 23:55:15 +0000358 printf("Programming page: ");
ollie5b621572004-03-20 16:46:10 +0000359 for (i = 0; i < total_size / page_size; i++) {
360 printf("%04d at address: 0x%08x", i, i * page_size);
hailfingerc2cfc592009-06-25 13:57:31 +0000361 write_page_write_jedec(flash, buf + i * page_size,
362 i * page_size, page_size);
olliebb5917a2004-03-22 22:19:17 +0000363 printf("\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b");
rminnich8d3ff912003-10-25 17:01:29 +0000364 }
365 printf("\n");
ollie5b621572004-03-20 16:46:10 +0000366 protect_jedec(bios);
rminnich8d3ff912003-10-25 17:01:29 +0000367
uwebe4477b2007-08-23 16:08:21 +0000368 return 0;
rminnich8d3ff912003-10-25 17:01:29 +0000369}