blob: a3cf6c8df9a2733f2f8e40332b16754136cb9339 [file] [log] [blame]
Edward O'Callaghan97dd9262020-03-26 00:00:41 +11001/*
2 * This file is part of the flashrom project.
3 *
4 * Copyright (C) 2020 The Chromium OS Authors
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 */
16
17#include <stdlib.h>
18#include <stdint.h>
19#include <stdio.h>
20#include <string.h>
21#include <time.h>
22#include <errno.h>
23
24#include "programmer.h"
25#include "spi.h"
26#include "i2c_helper.h"
27
28
29#define MCU_I2C_SLAVE_ADDR 0x94
30#define REGISTER_ADDRESS (0x94 >> 1)
31#define PAGE_SIZE 256
32#define MAX_SPI_WAIT_RETRIES 1000
33
Edward O'Callaghan33653fd2020-05-04 13:01:54 +100034#define MCU_MODE 0x6F
35#define ENTER_ISP_MODE 0x80
Edward O'Callaghan387632a2020-05-06 16:16:47 +100036#define START_WRITE_XFER 0xA0
37#define WRITE_XFER_STATUS_MASK 0x20
Edward O'Callaghan33653fd2020-05-04 13:01:54 +100038
39#define MCU_DATA_PORT 0x70
40
41#define MAP_PAGE_BYTE2 0x64
42#define MAP_PAGE_BYTE1 0x65
43#define MAP_PAGE_BYTE0 0x66
44
Edward O'Callaghan97dd9262020-03-26 00:00:41 +110045//opcodes
46#define OPCODE_READ 3
47#define OPCODE_WRITE 2
48
Shiyu Sun9a1d3672020-10-07 00:42:59 +110049#define GPIO_CONFIG_ADDRESS 0x104F
50#define GPIO_VALUE_ADDRESS 0xFE3F
Edward O'Callaghan97dd9262020-03-26 00:00:41 +110051
52struct realtek_mst_i2c_spi_data {
53 int fd;
Edward O'Callaghane14374b2020-09-24 15:50:21 +100054 int reset;
Edward O'Callaghan97dd9262020-03-26 00:00:41 +110055};
56
57static int realtek_mst_i2c_spi_write_data(int fd, uint16_t addr, void *buf, uint16_t len)
58{
59 i2c_buffer_t data;
60 if (i2c_buffer_t_fill(&data, buf, len))
61 return SPI_GENERIC_ERROR;
62
63 return i2c_write(fd, addr, &data) == len ? 0 : SPI_GENERIC_ERROR;
64}
65
66static int realtek_mst_i2c_spi_read_data(int fd, uint16_t addr, void *buf, uint16_t len)
67{
68 i2c_buffer_t data;
69 if (i2c_buffer_t_fill(&data, buf, len))
70 return SPI_GENERIC_ERROR;
71
72 return i2c_read(fd, addr, &data) == len ? 0 : SPI_GENERIC_ERROR;
73}
74
75static int get_fd_from_context(const struct flashctx *flash)
76{
77 if (!flash || !flash->mst || !flash->mst->spi.data) {
78 msg_perr("Unable to extract fd from flash context.\n");
79 return SPI_GENERIC_ERROR;
80 }
81 const struct realtek_mst_i2c_spi_data *data =
82 (const struct realtek_mst_i2c_spi_data *)flash->mst->spi.data;
83
84 return data->fd;
85}
86
87static int realtek_mst_i2c_spi_write_register(int fd, uint8_t reg, uint8_t value)
88{
89 uint8_t command[] = { reg, value };
90 return realtek_mst_i2c_spi_write_data(fd, REGISTER_ADDRESS, command, 2);
91}
92
93static int realtek_mst_i2c_spi_read_register(int fd, uint8_t reg, uint8_t *value)
94{
95 uint8_t command[] = { reg };
96 int ret = realtek_mst_i2c_spi_write_data(fd, REGISTER_ADDRESS, command, 1);
97 ret |= realtek_mst_i2c_spi_read_data(fd, REGISTER_ADDRESS, value, 1);
98
99 return ret ? SPI_GENERIC_ERROR : 0;
100}
101
Edward O'Callaghana1ae9fe2020-05-07 11:42:56 +1000102static int realtek_mst_i2c_spi_wait_command_done(int fd, unsigned int offset, int mask,
103 int target, int multiplier)
Edward O'Callaghan97dd9262020-03-26 00:00:41 +1100104{
105 uint8_t val;
106 int tried = 0;
107 int ret = 0;
108 do {
109 ret |= realtek_mst_i2c_spi_read_register(fd, offset, &val);
Edward O'Callaghana1ae9fe2020-05-07 11:42:56 +1000110 } while (!ret && ((val & mask) != target) && ++tried < (MAX_SPI_WAIT_RETRIES*multiplier));
Edward O'Callaghan97dd9262020-03-26 00:00:41 +1100111
112 if (tried == MAX_SPI_WAIT_RETRIES) {
113 msg_perr("%s: Time out on sending command.\n", __func__);
114 return -MAX_SPI_WAIT_RETRIES;
115 }
116
Edward O'Callaghana1ae9fe2020-05-07 11:42:56 +1000117 return (val & mask) != target ? SPI_GENERIC_ERROR : ret;
Edward O'Callaghan97dd9262020-03-26 00:00:41 +1100118}
119
120static int realtek_mst_i2c_spi_enter_isp_mode(int fd)
121{
Edward O'Callaghan33653fd2020-05-04 13:01:54 +1000122 int ret = realtek_mst_i2c_spi_write_register(fd, MCU_MODE, ENTER_ISP_MODE);
Edward O'Callaghan97dd9262020-03-26 00:00:41 +1100123
124 // set internal osc divider register to default to speed up MCU
125 // 0x06A0 = 0x74
126 ret |= realtek_mst_i2c_spi_write_register(fd, 0xF4, 0x9F);
127 ret |= realtek_mst_i2c_spi_write_register(fd, 0xF5, 0x06);
128 ret |= realtek_mst_i2c_spi_write_register(fd, 0xF4, 0xA0);
129 ret |= realtek_mst_i2c_spi_write_register(fd, 0xF5, 0x74);
130
131 return ret;
132}
133
Edward O'Callaghan387632a2020-05-06 16:16:47 +1000134static int realtek_mst_i2c_execute_write(int fd)
135{
136 int ret = realtek_mst_i2c_spi_write_register(fd, MCU_MODE, START_WRITE_XFER);
Edward O'Callaghana1ae9fe2020-05-07 11:42:56 +1000137 ret |= realtek_mst_i2c_spi_wait_command_done(fd, MCU_MODE, WRITE_XFER_STATUS_MASK, 0, 1);
Edward O'Callaghan387632a2020-05-06 16:16:47 +1000138 return ret;
139}
140
Edward O'Callaghan97dd9262020-03-26 00:00:41 +1100141static int realtek_mst_i2c_spi_reset_mpu(int fd)
142{
143 int ret = 0;
144 // 0xFFEE[1] = 1;
145 uint8_t val = 0;
146 ret |= realtek_mst_i2c_spi_read_register(fd, 0xEE, &val);
147 ret |= realtek_mst_i2c_spi_write_register(fd, 0xEE, (val & 0xFD) | 0x02);
148 return ret;
149}
150
Shiyu Sun9a1d3672020-10-07 00:42:59 +1100151static int realtek_mst_i2c_spi_select_indexed_register(int fd, uint16_t address)
152{
153 int ret = 0;
154
155 ret |= realtek_mst_i2c_spi_write_register(fd, 0xF4, 0x9F);
156 ret |= realtek_mst_i2c_spi_write_register(fd, 0xF5, address >> 8);
157 ret |= realtek_mst_i2c_spi_write_register(fd, 0xF4, address & 0xFF);
158
159 return ret;
160}
161
162static int realtek_mst_i2c_spi_write_indexed_register(int fd, uint16_t address, uint8_t val)
163{
164 int ret = 0;
165
166 ret |= realtek_mst_i2c_spi_select_indexed_register(fd, address);
167 ret |= realtek_mst_i2c_spi_write_register(fd, 0xF5, val);
168
169 return ret;
170}
171
172static int realtek_mst_i2c_spi_read_indexed_register(int fd, uint16_t address, uint8_t *val)
173{
174 int ret = 0;
175
176 ret |= realtek_mst_i2c_spi_select_indexed_register(fd, address);
177 ret |= realtek_mst_i2c_spi_read_register(fd, 0xF5, val);
178
179 return ret;
180}
181
182
183/* Toggle the GPIO pin 88, this could be routed to different controls like write
184 * protection or a led. */
185static int realtek_mst_i2c_spi_toggle_gpio_88_strap(int fd, bool toggle)
Edward O'Callaghan97dd9262020-03-26 00:00:41 +1100186{
187 int ret = 0;
188 uint8_t val = 0;
Edward O'Callaghan97dd9262020-03-26 00:00:41 +1100189
Shiyu Sun9a1d3672020-10-07 00:42:59 +1100190 /* Read register 0x104F into val. */
191 ret |= realtek_mst_i2c_spi_read_indexed_register(fd, GPIO_CONFIG_ADDRESS, &val);
192 /* Write 0x104F[3:0] = b0001 to enable the toggle of pin value. */
193 ret |= realtek_mst_i2c_spi_write_indexed_register(fd, GPIO_CONFIG_ADDRESS, (val & 0xF0) | 0x01);
Edward O'Callaghan97dd9262020-03-26 00:00:41 +1100194
Shiyu Sun9a1d3672020-10-07 00:42:59 +1100195 /* Read register 0xFE3F into val. */
196 ret |= realtek_mst_i2c_spi_read_indexed_register(fd, GPIO_VALUE_ADDRESS, &val);
197 /* Write 0xFE3F[0] = b|toggle| to toggle pin value to low/high. */
198 ret |= realtek_mst_i2c_spi_write_indexed_register(fd, GPIO_VALUE_ADDRESS, (val & 0xFE) | toggle);
Edward O'Callaghan97dd9262020-03-26 00:00:41 +1100199
200 return ret;
201}
202
203static int realtek_mst_i2c_spi_send_command(const struct flashctx *flash,
204 unsigned int writecnt, unsigned int readcnt,
205 const unsigned char *writearr,
206 unsigned char *readarr)
207{
208 unsigned i;
Edward O'Callaghana1ae9fe2020-05-07 11:42:56 +1000209 int max_timeout_mul = 1;
Edward O'Callaghan97dd9262020-03-26 00:00:41 +1100210 int ret = 0;
211
212 if (writecnt > 4 || readcnt > 3 || writecnt == 0) {
Edward O'Callaghan97dd9262020-03-26 00:00:41 +1100213 return SPI_GENERIC_ERROR;
214 }
Edward O'Callaghan97dd9262020-03-26 00:00:41 +1100215
216 int fd = get_fd_from_context(flash);
217 if (fd < 0)
218 return SPI_GENERIC_ERROR;
219
Edward O'Callaghan562ed8e2020-05-06 15:24:25 +1000220 /* First byte of writearr should be the spi opcode value, followed by the value to write. */
Edward O'Callaghan97dd9262020-03-26 00:00:41 +1100221 writecnt--;
Edward O'Callaghan562ed8e2020-05-06 15:24:25 +1000222
223 /**
224 * Before dispatching a SPI opcode the MCU register 0x60 requires
225 * the following configuration byte set:
226 *
227 * BIT0 - start [0] , end [1].
228 * BITS[1-4] - counts.
229 * BITS[5-7] - opcode type.
230 *
231 * | bit7 | bit6 | bit5 |
232 * +------+------+------+
233 * | 0 | 1 | 0 | ~ JEDEC_RDID,REMS,READ
234 * | 0 | 1 | 1 | ~ JEDEC_WRSR
235 * | 1 | 0 | 1 | ~ JEDEC_.. erasures.
236 */
237 uint8_t ctrl_reg_val = (writecnt << 3) | (readcnt << 1);
238 switch (writearr[0]) {
239 /* WREN isn't a supported somehow? ignore it. */
240 case JEDEC_WREN: return 0;
241 /* WRSR requires BIT6 && BIT5 set. */
242 case JEDEC_WRSR:
243 ctrl_reg_val |= (1 << 5);
244 ctrl_reg_val |= (2 << 5);
245 break;
246 /* Erasures require BIT7 && BIT5 set. */
Edward O'Callaghan562ed8e2020-05-06 15:24:25 +1000247 case JEDEC_CE_C7:
Edward O'Callaghana1ae9fe2020-05-07 11:42:56 +1000248 max_timeout_mul *= 20; /* chip erasures take much longer! */
249 /* FALLTHRU */
250 case JEDEC_CE_60:
Edward O'Callaghan562ed8e2020-05-06 15:24:25 +1000251 case JEDEC_BE_52:
252 case JEDEC_BE_D8:
253 case JEDEC_BE_D7:
254 case JEDEC_SE:
255 ctrl_reg_val |= (1 << 5);
256 ctrl_reg_val |= (4 << 5);
257 break;
258 default:
259 /* Otherwise things like RDID,REMS,READ require BIT6 */
260 ctrl_reg_val |= (2 << 5);
261 }
Edward O'Callaghan97dd9262020-03-26 00:00:41 +1100262 ret |= realtek_mst_i2c_spi_write_register(fd, 0x60, ctrl_reg_val);
Edward O'Callaghan562ed8e2020-05-06 15:24:25 +1000263 ret |= realtek_mst_i2c_spi_write_register(fd, 0x61, writearr[0]); /* opcode */
Edward O'Callaghan97dd9262020-03-26 00:00:41 +1100264
265 for (i = 0; i < writecnt; ++i)
266 ret |= realtek_mst_i2c_spi_write_register(fd, 0x64 + i, writearr[i + 1]);
267 ret |= realtek_mst_i2c_spi_write_register(fd, 0x60, ctrl_reg_val | 0x1);
268 if (ret)
269 return ret;
270
Edward O'Callaghana1ae9fe2020-05-07 11:42:56 +1000271 ret = realtek_mst_i2c_spi_wait_command_done(fd, 0x60, 0x01, 0, max_timeout_mul);
Edward O'Callaghan97dd9262020-03-26 00:00:41 +1100272 if (ret)
273 return ret;
274
275 for (i = 0; i < readcnt; ++i)
276 ret |= realtek_mst_i2c_spi_read_register(fd, 0x67 + i, &readarr[i]);
277
Edward O'Callaghan97dd9262020-03-26 00:00:41 +1100278 return ret;
279}
280
281static int realtek_mst_i2c_spi_map_page(int fd, uint8_t block_idx, uint8_t page_idx, uint8_t byte_idx)
282{
283 int ret = 0;
Edward O'Callaghan33653fd2020-05-04 13:01:54 +1000284 ret |= realtek_mst_i2c_spi_write_register(fd, MAP_PAGE_BYTE2, block_idx);
285 ret |= realtek_mst_i2c_spi_write_register(fd, MAP_PAGE_BYTE1, page_idx);
286 ret |= realtek_mst_i2c_spi_write_register(fd, MAP_PAGE_BYTE0, byte_idx);
Edward O'Callaghan97dd9262020-03-26 00:00:41 +1100287
288 return ret ? SPI_GENERIC_ERROR : 0;
289}
290
Edward O'Callaghan387632a2020-05-06 16:16:47 +1000291static int realtek_mst_i2c_spi_write_page(int fd, uint8_t reg, const uint8_t *buf, unsigned int len)
292{
293 /**
294 * Using static buffer with maximum possible size,
295 * extra byte is needed for prefixing the data port register at index 0.
296 */
297 uint8_t wbuf[PAGE_SIZE + 1] = { MCU_DATA_PORT };
298 if (len > PAGE_SIZE)
299 return SPI_GENERIC_ERROR;
300
301 memcpy(&wbuf[1], buf, len);
302
303 return realtek_mst_i2c_spi_write_data(fd, REGISTER_ADDRESS, wbuf, len + 1);
304}
305
Edward O'Callaghan97dd9262020-03-26 00:00:41 +1100306static int realtek_mst_i2c_spi_read(struct flashctx *flash, uint8_t *buf,
307 unsigned int start, unsigned int len)
308{
309 unsigned i;
310 int ret = 0;
311
312 if (start & 0xff)
313 return default_spi_read(flash, buf, start, len);
314
315 int fd = get_fd_from_context(flash);
316 if (fd < 0)
317 return SPI_GENERIC_ERROR;
318
319 start--;
320 ret |= realtek_mst_i2c_spi_write_register(fd, 0x60, 0x46); // **
321 ret |= realtek_mst_i2c_spi_write_register(fd, 0x61, OPCODE_READ);
322 uint8_t block_idx = start >> 16;
323 uint8_t page_idx = start >> 8;
324 uint8_t byte_idx = start;
325 ret |= realtek_mst_i2c_spi_map_page(fd, block_idx, page_idx, byte_idx);
326 ret |= realtek_mst_i2c_spi_write_register(fd, 0x6a, 0x03);
327 ret |= realtek_mst_i2c_spi_write_register(fd, 0x60, 0x47); // **
328 if (ret)
329 return ret;
330
Edward O'Callaghana1ae9fe2020-05-07 11:42:56 +1000331 ret = realtek_mst_i2c_spi_wait_command_done(fd, 0x60, 0x01, 0, 1);
Edward O'Callaghan97dd9262020-03-26 00:00:41 +1100332 if (ret)
333 return ret;
334
335 /**
336 * The first byte is just a null, probably a status code?
337 * Advance the read by a offset of one byte and continue.
338 */
339 uint8_t dummy;
Edward O'Callaghan33653fd2020-05-04 13:01:54 +1000340 realtek_mst_i2c_spi_read_register(fd, MCU_DATA_PORT, &dummy);
Edward O'Callaghan97dd9262020-03-26 00:00:41 +1100341
342 for (i = 0; i < len; i += PAGE_SIZE) {
343 ret |= realtek_mst_i2c_spi_read_data(fd, REGISTER_ADDRESS,
344 buf + i, min(len - i, PAGE_SIZE));
345 if (ret)
346 return ret;
347 }
348
349 return ret;
350}
351
352static int realtek_mst_i2c_spi_write_256(struct flashctx *flash, const uint8_t *buf,
353 unsigned int start, unsigned int len)
354{
355 unsigned i;
356 int ret = 0;
357
358 if (start & 0xff)
359 return default_spi_write_256(flash, buf, start, len);
360
361 int fd = get_fd_from_context(flash);
362 if (fd < 0)
363 return SPI_GENERIC_ERROR;
364
Shiyu Sun9a1d3672020-10-07 00:42:59 +1100365 ret = realtek_mst_i2c_spi_toggle_gpio_88_strap(fd, true);
Edward O'Callaghan97dd9262020-03-26 00:00:41 +1100366 if (ret)
367 return ret;
368
Edward O'Callaghan387632a2020-05-06 16:16:47 +1000369 ret |= realtek_mst_i2c_spi_write_register(fd, 0x6D, 0x02); /* write opcode */
370 ret |= realtek_mst_i2c_spi_write_register(fd, 0x71, (PAGE_SIZE - 1)); /* fit len=256 */
Edward O'Callaghan97dd9262020-03-26 00:00:41 +1100371
372 for (i = 0; i < len; i += PAGE_SIZE) {
Edward O'Callaghan387632a2020-05-06 16:16:47 +1000373 uint16_t page_len = min(len - i, PAGE_SIZE);
374 if (len - i < PAGE_SIZE)
375 ret |= realtek_mst_i2c_spi_write_register(fd, 0x71, page_len-1);
376 uint8_t block_idx = (start + i) >> 16;
377 uint8_t page_idx = (start + i) >> 8;
378 ret |= realtek_mst_i2c_spi_map_page(fd, block_idx, page_idx, 0);
379 if (ret)
380 break;
381
382 /* Wait for empty buffer. */
Edward O'Callaghana1ae9fe2020-05-07 11:42:56 +1000383 ret |= realtek_mst_i2c_spi_wait_command_done(fd, MCU_MODE, 0x10, 0x10, 1);
Edward O'Callaghan387632a2020-05-06 16:16:47 +1000384 if (ret)
385 break;
386
387 ret |= realtek_mst_i2c_spi_write_page(fd, MCU_DATA_PORT,
388 buf + i, page_len);
389 if (ret)
390 break;
391 ret |= realtek_mst_i2c_execute_write(fd);
Edward O'Callaghan97dd9262020-03-26 00:00:41 +1100392 if (ret)
393 break;
394 }
395
Edward O'Callaghan387632a2020-05-06 16:16:47 +1000396
Edward O'Callaghan97dd9262020-03-26 00:00:41 +1100397 /* TODO: re-enable the write protection? */
398
399 return ret;
400}
401
402static int realtek_mst_i2c_spi_write_aai(struct flashctx *flash, const uint8_t *buf,
403 unsigned int start, unsigned int len)
404{
405 msg_perr("%s: AAI write function is not supported.\n", __func__);
406 return SPI_GENERIC_ERROR;
407}
408
409static struct spi_master spi_master_i2c_realtek_mst = {
410 .max_data_read = 16,
411 .max_data_write = 8,
412 .command = realtek_mst_i2c_spi_send_command,
413 .multicommand = default_spi_send_multicommand,
414 .read = realtek_mst_i2c_spi_read,
415 .write_256 = realtek_mst_i2c_spi_write_256,
416 .write_aai = realtek_mst_i2c_spi_write_aai,
417};
418
419static int realtek_mst_i2c_spi_shutdown(void *data)
420{
421 int ret = 0;
422 struct realtek_mst_i2c_spi_data *realtek_mst_data =
423 (struct realtek_mst_i2c_spi_data *)data;
424 int fd = realtek_mst_data->fd;
Edward O'Callaghane14374b2020-09-24 15:50:21 +1000425 if (realtek_mst_data->reset) {
426 ret |= realtek_mst_i2c_spi_reset_mpu(fd);
427 if (ret != 0)
428 msg_perr("%s: MCU failed to reset on tear-down.\n", __func__);
429 }
Edward O'Callaghan97dd9262020-03-26 00:00:41 +1100430 i2c_close(fd);
431 free(data);
432
433 return ret;
434}
435
Shiyu Sun4a933bb2020-10-21 04:10:58 +1100436static int get_params(int *i2c_bus, int *reset, int *enter_isp)
Edward O'Callaghan97dd9262020-03-26 00:00:41 +1100437{
Shiyu Sun4a933bb2020-10-21 04:10:58 +1100438 char *bus_str = NULL, *reset_str = NULL, *isp_str = NULL;
439 int ret = SPI_GENERIC_ERROR;
Edward O'Callaghan97dd9262020-03-26 00:00:41 +1100440
441 bus_str = extract_programmer_param("bus");
442 if (bus_str) {
443 char *bus_suffix;
444 errno = 0;
445 int bus = (int)strtol(bus_str, &bus_suffix, 10);
446 if (errno != 0 || bus_str == bus_suffix) {
447 msg_perr("%s: Could not convert 'bus'.\n", __func__);
Edward O'Callaghan9e3199f2020-10-02 12:40:11 +1000448 goto _get_params_failed;
Edward O'Callaghan97dd9262020-03-26 00:00:41 +1100449 }
450
451 if (bus < 0 || bus > 255) {
452 msg_perr("%s: Value for 'bus' is out of range(0-255).\n", __func__);
Edward O'Callaghan9e3199f2020-10-02 12:40:11 +1000453 goto _get_params_failed;
Edward O'Callaghan97dd9262020-03-26 00:00:41 +1100454 }
455
456 if (strlen(bus_suffix) > 0) {
457 msg_perr("%s: Garbage following 'bus' value.\n", __func__);
Edward O'Callaghan9e3199f2020-10-02 12:40:11 +1000458 goto _get_params_failed;
Edward O'Callaghan97dd9262020-03-26 00:00:41 +1100459 }
460
461 msg_pinfo("Using i2c bus %i.\n", bus);
462 *i2c_bus = bus;
463 ret = 0;
Edward O'Callaghan97dd9262020-03-26 00:00:41 +1100464 } else {
465 msg_perr("%s: Bus number not specified.\n", __func__);
466 }
Edward O'Callaghane14374b2020-09-24 15:50:21 +1000467
468 reset_str = extract_programmer_param("reset-mcu");
469 if (reset_str) {
470 if (reset_str[0] == '1')
471 *reset = 1;
472 else if (reset_str[0] == '0')
473 *reset = 0;
474 else {
475 msg_perr("%s: Incorrect param format, reset-mcu=1 or 0.\n", __func__);
476 ret = SPI_GENERIC_ERROR;
477 }
478 } else
479 *reset = 0; /* Default behaviour is no MCU reset on tear-down. */
480 free(reset_str);
481
Shiyu Sun4a933bb2020-10-21 04:10:58 +1100482 isp_str = extract_programmer_param("enter-isp");
483 if (isp_str) {
484 if (isp_str[0] == '1')
485 *enter_isp = 1;
486 else if (isp_str[0] == '0')
487 *enter_isp = 0;
488 else {
489 msg_perr("%s: Incorrect param format, enter-isp=1 or 0.\n", __func__);
490 ret = SPI_GENERIC_ERROR;
491 }
492 } else
493 *enter_isp = 1; /* Default behaviour is enter ISP on setup. */
494 free(isp_str);
495
Edward O'Callaghan9e3199f2020-10-02 12:40:11 +1000496_get_params_failed:
Edward O'Callaghan97dd9262020-03-26 00:00:41 +1100497 if (bus_str)
498 free(bus_str);
499
500 return ret;
501}
502
503int realtek_mst_i2c_spi_init(void)
504{
505 int ret = 0;
Shiyu Sun4a933bb2020-10-21 04:10:58 +1100506 int i2c_bus = 0, reset = 0, enter_isp = 0;
Edward O'Callaghan97dd9262020-03-26 00:00:41 +1100507
Shiyu Sun4a933bb2020-10-21 04:10:58 +1100508 if (get_params(&i2c_bus, &reset, &enter_isp))
Edward O'Callaghan97dd9262020-03-26 00:00:41 +1100509 return SPI_GENERIC_ERROR;
510
511 int fd = i2c_open(i2c_bus, REGISTER_ADDRESS, 0);
512 if (fd < 0)
513 return fd;
514
Shiyu Sun4a933bb2020-10-21 04:10:58 +1100515 if (enter_isp) {
516 ret |= realtek_mst_i2c_spi_enter_isp_mode(fd);
517 if (ret)
518 return ret;
519 }
Edward O'Callaghan97dd9262020-03-26 00:00:41 +1100520
521 struct realtek_mst_i2c_spi_data *data = calloc(1, sizeof(struct realtek_mst_i2c_spi_data));
522 if (!data) {
523 msg_perr("Unable to allocate space for extra SPI master data.\n");
524 return SPI_GENERIC_ERROR;
525 }
526
527 data->fd = fd;
Edward O'Callaghane14374b2020-09-24 15:50:21 +1000528 data->reset = reset;
Edward O'Callaghan97dd9262020-03-26 00:00:41 +1100529 ret |= register_shutdown(realtek_mst_i2c_spi_shutdown, data);
530
531 spi_master_i2c_realtek_mst.data = data;
532 ret |= register_spi_master(&spi_master_i2c_realtek_mst);
533
534 return ret;
535}