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gerrit.openfyde.cn / chromium.googlesource.com / chromiumos / third_party / flashrom / e16fdda97df435ac77e46e033ceb84a85bb55093 / . / sst28sf040.c
blob: 3da25f127f10df3de1e352810e93c68b827d1650 [file] [log] [blame]
rminnich8d3ff912003-10-25 17:01:29 +0000[diff] [blame]1/*
uweb25f1ea2007-08-29 17:52:32 +0000[diff] [blame]2 * This file is part of the flashrom project.
rminnich8d3ff912003-10-25 17:01:29 +0000[diff] [blame]3 *
uwe555dd972007-09-09 20:21:05 +0000[diff] [blame]4 * Copyright (C) 2000 Silicon Integrated System Corporation
5 * Copyright (C) 2005 coresystems GmbH <stepan@openbios.org>
snelson264e57c2010-01-20 20:55:53 +0000[diff] [blame]6 * Copyright (C) 2009 Sean Nelson <audiohacked@gmail.com>
rminnich8d3ff912003-10-25 17:01:29 +0000[diff] [blame]7 *
uweb25f1ea2007-08-29 17:52:32 +0000[diff] [blame]8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License as published by
10 * the Free Software Foundation; either version 2 of the License, or
11 * (at your option) any later version.
rminnich8d3ff912003-10-25 17:01:29 +0000[diff] [blame]12 *
uweb25f1ea2007-08-29 17:52:32 +0000[diff] [blame]13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
rminnich8d3ff912003-10-25 17:01:29 +0000[diff] [blame]17 */
18
rminnich8d3ff912003-10-25 17:01:29 +0000[diff] [blame]19#include "flash.h"
snelson8913d082010-02-26 05:48:29 +0000[diff] [blame]20#include "chipdrivers.h"
rminnich8d3ff912003-10-25 17:01:29 +0000[diff] [blame]21
22#define AUTO_PG_ERASE1 0x20
23#define AUTO_PG_ERASE2 0xD0
ollie4f630d52004-03-18 19:40:07 +0000[diff] [blame]24#define AUTO_PGRM 0x10
rminnich8d3ff912003-10-25 17:01:29 +0000[diff] [blame]25#define CHIP_ERASE 0x30
26#define RESET 0xFF
27#define READ_ID 0x90
28
Souvik Ghoshd75cd672016-06-17 14:21:39 -0700[diff] [blame]29int protect_28sf040(struct flashctx *flash)
rminnich8d3ff912003-10-25 17:01:29 +0000[diff] [blame]30{
hailfingera10a6072010-10-10 14:02:27 +0000[diff] [blame]31 chipaddr bios = flash->virtual_memory;
32
Souvik Ghoshd75cd672016-06-17 14:21:39 -0700[diff] [blame]33 chip_readb(flash, bios + 0x1823);
34 chip_readb(flash, bios + 0x1820);
35 chip_readb(flash, bios + 0x1822);
36 chip_readb(flash, bios + 0x0418);
37 chip_readb(flash, bios + 0x041B);
38 chip_readb(flash, bios + 0x0419);
39 chip_readb(flash, bios + 0x040A);
hailfinger86bf3b52010-10-13 21:49:30 +0000[diff] [blame]40
41 return 0;
rminnich8d3ff912003-10-25 17:01:29 +0000[diff] [blame]42}
43
Souvik Ghoshd75cd672016-06-17 14:21:39 -0700[diff] [blame]44int unprotect_28sf040(struct flashctx *flash)
rminnich8d3ff912003-10-25 17:01:29 +0000[diff] [blame]45{
hailfingera10a6072010-10-10 14:02:27 +0000[diff] [blame]46 chipaddr bios = flash->virtual_memory;
47
Souvik Ghoshd75cd672016-06-17 14:21:39 -0700[diff] [blame]48 chip_readb(flash, bios + 0x1823);
49 chip_readb(flash, bios + 0x1820);
50 chip_readb(flash, bios + 0x1822);
51 chip_readb(flash, bios + 0x0418);
52 chip_readb(flash, bios + 0x041B);
53 chip_readb(flash, bios + 0x0419);
54 chip_readb(flash, bios + 0x041A);
hailfinger86bf3b52010-10-13 21:49:30 +0000[diff] [blame]55
56 return 0;
rminnich8d3ff912003-10-25 17:01:29 +0000[diff] [blame]57}
58
Patrick Georgiab8353e2017-02-03 18:32:01 +0100[diff] [blame]59int erase_sector_28sf040(struct flashctx *flash, unsigned int address,
60 unsigned int sector_size)
rminnich8d3ff912003-10-25 17:01:29 +0000[diff] [blame]61{
hailfinger7af83692009-06-15 17:23:36 +0000[diff] [blame]62 chipaddr bios = flash->virtual_memory;
63
hailfinger86bf3b52010-10-13 21:49:30 +0000[diff] [blame]64 /* This command sequence is very similar to erase_block_82802ab. */
Souvik Ghoshd75cd672016-06-17 14:21:39 -0700[diff] [blame]65 chip_writeb(flash, AUTO_PG_ERASE1, bios);
66 chip_writeb(flash, AUTO_PG_ERASE2, bios + address);
rminnich8d3ff912003-10-25 17:01:29 +0000[diff] [blame]67
hailfingera10a6072010-10-10 14:02:27 +0000[diff] [blame]68 /* wait for Toggle bit ready */
Souvik Ghoshd75cd672016-06-17 14:21:39 -0700[diff] [blame]69 toggle_ready_jedec(flash, bios);
rminnich8d3ff912003-10-25 17:01:29 +0000[diff] [blame]70
hailfingerac8e3182011-06-26 17:04:16 +0000[diff] [blame]71 /* FIXME: Check the status register for errors. */
uwebe4477b2007-08-23 16:08:21 +0000[diff] [blame]72 return 0;
rminnich8d3ff912003-10-25 17:01:29 +0000[diff] [blame]73}
74
hailfinger71e1bd42010-10-13 22:26:56 +0000[diff] [blame]75/* chunksize is 1 */
Patrick Georgiab8353e2017-02-03 18:32:01 +0100[diff] [blame]76int write_28sf040(struct flashctx *flash, const uint8_t *src, unsigned int start, unsigned int len)
rminnich8d3ff912003-10-25 17:01:29 +0000[diff] [blame]77{
Edward O'Callaghan6b754432019-08-02 17:14:16 +1000[diff] [blame]78 unsigned int i;
hailfingera10a6072010-10-10 14:02:27 +0000[diff] [blame]79 chipaddr bios = flash->virtual_memory;
80 chipaddr dst = flash->virtual_memory + start;
rminnich8d3ff912003-10-25 17:01:29 +0000[diff] [blame]81
hailfingera10a6072010-10-10 14:02:27 +0000[diff] [blame]82 for (i = 0; i < len; i++) {
rminnich8d3ff912003-10-25 17:01:29 +0000[diff] [blame]83 /* transfer data from source to destination */
84 if (*src == 0xFF) {
85 dst++, src++;
86 /* If the data is 0xFF, don't program it */
87 continue;
88 }
89 /*issue AUTO PROGRAM command */
Souvik Ghoshd75cd672016-06-17 14:21:39 -0700[diff] [blame]90 chip_writeb(flash, AUTO_PGRM, dst);
91 chip_writeb(flash, *src++, dst++);
rminnich8d3ff912003-10-25 17:01:29 +0000[diff] [blame]92
93 /* wait for Toggle bit ready */
Souvik Ghoshd75cd672016-06-17 14:21:39 -0700[diff] [blame]94 toggle_ready_jedec(flash, bios);
rminnich8d3ff912003-10-25 17:01:29 +0000[diff] [blame]95 }
96
uwebe4477b2007-08-23 16:08:21 +0000[diff] [blame]97 return 0;
rminnich8d3ff912003-10-25 17:01:29 +0000[diff] [blame]98}
99
Souvik Ghoshd75cd672016-06-17 14:21:39 -0700[diff] [blame]100static int erase_28sf040(struct flashctx *flash)
rminnich8d3ff912003-10-25 17:01:29 +0000[diff] [blame]101{
hailfinger82719632009-05-16 21:22:56 +0000[diff] [blame]102 chipaddr bios = flash->virtual_memory;
rminnich8d3ff912003-10-25 17:01:29 +0000[diff] [blame]103
Souvik Ghoshd75cd672016-06-17 14:21:39 -0700[diff] [blame]104 chip_writeb(flash, CHIP_ERASE, bios);
105 chip_writeb(flash, CHIP_ERASE, bios);
rminnich8d3ff912003-10-25 17:01:29 +0000[diff] [blame]106
hailfingere5829f62009-06-05 17:48:08 +0000[diff] [blame]107 programmer_delay(10);
Souvik Ghoshd75cd672016-06-17 14:21:39 -0700[diff] [blame]108 toggle_ready_jedec(flash, bios);
rminnich8d3ff912003-10-25 17:01:29 +0000[diff] [blame]109
hailfingerac8e3182011-06-26 17:04:16 +0000[diff] [blame]110 /* FIXME: Check the status register for errors. */
uwebe4477b2007-08-23 16:08:21 +0000[diff] [blame]111 return 0;
rminnich8d3ff912003-10-25 17:01:29 +0000[diff] [blame]112}
113
Patrick Georgiab8353e2017-02-03 18:32:01 +0100[diff] [blame]114int erase_chip_28sf040(struct flashctx *flash, unsigned int addr,
115 unsigned int blocklen)
snelson264e57c2010-01-20 20:55:53 +0000[diff] [blame]116{
Patrick Georgif3fa2992017-02-02 16:24:44 +0100[diff] [blame]117 if ((addr != 0) || (blocklen != flash->chip->total_size * 1024)) {
snelsonfc007bb2010-03-24 23:14:32 +0000[diff] [blame]118 msg_cerr("%s called with incorrect arguments\n",
snelson264e57c2010-01-20 20:55:53 +0000[diff] [blame]119 __func__);
120 return -1;
121 }
122 return erase_28sf040(flash);
123}