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hailfingeracce2df2009-09-28 13:15:16 +00001/*
2 * This file is part of the flashrom project.
3 *
hailfinger39d159a2010-05-21 23:09:42 +00004 * Copyright (C) 2009, 2010 Carl-Daniel Hailfinger
hailfingeracce2df2009-09-28 13:15:16 +00005 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; version 2 of the License.
9 *
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
14 *
hailfingeracce2df2009-09-28 13:15:16 +000015 */
16
17#include <stdio.h>
hailfingeracce2df2009-09-28 13:15:16 +000018#include <string.h>
19#include <stdlib.h>
20#include <ctype.h>
21#include "flash.h"
hailfinger428f6852010-07-27 22:41:39 +000022#include "programmer.h"
hailfingeracce2df2009-09-28 13:15:16 +000023#include "spi.h"
24
hailfinger49ff41f2010-07-17 12:54:09 +000025/* Note that CS# is active low, so val=0 means the chip is active. */
Edward O'Callaghanbcae3752018-12-19 13:11:57 +110026static void bitbang_spi_set_cs(const struct bitbang_spi_master *master, int val)
hailfingeracce2df2009-09-28 13:15:16 +000027{
Edward O'Callaghanbcae3752018-12-19 13:11:57 +110028 master->set_cs(val);
hailfingeracce2df2009-09-28 13:15:16 +000029}
30
Edward O'Callaghanbcae3752018-12-19 13:11:57 +110031static void bitbang_spi_set_sck(const struct bitbang_spi_master *master, int val)
hailfingeracce2df2009-09-28 13:15:16 +000032{
Edward O'Callaghanbcae3752018-12-19 13:11:57 +110033 master->set_sck(val);
hailfingeracce2df2009-09-28 13:15:16 +000034}
35
Edward O'Callaghanbcae3752018-12-19 13:11:57 +110036static void bitbang_spi_set_mosi(const struct bitbang_spi_master *master, int val)
hailfingeracce2df2009-09-28 13:15:16 +000037{
Edward O'Callaghanbcae3752018-12-19 13:11:57 +110038 master->set_mosi(val);
hailfingeracce2df2009-09-28 13:15:16 +000039}
40
Edward O'Callaghanbcae3752018-12-19 13:11:57 +110041static int bitbang_spi_get_miso(const struct bitbang_spi_master *master)
hailfingeracce2df2009-09-28 13:15:16 +000042{
Edward O'Callaghanbcae3752018-12-19 13:11:57 +110043 return master->get_miso();
hailfingeracce2df2009-09-28 13:15:16 +000044}
45
Edward O'Callaghanbcae3752018-12-19 13:11:57 +110046static void bitbang_spi_request_bus(const struct bitbang_spi_master *master)
hailfinger12cba9a2010-09-15 00:17:37 +000047{
Edward O'Callaghanbcae3752018-12-19 13:11:57 +110048 if (master->request_bus)
49 master->request_bus();
hailfinger12cba9a2010-09-15 00:17:37 +000050}
51
Edward O'Callaghanbcae3752018-12-19 13:11:57 +110052static void bitbang_spi_release_bus(const struct bitbang_spi_master *master)
hailfinger12cba9a2010-09-15 00:17:37 +000053{
Edward O'Callaghanbcae3752018-12-19 13:11:57 +110054 if (master->release_bus)
55 master->release_bus();
hailfinger12cba9a2010-09-15 00:17:37 +000056}
57
Souvik Ghoshd75cd672016-06-17 14:21:39 -070058static int bitbang_spi_send_command(const struct flashctx *flash,
59 unsigned int writecnt, unsigned int readcnt,
60 const unsigned char *writearr,
61 unsigned char *readarr);
mkarcherd264e9e2011-05-11 17:07:07 +000062
Patrick Georgif4f1e2f2017-03-10 17:38:40 +010063static const struct spi_master spi_master_bitbang = {
uwe8d342eb2011-07-28 08:13:25 +000064 .type = SPI_CONTROLLER_BITBANG,
65 .max_data_read = MAX_DATA_READ_UNLIMITED,
66 .max_data_write = MAX_DATA_WRITE_UNLIMITED,
67 .command = bitbang_spi_send_command,
68 .multicommand = default_spi_send_multicommand,
69 .read = default_spi_read,
70 .write_256 = default_spi_write_256,
mkarcherd264e9e2011-05-11 17:07:07 +000071};
72
Edward O'Callaghanbcae3752018-12-19 13:11:57 +110073
74#if 0 // until it is needed
75int bitbang_spi_shutdown(const struct bitbang_spi_master *master)
hailfingeracce2df2009-09-28 13:15:16 +000076{
Edward O'Callaghanbcae3752018-12-19 13:11:57 +110077 /* FIXME: Run bitbang_spi_release_bus here or per command? */
78 return 0;
79}
80#endif
81
82int bitbang_spi_init(const struct bitbang_spi_master *master)
83{
84 struct spi_master mst = spi_master_bitbang;
85
hailfingerfddbeb62010-07-18 14:42:28 +000086 /* BITBANG_SPI_INVALID is 0, so if someone forgot to initialize ->type,
87 * we catch it here. Same goes for missing initialization of bitbanging
88 * functions.
89 */
90 if (!master || master->type == BITBANG_SPI_INVALID || !master->set_cs ||
David Hendricksac1d25c2016-08-09 17:00:58 -070091 !master->set_sck || !master->set_mosi || !master->get_miso) {
hailfinger12cba9a2010-09-15 00:17:37 +000092 msg_perr("Incomplete SPI bitbang master setting!\n"
93 "Please report a bug at flashrom@flashrom.org\n");
Edward O'Callaghanbcae3752018-12-19 13:11:57 +110094 return ERROR_FLASHROM_BUG;
hailfinger12cba9a2010-09-15 00:17:37 +000095 }
96
Edward O'Callaghanbcae3752018-12-19 13:11:57 +110097 mst.data = master;
98 register_spi_master(&mst);
hailfinger49ff41f2010-07-17 12:54:09 +000099
Edward O'Callaghanbcae3752018-12-19 13:11:57 +1100100 /* Only mess with the bus if we're sure nobody else uses it. */
101 bitbang_spi_request_bus(master);
102 bitbang_spi_set_cs(master, 1);
103 bitbang_spi_set_sck(master, 0);
104 bitbang_spi_set_mosi(master, 0);
David Hendricksac1d25c2016-08-09 17:00:58 -0700105
Edward O'Callaghanbcae3752018-12-19 13:11:57 +1100106 /* FIXME: Release SPI bus here and request it again for each command or
107 * don't release it now and only release it on programmer shutdown?
108 */
109 bitbang_spi_release_bus(master);
110
hailfingeracce2df2009-09-28 13:15:16 +0000111 return 0;
112}
113
Edward O'Callaghanbcae3752018-12-19 13:11:57 +1100114static uint8_t bitbang_spi_readwrite_byte(const struct bitbang_spi_master *master,
115 uint8_t val)
hailfingeracce2df2009-09-28 13:15:16 +0000116{
117 uint8_t ret = 0;
118 int i;
119
120 for (i = 7; i >= 0; i--) {
Edward O'Callaghanbcae3752018-12-19 13:11:57 +1100121 bitbang_spi_set_mosi(master, (val >> i) & 1);
122 programmer_delay(master->half_period);
123 bitbang_spi_set_sck(master, 1);
hailfingeracce2df2009-09-28 13:15:16 +0000124 ret <<= 1;
Edward O'Callaghanbcae3752018-12-19 13:11:57 +1100125 ret |= bitbang_spi_get_miso(master);
126 programmer_delay(master->half_period);
127 bitbang_spi_set_sck(master, 0);
hailfingeracce2df2009-09-28 13:15:16 +0000128 }
129 return ret;
130}
131
Souvik Ghoshd75cd672016-06-17 14:21:39 -0700132static int bitbang_spi_send_command(const struct flashctx *flash,
133 unsigned int writecnt, unsigned int readcnt,
134 const unsigned char *writearr,
135 unsigned char *readarr)
hailfingeracce2df2009-09-28 13:15:16 +0000136{
hailfingeracce2df2009-09-28 13:15:16 +0000137 int i;
Edward O'Callaghanbcae3752018-12-19 13:11:57 +1100138 const struct bitbang_spi_master *master = flash->mst->spi.data;
hailfingeracce2df2009-09-28 13:15:16 +0000139
hailfinger12cba9a2010-09-15 00:17:37 +0000140 /* FIXME: Run bitbang_spi_request_bus here or in programmer init?
141 * Requesting and releasing the SPI bus is handled in here to allow the
142 * programmer to use its own SPI engine for native accesses.
143 */
Edward O'Callaghanbcae3752018-12-19 13:11:57 +1100144 bitbang_spi_request_bus(master);
145 bitbang_spi_set_cs(master, 0);
mkarcher6b511512010-07-17 10:42:34 +0000146 for (i = 0; i < writecnt; i++)
Edward O'Callaghanbcae3752018-12-19 13:11:57 +1100147 bitbang_spi_readwrite_byte(master, writearr[i]);
mkarcher6b511512010-07-17 10:42:34 +0000148 for (i = 0; i < readcnt; i++)
Edward O'Callaghanbcae3752018-12-19 13:11:57 +1100149 readarr[i] = bitbang_spi_readwrite_byte(master, 0);
mkarcher6b511512010-07-17 10:42:34 +0000150
Edward O'Callaghanbcae3752018-12-19 13:11:57 +1100151 programmer_delay(master->half_period);
152 bitbang_spi_set_cs(master, 1);
153 programmer_delay(master->half_period);
hailfinger12cba9a2010-09-15 00:17:37 +0000154 /* FIXME: Run bitbang_spi_release_bus here or in programmer init? */
Edward O'Callaghanbcae3752018-12-19 13:11:57 +1100155 bitbang_spi_release_bus(master);
hailfingeracce2df2009-09-28 13:15:16 +0000156
157 return 0;
158}