blob: af69d3b385ef292b1ef04daec979a2c766f84cc0 [file] [log] [blame]
David Hendricksf7924d12010-06-10 21:26:44 -07001#include <stdlib.h>
2#include <string.h>
3
4#include "flash.h"
5#include "flashchips.h"
6#include "chipdrivers.h"
7
8/*
9 * The following procedures rely on look-up tables to match the user-specified
10 * range with the chip's supported ranges. This turned out to be the most
11 * elegant approach since diferent flash chips use different levels of
12 * granularity and methods to determine protected ranges. In other words,
13 * be stupid and simple since clever arithmetic will not for many chips.
14 */
15
16struct wp_range {
17 unsigned int start; /* starting address */
18 unsigned int len; /* len */
19};
20
21enum bit_state {
22 OFF = 0,
23 ON = 1,
24 X = 0 /* don't care */
25};
26
27struct w25q_range {
28 enum bit_state sec; /* if 1, bp[2:0] describe sectors */
29 enum bit_state tb; /* top/bottom select */
30 unsigned short int bp : 3; /* block protect bitfield */
31 struct wp_range range;
32};
33
David Hendricks57566ed2010-08-16 18:24:45 -070034struct w25q_range en25f40_ranges[] = {
35 { X, X, 0, {0, 0} }, /* none */
36 { 0, 0, 0x1, {0x000000, 504 * 1024} },
37 { 0, 0, 0x2, {0x000000, 496 * 1024} },
38 { 0, 0, 0x3, {0x000000, 480 * 1024} },
39 { 0, 0, 0x4, {0x000000, 448 * 1024} },
40 { 0, 0, 0x5, {0x000000, 384 * 1024} },
41 { 0, 0, 0x6, {0x000000, 256 * 1024} },
42 { 0, 0, 0x7, {0x000000, 512 * 1024} },
43};
44
David Hendricksac72e362010-08-16 18:20:03 -070045static struct w25q_range mx25l3205d_ranges[] = {
46 { X, 0, 0, {0, 0} }, /* none */
47 { X, 0, 0x1, {0x3f0000, 64 * 1024} },
48 { X, 0, 0x2, {0x3e0000, 128 * 1024} },
49 { X, 0, 0x3, {0x3c0000, 256 * 1024} },
50 { X, 0, 0x4, {0x380000, 512 * 1024} },
51 { X, 0, 0x5, {0x300000, 1024 * 1024} },
52 { X, 0, 0x6, {0x200000, 2048 * 1024} },
53 { X, 0, 0x7, {0x000000, 4096 * 1024} },
54
55 { X, 1, 0x0, {0x000000, 4096 * 1024} },
56 { X, 1, 0x1, {0x000000, 2048 * 1024} },
57 { X, 1, 0x2, {0x000000, 3072 * 1024} },
58 { X, 1, 0x3, {0x000000, 3584 * 1024} },
59 { X, 1, 0x4, {0x000000, 3840 * 1024} },
60 { X, 1, 0x5, {0x000000, 3968 * 1024} },
61 { X, 1, 0x6, {0x000000, 4032 * 1024} },
62 { X, 1, 0x7, {0x000000, 4096 * 1024} },
63};
64
David Hendricksf7924d12010-06-10 21:26:44 -070065static struct w25q_range w25q16_ranges[] = {
66 { X, X, 0, {0, 0} }, /* none */
67 { 0, 0, 0x1, {0x1f0000, 64 * 1024} },
68 { 0, 0, 0x2, {0x1e0000, 128 * 1024} },
69 { 0, 0, 0x3, {0x1c0000, 256 * 1024} },
70 { 0, 0, 0x4, {0x180000, 512 * 1024} },
71 { 0, 0, 0x5, {0x100000, 1024 * 1024} },
72
73 { 0, 1, 0x1, {0x000000, 64 * 1024} },
74 { 0, 1, 0x2, {0x000000, 128 * 1024} },
75 { 0, 1, 0x3, {0x000000, 256 * 1024} },
76 { 0, 1, 0x4, {0x000000, 512 * 1024} },
77 { 0, 1, 0x5, {0x000000, 1024 * 1024} },
78 { X, X, 0x6, {0x000000, 2048 * 1024} },
79 { X, X, 0x7, {0x000000, 2048 * 1024} },
80
81 { 1, 0, 0x1, {0x1ff000, 4 * 1024} },
82 { 1, 0, 0x2, {0x1fe000, 8 * 1024} },
83 { 1, 0, 0x3, {0x1fc000, 16 * 1024} },
84 { 1, 0, 0x4, {0x1f8000, 32 * 1024} },
85 { 1, 0, 0x5, {0x1f8000, 32 * 1024} },
86
87 { 1, 1, 0x1, {0x000000, 4 * 1024} },
88 { 1, 1, 0x2, {0x000000, 8 * 1024} },
89 { 1, 1, 0x3, {0x000000, 16 * 1024} },
90 { 1, 1, 0x4, {0x000000, 32 * 1024} },
91 { 1, 1, 0x5, {0x000000, 32 * 1024} },
92};
93
94static struct w25q_range w25q32_ranges[] = {
95 { X, X, 0, {0, 0} }, /* none */
96 { 0, 0, 0x1, {0x3f0000, 64 * 1024} },
97 { 0, 0, 0x2, {0x3e0000, 128 * 1024} },
98 { 0, 0, 0x3, {0x3c0000, 256 * 1024} },
99 { 0, 0, 0x4, {0x380000, 512 * 1024} },
100 { 0, 0, 0x5, {0x300000, 1024 * 1024} },
David Hendricks05653ff2010-06-15 16:05:12 -0700101 { 0, 0, 0x6, {0x200000, 2048 * 1024} },
David Hendricksf7924d12010-06-10 21:26:44 -0700102
103 { 0, 1, 0x1, {0x000000, 64 * 1024} },
104 { 0, 1, 0x2, {0x000000, 128 * 1024} },
105 { 0, 1, 0x3, {0x000000, 256 * 1024} },
106 { 0, 1, 0x4, {0x000000, 512 * 1024} },
107 { 0, 1, 0x5, {0x000000, 1024 * 1024} },
108 { 0, 1, 0x6, {0x000000, 2048 * 1024} },
109 { X, X, 0x7, {0x000000, 4096 * 1024} },
110
111 { 1, 0, 0x1, {0x3ff000, 4 * 1024} },
112 { 1, 0, 0x2, {0x3fe000, 8 * 1024} },
113 { 1, 0, 0x3, {0x3fc000, 16 * 1024} },
114 { 1, 0, 0x4, {0x3f8000, 32 * 1024} },
115 { 1, 0, 0x5, {0x3f8000, 32 * 1024} },
116
117 { 1, 1, 0x1, {0x000000, 4 * 1024} },
118 { 1, 1, 0x2, {0x000000, 8 * 1024} },
119 { 1, 1, 0x3, {0x000000, 16 * 1024} },
120 { 1, 1, 0x4, {0x000000, 32 * 1024} },
121 { 1, 1, 0x5, {0x000000, 32 * 1024} },
122};
123
124static struct w25q_range w25q80_ranges[] = {
125 { X, X, 0, {0, 0} }, /* none */
126 { 0, 0, 0x1, {0x0f0000, 64 * 1024} },
127 { 0, 0, 0x2, {0x0e0000, 128 * 1024} },
128 { 0, 0, 0x3, {0x0c0000, 256 * 1024} },
129 { 0, 0, 0x4, {0x080000, 512 * 1024} },
130
131 { 0, 1, 0x1, {0x000000, 64 * 1024} },
132 { 0, 1, 0x2, {0x000000, 128 * 1024} },
133 { 0, 1, 0x3, {0x000000, 256 * 1024} },
134 { 0, 1, 0x4, {0x000000, 512 * 1024} },
David Hendricks05653ff2010-06-15 16:05:12 -0700135 { X, X, 0x6, {0x000000, 1024 * 1024} },
136 { X, X, 0x7, {0x000000, 1024 * 1024} },
David Hendricksf7924d12010-06-10 21:26:44 -0700137
138 { 1, 0, 0x1, {0x1ff000, 4 * 1024} },
139 { 1, 0, 0x2, {0x1fe000, 8 * 1024} },
140 { 1, 0, 0x3, {0x1fc000, 16 * 1024} },
141 { 1, 0, 0x4, {0x1f8000, 32 * 1024} },
142 { 1, 0, 0x5, {0x1f8000, 32 * 1024} },
143
144 { 1, 1, 0x1, {0x000000, 4 * 1024} },
145 { 1, 1, 0x2, {0x000000, 8 * 1024} },
146 { 1, 1, 0x3, {0x000000, 16 * 1024} },
147 { 1, 1, 0x4, {0x000000, 32 * 1024} },
148 { 1, 1, 0x5, {0x000000, 32 * 1024} },
149};
150
David Hendricks2c4a76c2010-06-28 14:00:43 -0700151static struct w25q_range w25q64_ranges[] = {
152 { X, X, 0, {0, 0} }, /* none */
153
154 { 0, 0, 0x1, {0x7e0000, 128 * 1024} },
155 { 0, 0, 0x2, {0x7c0000, 256 * 1024} },
156 { 0, 0, 0x3, {0x780000, 512 * 1024} },
157 { 0, 0, 0x4, {0x700000, 1024 * 1024} },
158 { 0, 0, 0x5, {0x600000, 2048 * 1024} },
159 { 0, 0, 0x6, {0x400000, 4096 * 1024} },
160
161 { 0, 1, 0x1, {0x000000, 128 * 1024} },
162 { 0, 1, 0x2, {0x000000, 256 * 1024} },
163 { 0, 1, 0x3, {0x000000, 512 * 1024} },
164 { 0, 1, 0x4, {0x000000, 1024 * 1024} },
165 { 0, 1, 0x5, {0x000000, 2048 * 1024} },
166 { 0, 1, 0x6, {0x000000, 4096 * 1024} },
167 { X, X, 0x7, {0x000000, 8192 * 1024} },
168
169 { 1, 0, 0x1, {0x7ff000, 4 * 1024} },
170 { 1, 0, 0x2, {0x7fe000, 8 * 1024} },
171 { 1, 0, 0x3, {0x7fc000, 16 * 1024} },
172 { 1, 0, 0x4, {0x7f8000, 32 * 1024} },
173 { 1, 0, 0x5, {0x7f8000, 32 * 1024} },
174
175 { 1, 1, 0x1, {0x000000, 4 * 1024} },
176 { 1, 1, 0x2, {0x000000, 8 * 1024} },
177 { 1, 1, 0x3, {0x000000, 16 * 1024} },
178 { 1, 1, 0x4, {0x000000, 32 * 1024} },
179 { 1, 1, 0x5, {0x000000, 32 * 1024} },
180};
181
David Hendricks470ca952010-08-13 14:01:53 -0700182struct w25q_range w25x40_ranges[] = {
183 { X, X, 0, {0, 0} }, /* none */
184 { 0, 0, 0x1, {0x070000, 64 * 1024} },
185 { 0, 0, 0x2, {0x060000, 128 * 1024} },
186 { 0, 0, 0x3, {0x040000, 256 * 1024} },
187 { 0, 1, 0x1, {0x000000, 64 * 1024} },
188 { 0, 1, 0x2, {0x000000, 128 * 1024} },
189 { 0, 1, 0x3, {0x000000, 256 * 1024} },
190 { 0, X, 0x4, {0x000000, 512 * 1024} },
191};
192
David Hendricksf7924d12010-06-10 21:26:44 -0700193struct w25q_status {
194 /* this maps to register layout -- do not change ordering */
195 unsigned char busy : 1;
196 unsigned char wel : 1;
197 unsigned char bp0 : 1;
198 unsigned char bp1 : 1;
199 unsigned char bp2 : 1;
200 unsigned char tb : 1;
201 unsigned char sec : 1;
202 unsigned char srp0 : 1;
203 /* FIXME: what about the second status register? */
204// unsigned char srp1 : 1;
205// unsigned char qe : 1;
206} __attribute__ ((packed));
207
David Hendricksd494b0a2010-08-16 16:28:50 -0700208int wp_get_status(const struct flashchip *flash,
209 unsigned int start, unsigned int len,
210 struct w25q_status *status)
David Hendricksf7924d12010-06-10 21:26:44 -0700211{
David Hendricksf7924d12010-06-10 21:26:44 -0700212 struct w25q_range *w25q_ranges;
213 int i, num_entries = 0;
214 int tmp = 0, range_found = 0;
215
David Hendricksd494b0a2010-08-16 16:28:50 -0700216 switch (flash->manufacture_id) {
217 case WINBOND_NEX_ID:
218 switch(flash->model_id) {
219 case W_25X40:
220 w25q_ranges = w25x40_ranges;
221 num_entries = ARRAY_SIZE(w25x40_ranges);
222 break;
223 case W_25Q80:
224 w25q_ranges = w25q80_ranges;
225 num_entries = ARRAY_SIZE(w25q80_ranges);
226 break;
227 case W_25Q16:
228 w25q_ranges = w25q16_ranges;
229 num_entries = ARRAY_SIZE(w25q16_ranges);
230 break;
231 case W_25Q32:
232 w25q_ranges = w25q32_ranges;
233 num_entries = ARRAY_SIZE(w25q32_ranges);
234 break;
235 case W_25Q64:
236 w25q_ranges = w25q64_ranges;
237 num_entries = ARRAY_SIZE(w25q64_ranges);
238 break;
239 default:
240 msg_cerr("%s() %d: WINBOND flash chip mismatch (0x%04x)"
241 ", aborting\n", __func__, __LINE__,
242 flash->model_id);
243 return -1;
244 }
David Hendricks2c4a76c2010-06-28 14:00:43 -0700245 break;
David Hendricks57566ed2010-08-16 18:24:45 -0700246 case EON_ID_NOPREFIX:
247 switch (flash->model_id) {
248 case EN_25F40:
249 w25q_ranges = en25f40_ranges;
250 num_entries = ARRAY_SIZE(en25f40_ranges);
251 break;
252 default:
253 msg_cerr("%s():%d: EON flash chip mismatch (0x%04x)"
254 ", aborting\n", __func__, __LINE__,
255 flash->model_id);
256 return -1;
257 }
258 break;
David Hendricksac72e362010-08-16 18:20:03 -0700259 case MX_ID:
260 switch (flash->model_id) {
261 case MX_25L3205:
262 w25q_ranges = mx25l3205d_ranges;
263 num_entries = ARRAY_SIZE(mx25l3205d_ranges);
264 break;
265 default:
266 msg_cerr("%s():%d: MXIC flash chip mismatch (0x%04x)"
267 ", aborting\n", __func__, __LINE__,
268 flash->model_id);
269 return -1;
270 }
271 break;
David Hendricksf7924d12010-06-10 21:26:44 -0700272 default:
David Hendricksd494b0a2010-08-16 16:28:50 -0700273 msg_cerr("%s: flash vendor (0x%x) not found, aborting\n",
274 __func__, flash->manufacture_id);
David Hendricksf7924d12010-06-10 21:26:44 -0700275 return -1;
276 }
277
278 memset(&status, 0, sizeof(status));
279 tmp = spi_read_status_register();
280 memcpy(&status, &tmp, 1);
281 msg_cdbg("%s: old status: 0x%02x\n", __func__, tmp);
282
283 for (i = 0; i < num_entries; i++) {
284 struct wp_range *r = &w25q_ranges[i].range;
285
286 msg_cspew("comparing range 0x%x 0x%x / 0x%x 0x%x\n",
287 start, len, r->start, r->len);
288 if ((start == r->start) && (len == r->len)) {
David Hendricksd494b0a2010-08-16 16:28:50 -0700289 status->bp0 = w25q_ranges[i].bp & 1;
290 status->bp1 = w25q_ranges[i].bp >> 1;
291 status->bp2 = w25q_ranges[i].bp >> 2;
292 status->tb = w25q_ranges[i].tb;
293 status->sec = w25q_ranges[i].sec;
David Hendricksf7924d12010-06-10 21:26:44 -0700294
295 range_found = 1;
296 break;
297 }
298 }
299
300 if (!range_found) {
301 msg_cerr("matching range not found\n");
302 return -1;
303 }
David Hendricksd494b0a2010-08-16 16:28:50 -0700304 return 0;
305}
306
307static int w25_set_range(struct flashchip *flash,
308 unsigned int start, unsigned int len)
309{
310 struct w25q_status status;
311 int tmp;
312
313 memset(&status, 0, sizeof(status));
314 tmp = spi_read_status_register();
315 memcpy(&status, &tmp, 1);
316 msg_cdbg("%s: old status: 0x%02x\n", __func__, tmp);
317
318 if (wp_get_status(flash, start, len, &status)) return -1;
David Hendricksf7924d12010-06-10 21:26:44 -0700319
320 msg_cdbg("status.busy: %x\n", status.busy);
321 msg_cdbg("status.wel: %x\n", status.wel);
322 msg_cdbg("status.bp0: %x\n", status.bp0);
323 msg_cdbg("status.bp1: %x\n", status.bp1);
324 msg_cdbg("status.bp2: %x\n", status.bp2);
325 msg_cdbg("status.tb: %x\n", status.tb);
326 msg_cdbg("status.sec: %x\n", status.sec);
327 msg_cdbg("status.srp0: %x\n", status.srp0);
328
329 memcpy(&tmp, &status, sizeof(status));
David Hendricks82fd8ae2010-08-04 14:34:54 -0700330 spi_write_status_register(flash, tmp);
David Hendricksf7924d12010-06-10 21:26:44 -0700331 msg_cdbg("%s: new status: 0x%02x\n",
332 __func__, spi_read_status_register());
333
334 return 0;
335}
336
337static int w25_enable_writeprotect(struct flashchip *flash)
338{
339 struct w25q_status status;
340 int tmp = 0;
341
342 memset(&status, 0, sizeof(status));
343 tmp = spi_read_status_register();
344 memcpy(&status, &tmp, 1);
345 msg_cdbg("%s: old status: 0x%02x\n", __func__, tmp);
346
347 status.srp0 = 1;
348 memcpy(&tmp, &status, sizeof(status));
349 spi_write_status_enable();
David Hendricks82fd8ae2010-08-04 14:34:54 -0700350 spi_write_status_register(flash, tmp);
David Hendricksf7924d12010-06-10 21:26:44 -0700351 msg_cdbg("%s: new status: 0x%02x\n",
352 __func__, spi_read_status_register());
353
354 return 0;
355}
356
357struct wp wp_w25 = {
358 .set_range = w25_set_range,
359 .enable = w25_enable_writeprotect,
360};