stuge | e9159d2 | 2009-01-26 01:33:02 +0000 | [diff] [blame] | 1 | /* |
| 2 | * This file is part of the flashrom project. |
| 3 | * |
| 4 | * Copyright (C) 2009 Peter Stuge <peter@stuge.se> |
stepan | 6d42c0f | 2009-08-12 09:27:45 +0000 | [diff] [blame] | 5 | * Copyright (C) 2009 coresystems GmbH |
hailfinger | 336a92d | 2010-02-02 11:09:03 +0000 | [diff] [blame] | 6 | * Copyright (C) 2010 Carl-Daniel Hailfinger |
hailfinger | 667e908 | 2010-03-16 23:59:19 +0000 | [diff] [blame] | 7 | * Copyright (C) 2010 Rudolf Marek <r.marek@assembler.cz> |
stuge | e9159d2 | 2009-01-26 01:33:02 +0000 | [diff] [blame] | 8 | * |
| 9 | * This program is free software; you can redistribute it and/or modify |
| 10 | * it under the terms of the GNU General Public License as published by |
| 11 | * the Free Software Foundation; version 2 of the License. |
| 12 | * |
| 13 | * This program is distributed in the hope that it will be useful, |
| 14 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 15 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 16 | * GNU General Public License for more details. |
stuge | e9159d2 | 2009-01-26 01:33:02 +0000 | [diff] [blame] | 17 | */ |
uwe | 5e931bc | 2009-04-15 10:52:49 +0000 | [diff] [blame] | 18 | |
Patrick Georgi | 220f4b5 | 2017-03-21 16:55:04 +0100 | [diff] [blame] | 19 | #include <inttypes.h> |
hailfinger | a83a5fe | 2010-05-30 22:24:40 +0000 | [diff] [blame] | 20 | #include <unistd.h> |
Patrick Georgi | 220f4b5 | 2017-03-21 16:55:04 +0100 | [diff] [blame] | 21 | #include <stdbool.h> |
hailfinger | a83a5fe | 2010-05-30 22:24:40 +0000 | [diff] [blame] | 22 | #include <stdio.h> |
stuge | 7c943ee | 2009-01-26 01:10:48 +0000 | [diff] [blame] | 23 | #include <stdlib.h> |
stepan | 6d42c0f | 2009-08-12 09:27:45 +0000 | [diff] [blame] | 24 | #include <string.h> |
Edward O'Callaghan | 9b520dd | 2019-05-01 21:47:21 -0400 | [diff] [blame] | 25 | #include <errno.h> |
stuge | 7c943ee | 2009-01-26 01:10:48 +0000 | [diff] [blame] | 26 | #include "flash.h" |
Edward O'Callaghan | b287898 | 2019-05-30 03:44:32 -0400 | [diff] [blame] | 27 | #include "programmer.h" |
| 28 | #include "hwaccess.h" |
stuge | 7c943ee | 2009-01-26 01:10:48 +0000 | [diff] [blame] | 29 | |
hailfinger | 6c39110 | 2010-06-21 23:20:15 +0000 | [diff] [blame] | 30 | /* Do we need any file access or ioctl for physmap or MSR? */ |
oxygene | 5027589 | 2010-09-30 17:03:32 +0000 | [diff] [blame] | 31 | #if !defined(__DJGPP__) && !defined(__LIBPAYLOAD__) |
Edward O'Callaghan | ad51bfd | 2019-05-01 21:40:17 -0400 | [diff] [blame] | 32 | /* No file access needed/possible to get mmap access permissions or access MSR. */ |
hailfinger | 6c39110 | 2010-06-21 23:20:15 +0000 | [diff] [blame] | 33 | #include <sys/stat.h> |
| 34 | #include <fcntl.h> |
hailfinger | 6c39110 | 2010-06-21 23:20:15 +0000 | [diff] [blame] | 35 | #endif |
| 36 | |
hailfinger | 667e908 | 2010-03-16 23:59:19 +0000 | [diff] [blame] | 37 | #ifdef __DJGPP__ |
| 38 | #include <dpmi.h> |
Edward O'Callaghan | 82d2f0f | 2019-05-30 04:36:22 -0400 | [diff] [blame^] | 39 | #include <malloc.h> |
ruik | 1cd3b8d | 2010-04-25 22:47:50 +0000 | [diff] [blame] | 40 | #include <sys/nearptr.h> |
hailfinger | 667e908 | 2010-03-16 23:59:19 +0000 | [diff] [blame] | 41 | |
Edward O'Callaghan | ec5c77e | 2019-05-02 00:07:02 -0400 | [diff] [blame] | 42 | #define ONE_MEGABYTE (1024 * 1024) |
hailfinger | 667e908 | 2010-03-16 23:59:19 +0000 | [diff] [blame] | 43 | #define MEM_DEV "dpmi" |
| 44 | |
Edward O'Callaghan | 82d2f0f | 2019-05-30 04:36:22 -0400 | [diff] [blame^] | 45 | static void *realmem_map_aligned; |
ruik | 1cd3b8d | 2010-04-25 22:47:50 +0000 | [diff] [blame] | 46 | |
Patrick Georgi | 4befc16 | 2017-02-03 18:32:01 +0100 | [diff] [blame] | 47 | static void *map_first_meg(uintptr_t phys_addr, size_t len) |
ruik | 1cd3b8d | 2010-04-25 22:47:50 +0000 | [diff] [blame] | 48 | { |
Edward O'Callaghan | 82d2f0f | 2019-05-30 04:36:22 -0400 | [diff] [blame^] | 49 | void *realmem_map; |
| 50 | size_t pagesize; |
ruik | 1cd3b8d | 2010-04-25 22:47:50 +0000 | [diff] [blame] | 51 | |
Edward O'Callaghan | 82d2f0f | 2019-05-30 04:36:22 -0400 | [diff] [blame^] | 52 | if (realmem_map_aligned) |
| 53 | return realmem_map_aligned + phys_addr; |
| 54 | |
| 55 | /* valloc() from DJGPP 2.05 does not work properly */ |
| 56 | pagesize = getpagesize(); |
| 57 | |
| 58 | realmem_map = malloc(ONE_MEGABYTE + pagesize); |
ruik | 1cd3b8d | 2010-04-25 22:47:50 +0000 | [diff] [blame] | 59 | |
uwe | 8d342eb | 2011-07-28 08:13:25 +0000 | [diff] [blame] | 60 | if (!realmem_map) |
hailfinger | f294fa2 | 2010-09-25 22:53:44 +0000 | [diff] [blame] | 61 | return ERROR_PTR; |
ruik | 1cd3b8d | 2010-04-25 22:47:50 +0000 | [diff] [blame] | 62 | |
Edward O'Callaghan | 82d2f0f | 2019-05-30 04:36:22 -0400 | [diff] [blame^] | 63 | realmem_map_aligned = (void *)(((size_t) realmem_map + |
| 64 | (pagesize - 1)) & ~(pagesize - 1)); |
| 65 | |
| 66 | if (__djgpp_map_physical_memory(realmem_map_aligned, ONE_MEGABYTE, 0)) { |
hailfinger | 386a3a8 | 2010-10-05 23:21:51 +0000 | [diff] [blame] | 67 | free(realmem_map); |
Edward O'Callaghan | 82d2f0f | 2019-05-30 04:36:22 -0400 | [diff] [blame^] | 68 | realmem_map_aligned = NULL; |
hailfinger | f294fa2 | 2010-09-25 22:53:44 +0000 | [diff] [blame] | 69 | return ERROR_PTR; |
ruik | 1cd3b8d | 2010-04-25 22:47:50 +0000 | [diff] [blame] | 70 | } |
| 71 | |
Edward O'Callaghan | 82d2f0f | 2019-05-30 04:36:22 -0400 | [diff] [blame^] | 72 | return realmem_map_aligned + phys_addr; |
ruik | 1cd3b8d | 2010-04-25 22:47:50 +0000 | [diff] [blame] | 73 | } |
hailfinger | 667e908 | 2010-03-16 23:59:19 +0000 | [diff] [blame] | 74 | |
Patrick Georgi | 4befc16 | 2017-02-03 18:32:01 +0100 | [diff] [blame] | 75 | static void *sys_physmap(uintptr_t phys_addr, size_t len) |
hailfinger | 667e908 | 2010-03-16 23:59:19 +0000 | [diff] [blame] | 76 | { |
| 77 | int ret; |
| 78 | __dpmi_meminfo mi; |
| 79 | |
uwe | 8d342eb | 2011-07-28 08:13:25 +0000 | [diff] [blame] | 80 | /* Enable 4GB limit on DS descriptor. */ |
| 81 | if (!__djgpp_nearptr_enable()) |
hailfinger | f294fa2 | 2010-09-25 22:53:44 +0000 | [diff] [blame] | 82 | return ERROR_PTR; |
ruik | 1cd3b8d | 2010-04-25 22:47:50 +0000 | [diff] [blame] | 83 | |
Edward O'Callaghan | ec5c77e | 2019-05-02 00:07:02 -0400 | [diff] [blame] | 84 | if ((phys_addr + len - 1) < ONE_MEGABYTE) { |
uwe | 8d342eb | 2011-07-28 08:13:25 +0000 | [diff] [blame] | 85 | /* We need to use another method to map first 1MB. */ |
ruik | 1cd3b8d | 2010-04-25 22:47:50 +0000 | [diff] [blame] | 86 | return map_first_meg(phys_addr, len); |
hailfinger | 667e908 | 2010-03-16 23:59:19 +0000 | [diff] [blame] | 87 | } |
| 88 | |
| 89 | mi.address = phys_addr; |
| 90 | mi.size = len; |
hailfinger | b91c08c | 2011-08-15 19:54:20 +0000 | [diff] [blame] | 91 | ret = __dpmi_physical_address_mapping(&mi); |
hailfinger | 667e908 | 2010-03-16 23:59:19 +0000 | [diff] [blame] | 92 | |
uwe | 8d342eb | 2011-07-28 08:13:25 +0000 | [diff] [blame] | 93 | if (ret != 0) |
hailfinger | f294fa2 | 2010-09-25 22:53:44 +0000 | [diff] [blame] | 94 | return ERROR_PTR; |
hailfinger | 667e908 | 2010-03-16 23:59:19 +0000 | [diff] [blame] | 95 | |
ruik | 1cd3b8d | 2010-04-25 22:47:50 +0000 | [diff] [blame] | 96 | return (void *) mi.address + __djgpp_conventional_base; |
hailfinger | 667e908 | 2010-03-16 23:59:19 +0000 | [diff] [blame] | 97 | } |
| 98 | |
| 99 | #define sys_physmap_rw_uncached sys_physmap |
ruik | 1cd3b8d | 2010-04-25 22:47:50 +0000 | [diff] [blame] | 100 | #define sys_physmap_ro_cached sys_physmap |
hailfinger | 667e908 | 2010-03-16 23:59:19 +0000 | [diff] [blame] | 101 | |
Edward O'Callaghan | b287898 | 2019-05-30 03:44:32 -0400 | [diff] [blame] | 102 | void sys_physunmap_unaligned(void *virt_addr, size_t len) |
hailfinger | 667e908 | 2010-03-16 23:59:19 +0000 | [diff] [blame] | 103 | { |
| 104 | __dpmi_meminfo mi; |
| 105 | |
hailfinger | 386a3a8 | 2010-10-05 23:21:51 +0000 | [diff] [blame] | 106 | /* There is no known way to unmap the first 1 MB. The DPMI server will |
| 107 | * do this for us on exit. |
| 108 | */ |
Edward O'Callaghan | 82d2f0f | 2019-05-30 04:36:22 -0400 | [diff] [blame^] | 109 | if ((virt_addr >= realmem_map_aligned) && |
| 110 | ((virt_addr + len) <= (realmem_map_aligned + ONE_MEGABYTE))) { |
hailfinger | 667e908 | 2010-03-16 23:59:19 +0000 | [diff] [blame] | 111 | return; |
| 112 | } |
| 113 | |
| 114 | mi.address = (unsigned long) virt_addr; |
| 115 | __dpmi_free_physical_address_mapping(&mi); |
| 116 | } |
| 117 | |
oxygene | 5027589 | 2010-09-30 17:03:32 +0000 | [diff] [blame] | 118 | #elif defined(__LIBPAYLOAD__) |
| 119 | #include <arch/virtual.h> |
| 120 | |
| 121 | #define MEM_DEV "" |
| 122 | |
Patrick Georgi | 4befc16 | 2017-02-03 18:32:01 +0100 | [diff] [blame] | 123 | void *sys_physmap(uintptr_t phys_addr, size_t len) |
oxygene | 5027589 | 2010-09-30 17:03:32 +0000 | [diff] [blame] | 124 | { |
uwe | 8d342eb | 2011-07-28 08:13:25 +0000 | [diff] [blame] | 125 | return (void *)phys_to_virt(phys_addr); |
oxygene | 5027589 | 2010-09-30 17:03:32 +0000 | [diff] [blame] | 126 | } |
| 127 | |
| 128 | #define sys_physmap_rw_uncached sys_physmap |
| 129 | #define sys_physmap_ro_cached sys_physmap |
| 130 | |
oxygene | 5027589 | 2010-09-30 17:03:32 +0000 | [diff] [blame] | 131 | int setup_cpu_msr(int cpu) |
| 132 | { |
| 133 | return 0; |
| 134 | } |
| 135 | |
| 136 | void cleanup_cpu_msr(void) |
| 137 | { |
| 138 | } |
Edward O'Callaghan | b287898 | 2019-05-30 03:44:32 -0400 | [diff] [blame] | 139 | |
| 140 | void sys_physunmap_unaligned(void *virt_addr, size_t len) |
| 141 | { |
| 142 | } |
Patrick Georgi | 0c6d178 | 2017-02-03 16:49:50 +0100 | [diff] [blame] | 143 | #elif defined(__MACH__) && defined(__APPLE__) |
hailfinger | 667e908 | 2010-03-16 23:59:19 +0000 | [diff] [blame] | 144 | |
stepan | b37f55d | 2011-03-18 22:00:15 +0000 | [diff] [blame] | 145 | #define MEM_DEV "DirectHW" |
stuge | 9696083 | 2009-01-26 01:23:31 +0000 | [diff] [blame] | 146 | |
Patrick Georgi | 4befc16 | 2017-02-03 18:32:01 +0100 | [diff] [blame] | 147 | static void *sys_physmap(uintptr_t phys_addr, size_t len) |
stuge | 9696083 | 2009-01-26 01:23:31 +0000 | [diff] [blame] | 148 | { |
hailfinger | f294fa2 | 2010-09-25 22:53:44 +0000 | [diff] [blame] | 149 | /* The short form of ?: is a GNU extension. |
| 150 | * FIXME: map_physical returns NULL both for errors and for success |
| 151 | * if the region is mapped at virtual address zero. If in doubt, report |
| 152 | * an error until a better interface exists. |
| 153 | */ |
| 154 | return map_physical(phys_addr, len) ? : ERROR_PTR; |
stuge | 9696083 | 2009-01-26 01:23:31 +0000 | [diff] [blame] | 155 | } |
| 156 | |
hailfinger | 336a92d | 2010-02-02 11:09:03 +0000 | [diff] [blame] | 157 | /* The OS X driver does not differentiate between mapping types. */ |
| 158 | #define sys_physmap_rw_uncached sys_physmap |
| 159 | #define sys_physmap_ro_cached sys_physmap |
| 160 | |
Edward O'Callaghan | b287898 | 2019-05-30 03:44:32 -0400 | [diff] [blame] | 161 | void sys_physunmap_unaligned(void *virt_addr, size_t len) |
stuge | 9696083 | 2009-01-26 01:23:31 +0000 | [diff] [blame] | 162 | { |
| 163 | unmap_physical(virt_addr, len); |
| 164 | } |
| 165 | |
| 166 | #else |
| 167 | #include <sys/mman.h> |
| 168 | |
stuge | 7c943ee | 2009-01-26 01:10:48 +0000 | [diff] [blame] | 169 | #if defined (__sun) && (defined(__i386) || defined(__amd64)) |
| 170 | # define MEM_DEV "/dev/xsvc" |
| 171 | #else |
| 172 | # define MEM_DEV "/dev/mem" |
| 173 | #endif |
| 174 | |
| 175 | static int fd_mem = -1; |
hailfinger | 336a92d | 2010-02-02 11:09:03 +0000 | [diff] [blame] | 176 | static int fd_mem_cached = -1; |
stuge | 7c943ee | 2009-01-26 01:10:48 +0000 | [diff] [blame] | 177 | |
hailfinger | 336a92d | 2010-02-02 11:09:03 +0000 | [diff] [blame] | 178 | /* For MMIO access. Must be uncached, doesn't make sense to restrict to ro. */ |
Patrick Georgi | 4befc16 | 2017-02-03 18:32:01 +0100 | [diff] [blame] | 179 | static void *sys_physmap_rw_uncached(uintptr_t phys_addr, size_t len) |
stuge | 7c943ee | 2009-01-26 01:10:48 +0000 | [diff] [blame] | 180 | { |
| 181 | void *virt_addr; |
| 182 | |
| 183 | if (-1 == fd_mem) { |
| 184 | /* Open the memory device UNCACHED. Important for MMIO. */ |
uwe | 5e931bc | 2009-04-15 10:52:49 +0000 | [diff] [blame] | 185 | if (-1 == (fd_mem = open(MEM_DEV, O_RDWR | O_SYNC))) { |
Edward O'Callaghan | 9b520dd | 2019-05-01 21:47:21 -0400 | [diff] [blame] | 186 | msg_perr("Critical error: open(" MEM_DEV "): %s\n", strerror(errno)); |
| 187 | return ERROR_PTR; |
stuge | 7c943ee | 2009-01-26 01:10:48 +0000 | [diff] [blame] | 188 | } |
| 189 | } |
| 190 | |
stepan | d0d220f | 2011-01-24 19:15:51 +0000 | [diff] [blame] | 191 | virt_addr = mmap(NULL, len, PROT_WRITE | PROT_READ, MAP_SHARED, |
uwe | 5e931bc | 2009-04-15 10:52:49 +0000 | [diff] [blame] | 192 | fd_mem, (off_t)phys_addr); |
hailfinger | f294fa2 | 2010-09-25 22:53:44 +0000 | [diff] [blame] | 193 | return MAP_FAILED == virt_addr ? ERROR_PTR : virt_addr; |
stuge | 7c943ee | 2009-01-26 01:10:48 +0000 | [diff] [blame] | 194 | } |
| 195 | |
hailfinger | 336a92d | 2010-02-02 11:09:03 +0000 | [diff] [blame] | 196 | /* For reading DMI/coreboot/whatever tables. We should never write, and we |
| 197 | * do not care about caching. |
| 198 | */ |
Patrick Georgi | 4befc16 | 2017-02-03 18:32:01 +0100 | [diff] [blame] | 199 | static void *sys_physmap_ro_cached(uintptr_t phys_addr, size_t len) |
hailfinger | 336a92d | 2010-02-02 11:09:03 +0000 | [diff] [blame] | 200 | { |
| 201 | void *virt_addr; |
| 202 | |
| 203 | if (-1 == fd_mem_cached) { |
| 204 | /* Open the memory device CACHED. */ |
| 205 | if (-1 == (fd_mem_cached = open(MEM_DEV, O_RDWR))) { |
Edward O'Callaghan | 9b520dd | 2019-05-01 21:47:21 -0400 | [diff] [blame] | 206 | msg_perr("Critical error: open(" MEM_DEV "): %s\n", strerror(errno)); |
| 207 | return ERROR_PTR; |
hailfinger | 336a92d | 2010-02-02 11:09:03 +0000 | [diff] [blame] | 208 | } |
| 209 | } |
| 210 | |
stepan | d0d220f | 2011-01-24 19:15:51 +0000 | [diff] [blame] | 211 | virt_addr = mmap(NULL, len, PROT_READ, MAP_SHARED, |
hailfinger | 336a92d | 2010-02-02 11:09:03 +0000 | [diff] [blame] | 212 | fd_mem_cached, (off_t)phys_addr); |
hailfinger | f294fa2 | 2010-09-25 22:53:44 +0000 | [diff] [blame] | 213 | return MAP_FAILED == virt_addr ? ERROR_PTR : virt_addr; |
hailfinger | 336a92d | 2010-02-02 11:09:03 +0000 | [diff] [blame] | 214 | } |
| 215 | |
Edward O'Callaghan | b287898 | 2019-05-30 03:44:32 -0400 | [diff] [blame] | 216 | void sys_physunmap_unaligned(void *virt_addr, size_t len) |
stuge | 7c943ee | 2009-01-26 01:10:48 +0000 | [diff] [blame] | 217 | { |
hailfinger | 11ae3c4 | 2009-05-11 14:13:25 +0000 | [diff] [blame] | 218 | if (len == 0) { |
snelson | e42c380 | 2010-05-07 20:09:04 +0000 | [diff] [blame] | 219 | msg_pspew("Not unmapping zero size at %p\n", virt_addr); |
hailfinger | 11ae3c4 | 2009-05-11 14:13:25 +0000 | [diff] [blame] | 220 | return; |
| 221 | } |
stuge | 7c943ee | 2009-01-26 01:10:48 +0000 | [diff] [blame] | 222 | munmap(virt_addr, len); |
| 223 | } |
stuge | 9696083 | 2009-01-26 01:23:31 +0000 | [diff] [blame] | 224 | #endif |
stuge | 7c943ee | 2009-01-26 01:10:48 +0000 | [diff] [blame] | 225 | |
Edward O'Callaghan | b287898 | 2019-05-30 03:44:32 -0400 | [diff] [blame] | 226 | #define PHYSM_RW 0 |
| 227 | #define PHYSM_RO 1 |
| 228 | #define PHYSM_NOCLEANUP 0 |
| 229 | #define PHYSM_CLEANUP 1 |
| 230 | #define PHYSM_EXACT 0 |
| 231 | #define PHYSM_ROUND 1 |
| 232 | |
| 233 | /* Round start to nearest page boundary below and set len so that the resulting address range ends at the lowest |
| 234 | * possible page boundary where the original address range is still entirely contained. It returns the |
| 235 | * difference between the rounded start address and the original start address. */ |
| 236 | static uintptr_t round_to_page_boundaries(uintptr_t *start, size_t *len) |
| 237 | { |
| 238 | uintptr_t page_size = getpagesize(); |
| 239 | uintptr_t page_mask = ~(page_size-1); |
| 240 | uintptr_t end = *start + *len; |
| 241 | uintptr_t old_start = *start; |
| 242 | msg_gspew("page_size=%" PRIxPTR "\n", page_size); |
| 243 | msg_gspew("pre-rounding: start=0x%0*" PRIxPTR ", len=0x%zx, end=0x%0*" PRIxPTR "\n", |
| 244 | PRIxPTR_WIDTH, *start, *len, PRIxPTR_WIDTH, end); |
| 245 | *start = *start & page_mask; |
| 246 | end = (end + page_size - 1) & page_mask; |
| 247 | *len = end - *start; |
| 248 | msg_gspew("post-rounding: start=0x%0*" PRIxPTR ", len=0x%zx, end=0x%0*" PRIxPTR "\n", |
| 249 | PRIxPTR_WIDTH, *start, *len, PRIxPTR_WIDTH, *start + *len); |
| 250 | return old_start - *start; |
| 251 | } |
hailfinger | 336a92d | 2010-02-02 11:09:03 +0000 | [diff] [blame] | 252 | |
Patrick Georgi | 220f4b5 | 2017-03-21 16:55:04 +0100 | [diff] [blame] | 253 | struct undo_physmap_data { |
| 254 | void *virt_addr; |
| 255 | size_t len; |
| 256 | }; |
| 257 | |
| 258 | static int undo_physmap(void *data) |
| 259 | { |
| 260 | if (data == NULL) { |
| 261 | msg_perr("%s: tried to physunmap without valid data!\n", __func__); |
| 262 | return 1; |
| 263 | } |
| 264 | struct undo_physmap_data *d = data; |
Edward O'Callaghan | b287898 | 2019-05-30 03:44:32 -0400 | [diff] [blame] | 265 | physunmap_unaligned(d->virt_addr, d->len); |
Patrick Georgi | 220f4b5 | 2017-03-21 16:55:04 +0100 | [diff] [blame] | 266 | free(data); |
| 267 | return 0; |
| 268 | } |
| 269 | |
Edward O'Callaghan | b287898 | 2019-05-30 03:44:32 -0400 | [diff] [blame] | 270 | static void *physmap_common(const char *descr, uintptr_t phys_addr, size_t len, bool readonly, bool autocleanup, |
| 271 | bool round) |
stuge | 7c943ee | 2009-01-26 01:10:48 +0000 | [diff] [blame] | 272 | { |
stepan | cef1780 | 2009-06-23 10:44:36 +0000 | [diff] [blame] | 273 | void *virt_addr; |
Edward O'Callaghan | b287898 | 2019-05-30 03:44:32 -0400 | [diff] [blame] | 274 | uintptr_t offset = 0; |
stepan | cef1780 | 2009-06-23 10:44:36 +0000 | [diff] [blame] | 275 | |
hailfinger | 11ae3c4 | 2009-05-11 14:13:25 +0000 | [diff] [blame] | 276 | if (len == 0) { |
Edward O'Callaghan | 9b520dd | 2019-05-01 21:47:21 -0400 | [diff] [blame] | 277 | msg_pspew("Not mapping %s, zero size at 0x%0*" PRIxPTR ".\n", descr, PRIxPTR_WIDTH, phys_addr); |
hailfinger | f294fa2 | 2010-09-25 22:53:44 +0000 | [diff] [blame] | 278 | return ERROR_PTR; |
hailfinger | 11ae3c4 | 2009-05-11 14:13:25 +0000 | [diff] [blame] | 279 | } |
uwe | 8d342eb | 2011-07-28 08:13:25 +0000 | [diff] [blame] | 280 | |
Edward O'Callaghan | b287898 | 2019-05-30 03:44:32 -0400 | [diff] [blame] | 281 | if (round) |
| 282 | offset = round_to_page_boundaries(&phys_addr, &len); |
hailfinger | 11ae3c4 | 2009-05-11 14:13:25 +0000 | [diff] [blame] | 283 | |
uwe | 8d342eb | 2011-07-28 08:13:25 +0000 | [diff] [blame] | 284 | if (readonly) |
hailfinger | 336a92d | 2010-02-02 11:09:03 +0000 | [diff] [blame] | 285 | virt_addr = sys_physmap_ro_cached(phys_addr, len); |
uwe | 8d342eb | 2011-07-28 08:13:25 +0000 | [diff] [blame] | 286 | else |
hailfinger | 336a92d | 2010-02-02 11:09:03 +0000 | [diff] [blame] | 287 | virt_addr = sys_physmap_rw_uncached(phys_addr, len); |
stuge | 7c943ee | 2009-01-26 01:10:48 +0000 | [diff] [blame] | 288 | |
hailfinger | f294fa2 | 2010-09-25 22:53:44 +0000 | [diff] [blame] | 289 | if (ERROR_PTR == virt_addr) { |
stuge | 7c943ee | 2009-01-26 01:10:48 +0000 | [diff] [blame] | 290 | if (NULL == descr) |
| 291 | descr = "memory"; |
Edward O'Callaghan | 9b520dd | 2019-05-01 21:47:21 -0400 | [diff] [blame] | 292 | msg_perr("Error accessing %s, 0x%zx bytes at 0x%0*" PRIxPTR "\n", |
| 293 | descr, len, PRIxPTR_WIDTH, phys_addr); |
| 294 | msg_perr(MEM_DEV " mmap failed: %s\n", strerror(errno)); |
snelson | e42c380 | 2010-05-07 20:09:04 +0000 | [diff] [blame] | 295 | #ifdef __linux__ |
stuge | 7c943ee | 2009-01-26 01:10:48 +0000 | [diff] [blame] | 296 | if (EINVAL == errno) { |
snelson | e42c380 | 2010-05-07 20:09:04 +0000 | [diff] [blame] | 297 | msg_perr("In Linux this error can be caused by the CONFIG_NONPROMISC_DEVMEM (<2.6.27),\n"); |
| 298 | msg_perr("CONFIG_STRICT_DEVMEM (>=2.6.27) and CONFIG_X86_PAT kernel options.\n"); |
| 299 | msg_perr("Please check if either is enabled in your kernel before reporting a failure.\n"); |
| 300 | msg_perr("You can override CONFIG_X86_PAT at boot with the nopat kernel parameter but\n"); |
| 301 | msg_perr("disabling the other option unfortunately requires a kernel recompile. Sorry!\n"); |
stuge | 7c943ee | 2009-01-26 01:10:48 +0000 | [diff] [blame] | 302 | } |
hailfinger | b81c53c | 2010-07-02 17:12:50 +0000 | [diff] [blame] | 303 | #elif defined (__OpenBSD__) |
| 304 | msg_perr("Please set securelevel=-1 in /etc/rc.securelevel " |
uwe | 8d342eb | 2011-07-28 08:13:25 +0000 | [diff] [blame] | 305 | "and reboot, or reboot into\n" |
| 306 | "single user mode.\n"); |
snelson | e42c380 | 2010-05-07 20:09:04 +0000 | [diff] [blame] | 307 | #endif |
Edward O'Callaghan | b287898 | 2019-05-30 03:44:32 -0400 | [diff] [blame] | 308 | return ERROR_PTR; |
stuge | 7c943ee | 2009-01-26 01:10:48 +0000 | [diff] [blame] | 309 | } |
| 310 | |
Patrick Georgi | 220f4b5 | 2017-03-21 16:55:04 +0100 | [diff] [blame] | 311 | if (autocleanup) { |
| 312 | struct undo_physmap_data *d = malloc(sizeof(struct undo_physmap_data)); |
| 313 | if (d == NULL) { |
| 314 | msg_perr("%s: Out of memory!\n", __func__); |
Edward O'Callaghan | b287898 | 2019-05-30 03:44:32 -0400 | [diff] [blame] | 315 | physunmap_unaligned(virt_addr, len); |
| 316 | return ERROR_PTR; |
Patrick Georgi | 220f4b5 | 2017-03-21 16:55:04 +0100 | [diff] [blame] | 317 | } |
| 318 | |
| 319 | d->virt_addr = virt_addr; |
| 320 | d->len = len; |
| 321 | if (register_shutdown(undo_physmap, d) != 0) { |
| 322 | msg_perr("%s: Could not register shutdown function!\n", __func__); |
Edward O'Callaghan | b287898 | 2019-05-30 03:44:32 -0400 | [diff] [blame] | 323 | physunmap_unaligned(virt_addr, len); |
| 324 | return ERROR_PTR; |
Patrick Georgi | 220f4b5 | 2017-03-21 16:55:04 +0100 | [diff] [blame] | 325 | } |
| 326 | } |
| 327 | |
Edward O'Callaghan | b287898 | 2019-05-30 03:44:32 -0400 | [diff] [blame] | 328 | return virt_addr + offset; |
stuge | 7c943ee | 2009-01-26 01:10:48 +0000 | [diff] [blame] | 329 | } |
stepan | 6d42c0f | 2009-08-12 09:27:45 +0000 | [diff] [blame] | 330 | |
Edward O'Callaghan | b287898 | 2019-05-30 03:44:32 -0400 | [diff] [blame] | 331 | void physunmap_unaligned(void *virt_addr, size_t len) |
hailfinger | 336a92d | 2010-02-02 11:09:03 +0000 | [diff] [blame] | 332 | { |
Edward O'Callaghan | b287898 | 2019-05-30 03:44:32 -0400 | [diff] [blame] | 333 | /* No need to check for zero size, such mappings would have yielded ERROR_PTR. */ |
| 334 | if (virt_addr == ERROR_PTR) { |
| 335 | msg_perr("Trying to unmap a nonexisting mapping!\n" |
| 336 | "Please report a bug at flashrom@flashrom.org\n"); |
| 337 | return; |
| 338 | } |
| 339 | |
| 340 | sys_physunmap_unaligned(virt_addr, len); |
| 341 | } |
| 342 | |
| 343 | void physunmap(void *virt_addr, size_t len) |
| 344 | { |
| 345 | uintptr_t tmp; |
| 346 | |
| 347 | /* No need to check for zero size, such mappings would have yielded ERROR_PTR. */ |
| 348 | if (virt_addr == ERROR_PTR) { |
| 349 | msg_perr("Trying to unmap a nonexisting mapping!\n" |
| 350 | "Please report a bug at flashrom@flashrom.org\n"); |
| 351 | return; |
| 352 | } |
| 353 | tmp = (uintptr_t)virt_addr; |
| 354 | /* We assume that the virtual address of a page-aligned physical address is page-aligned as well. By |
| 355 | * extension, rounding a virtual unaligned address as returned by physmap should yield the same offset |
| 356 | * between rounded and original virtual address as between rounded and original physical address. |
| 357 | */ |
| 358 | round_to_page_boundaries(&tmp, &len); |
| 359 | virt_addr = (void *)tmp; |
| 360 | physunmap_unaligned(virt_addr, len); |
| 361 | } |
| 362 | |
| 363 | void *physmap(const char *descr, uintptr_t phys_addr, size_t len) |
| 364 | { |
| 365 | return physmap_common(descr, phys_addr, len, PHYSM_RW, PHYSM_NOCLEANUP, PHYSM_ROUND); |
Patrick Georgi | 220f4b5 | 2017-03-21 16:55:04 +0100 | [diff] [blame] | 366 | } |
| 367 | |
| 368 | void *rphysmap(const char *descr, uintptr_t phys_addr, size_t len) |
| 369 | { |
Edward O'Callaghan | b287898 | 2019-05-30 03:44:32 -0400 | [diff] [blame] | 370 | return physmap_common(descr, phys_addr, len, PHYSM_RW, PHYSM_CLEANUP, PHYSM_ROUND); |
hailfinger | 336a92d | 2010-02-02 11:09:03 +0000 | [diff] [blame] | 371 | } |
| 372 | |
Edward O'Callaghan | 64a4db2 | 2019-05-30 03:13:07 -0400 | [diff] [blame] | 373 | void *physmap_ro(const char *descr, uintptr_t phys_addr, size_t len) |
hailfinger | 336a92d | 2010-02-02 11:09:03 +0000 | [diff] [blame] | 374 | { |
Edward O'Callaghan | b287898 | 2019-05-30 03:44:32 -0400 | [diff] [blame] | 375 | return physmap_common(descr, phys_addr, len, PHYSM_RO, PHYSM_NOCLEANUP, PHYSM_ROUND); |
hailfinger | 336a92d | 2010-02-02 11:09:03 +0000 | [diff] [blame] | 376 | } |
| 377 | |
hailfinger | 324a9cc | 2010-05-26 01:45:41 +0000 | [diff] [blame] | 378 | #if defined(__i386__) || defined(__x86_64__) |
| 379 | |
stepan | 6d42c0f | 2009-08-12 09:27:45 +0000 | [diff] [blame] | 380 | #ifdef __linux__ |
| 381 | /* |
| 382 | * Reading and writing to MSRs, however requires instructions rdmsr/wrmsr, |
| 383 | * which are ring0 privileged instructions so only the kernel can do the |
uwe | 8d342eb | 2011-07-28 08:13:25 +0000 | [diff] [blame] | 384 | * read/write. This function, therefore, requires that the msr kernel module |
stepan | 6d42c0f | 2009-08-12 09:27:45 +0000 | [diff] [blame] | 385 | * be loaded to access these instructions from user space using device |
| 386 | * /dev/cpu/0/msr. |
| 387 | */ |
| 388 | |
| 389 | static int fd_msr = -1; |
| 390 | |
| 391 | msr_t rdmsr(int addr) |
| 392 | { |
stepan | aa1e768 | 2009-09-04 13:57:07 +0000 | [diff] [blame] | 393 | uint32_t buf[2]; |
stepan | 6d42c0f | 2009-08-12 09:27:45 +0000 | [diff] [blame] | 394 | msr_t msr = { 0xffffffff, 0xffffffff }; |
| 395 | |
| 396 | if (lseek(fd_msr, (off_t) addr, SEEK_SET) == -1) { |
Edward O'Callaghan | 9b520dd | 2019-05-01 21:47:21 -0400 | [diff] [blame] | 397 | msg_perr("Could not lseek() MSR: %s\n", strerror(errno)); |
stepan | 6d42c0f | 2009-08-12 09:27:45 +0000 | [diff] [blame] | 398 | close(fd_msr); |
| 399 | exit(1); |
| 400 | } |
| 401 | |
| 402 | if (read(fd_msr, buf, 8) == 8) { |
stepan | aa1e768 | 2009-09-04 13:57:07 +0000 | [diff] [blame] | 403 | msr.lo = buf[0]; |
| 404 | msr.hi = buf[1]; |
stepan | 6d42c0f | 2009-08-12 09:27:45 +0000 | [diff] [blame] | 405 | return msr; |
| 406 | } |
| 407 | |
| 408 | if (errno != EIO) { |
| 409 | // A severe error. |
Edward O'Callaghan | 9b520dd | 2019-05-01 21:47:21 -0400 | [diff] [blame] | 410 | msg_perr("Could not read() MSR: %s\n", strerror(errno)); |
stepan | 6d42c0f | 2009-08-12 09:27:45 +0000 | [diff] [blame] | 411 | close(fd_msr); |
| 412 | exit(1); |
| 413 | } |
| 414 | |
| 415 | return msr; |
| 416 | } |
| 417 | |
| 418 | int wrmsr(int addr, msr_t msr) |
| 419 | { |
mkarcher | 3d05286 | 2010-05-17 23:19:22 +0000 | [diff] [blame] | 420 | uint32_t buf[2]; |
| 421 | buf[0] = msr.lo; |
| 422 | buf[1] = msr.hi; |
| 423 | |
stepan | 6d42c0f | 2009-08-12 09:27:45 +0000 | [diff] [blame] | 424 | if (lseek(fd_msr, (off_t) addr, SEEK_SET) == -1) { |
Edward O'Callaghan | 9b520dd | 2019-05-01 21:47:21 -0400 | [diff] [blame] | 425 | msg_perr("Could not lseek() MSR: %s\n", strerror(errno)); |
stepan | 6d42c0f | 2009-08-12 09:27:45 +0000 | [diff] [blame] | 426 | close(fd_msr); |
| 427 | exit(1); |
| 428 | } |
| 429 | |
mkarcher | 3d05286 | 2010-05-17 23:19:22 +0000 | [diff] [blame] | 430 | if (write(fd_msr, buf, 8) != 8 && errno != EIO) { |
Edward O'Callaghan | 9b520dd | 2019-05-01 21:47:21 -0400 | [diff] [blame] | 431 | msg_perr("Could not write() MSR: %s\n", strerror(errno)); |
stepan | 6d42c0f | 2009-08-12 09:27:45 +0000 | [diff] [blame] | 432 | close(fd_msr); |
| 433 | exit(1); |
| 434 | } |
| 435 | |
uwe | 8d342eb | 2011-07-28 08:13:25 +0000 | [diff] [blame] | 436 | /* Some MSRs must not be written. */ |
stepan | 6d42c0f | 2009-08-12 09:27:45 +0000 | [diff] [blame] | 437 | if (errno == EIO) |
| 438 | return -1; |
| 439 | |
| 440 | return 0; |
| 441 | } |
| 442 | |
| 443 | int setup_cpu_msr(int cpu) |
| 444 | { |
| 445 | char msrfilename[64]; |
hailfinger | a83a5fe | 2010-05-30 22:24:40 +0000 | [diff] [blame] | 446 | memset(msrfilename, 0, sizeof(msrfilename)); |
| 447 | snprintf(msrfilename, sizeof(msrfilename), "/dev/cpu/%d/msr", cpu); |
stepan | 6d42c0f | 2009-08-12 09:27:45 +0000 | [diff] [blame] | 448 | |
| 449 | if (fd_msr != -1) { |
snelson | e42c380 | 2010-05-07 20:09:04 +0000 | [diff] [blame] | 450 | msg_pinfo("MSR was already initialized\n"); |
stepan | 6d42c0f | 2009-08-12 09:27:45 +0000 | [diff] [blame] | 451 | return -1; |
| 452 | } |
| 453 | |
| 454 | fd_msr = open(msrfilename, O_RDWR); |
| 455 | |
| 456 | if (fd_msr < 0) { |
Edward O'Callaghan | 9b520dd | 2019-05-01 21:47:21 -0400 | [diff] [blame] | 457 | msg_perr("Error while opening %s: %s\n", msrfilename, strerror(errno)); |
snelson | e42c380 | 2010-05-07 20:09:04 +0000 | [diff] [blame] | 458 | msg_pinfo("Did you run 'modprobe msr'?\n"); |
stepan | 6d42c0f | 2009-08-12 09:27:45 +0000 | [diff] [blame] | 459 | return -1; |
| 460 | } |
| 461 | |
| 462 | return 0; |
| 463 | } |
| 464 | |
| 465 | void cleanup_cpu_msr(void) |
| 466 | { |
| 467 | if (fd_msr == -1) { |
snelson | e42c380 | 2010-05-07 20:09:04 +0000 | [diff] [blame] | 468 | msg_pinfo("No MSR initialized.\n"); |
stepan | 6d42c0f | 2009-08-12 09:27:45 +0000 | [diff] [blame] | 469 | return; |
| 470 | } |
| 471 | |
| 472 | close(fd_msr); |
| 473 | |
uwe | 8d342eb | 2011-07-28 08:13:25 +0000 | [diff] [blame] | 474 | /* Clear MSR file descriptor. */ |
stepan | 6d42c0f | 2009-08-12 09:27:45 +0000 | [diff] [blame] | 475 | fd_msr = -1; |
| 476 | } |
| 477 | #else |
hailfinger | 2cff9a7 | 2009-08-19 10:46:23 +0000 | [diff] [blame] | 478 | #if defined(__FreeBSD__) || defined(__DragonFly__) |
| 479 | #include <sys/ioctl.h> |
| 480 | |
| 481 | typedef struct { |
| 482 | int msr; |
| 483 | uint64_t data; |
| 484 | } cpu_msr_args_t; |
| 485 | #define CPU_RDMSR _IOWR('c', 1, cpu_msr_args_t) |
| 486 | #define CPU_WRMSR _IOWR('c', 2, cpu_msr_args_t) |
| 487 | |
| 488 | static int fd_msr = -1; |
| 489 | |
| 490 | msr_t rdmsr(int addr) |
| 491 | { |
| 492 | cpu_msr_args_t args; |
| 493 | |
| 494 | msr_t msr = { 0xffffffff, 0xffffffff }; |
| 495 | |
| 496 | args.msr = addr; |
| 497 | |
| 498 | if (ioctl(fd_msr, CPU_RDMSR, &args) < 0) { |
Edward O'Callaghan | 9b520dd | 2019-05-01 21:47:21 -0400 | [diff] [blame] | 499 | msg_perr("Error while executing CPU_RDMSR ioctl: %s\n", strerror(errno)); |
hailfinger | 2cff9a7 | 2009-08-19 10:46:23 +0000 | [diff] [blame] | 500 | close(fd_msr); |
| 501 | exit(1); |
| 502 | } |
| 503 | |
| 504 | msr.lo = args.data & 0xffffffff; |
| 505 | msr.hi = args.data >> 32; |
| 506 | |
| 507 | return msr; |
| 508 | } |
| 509 | |
| 510 | int wrmsr(int addr, msr_t msr) |
| 511 | { |
| 512 | cpu_msr_args_t args; |
| 513 | |
| 514 | args.msr = addr; |
| 515 | args.data = (((uint64_t)msr.hi) << 32) | msr.lo; |
| 516 | |
| 517 | if (ioctl(fd_msr, CPU_WRMSR, &args) < 0) { |
Edward O'Callaghan | 9b520dd | 2019-05-01 21:47:21 -0400 | [diff] [blame] | 518 | msg_perr("Error while executing CPU_WRMSR ioctl: %s\n", strerror(errno)); |
hailfinger | 2cff9a7 | 2009-08-19 10:46:23 +0000 | [diff] [blame] | 519 | close(fd_msr); |
| 520 | exit(1); |
| 521 | } |
| 522 | |
| 523 | return 0; |
| 524 | } |
| 525 | |
| 526 | int setup_cpu_msr(int cpu) |
| 527 | { |
| 528 | char msrfilename[64]; |
hailfinger | a83a5fe | 2010-05-30 22:24:40 +0000 | [diff] [blame] | 529 | memset(msrfilename, 0, sizeof(msrfilename)); |
| 530 | snprintf(msrfilename, sizeof(msrfilename), "/dev/cpu%d", cpu); |
hailfinger | 2cff9a7 | 2009-08-19 10:46:23 +0000 | [diff] [blame] | 531 | |
| 532 | if (fd_msr != -1) { |
snelson | e42c380 | 2010-05-07 20:09:04 +0000 | [diff] [blame] | 533 | msg_pinfo("MSR was already initialized\n"); |
hailfinger | 2cff9a7 | 2009-08-19 10:46:23 +0000 | [diff] [blame] | 534 | return -1; |
| 535 | } |
| 536 | |
| 537 | fd_msr = open(msrfilename, O_RDWR); |
| 538 | |
| 539 | if (fd_msr < 0) { |
Edward O'Callaghan | 9b520dd | 2019-05-01 21:47:21 -0400 | [diff] [blame] | 540 | msg_perr("Error while opening %s: %s\n", msrfilename, strerror(errno)); |
snelson | e42c380 | 2010-05-07 20:09:04 +0000 | [diff] [blame] | 541 | msg_pinfo("Did you install ports/sysutils/devcpu?\n"); |
hailfinger | 2cff9a7 | 2009-08-19 10:46:23 +0000 | [diff] [blame] | 542 | return -1; |
| 543 | } |
| 544 | |
| 545 | return 0; |
| 546 | } |
| 547 | |
| 548 | void cleanup_cpu_msr(void) |
| 549 | { |
| 550 | if (fd_msr == -1) { |
snelson | e42c380 | 2010-05-07 20:09:04 +0000 | [diff] [blame] | 551 | msg_pinfo("No MSR initialized.\n"); |
hailfinger | 2cff9a7 | 2009-08-19 10:46:23 +0000 | [diff] [blame] | 552 | return; |
| 553 | } |
| 554 | |
| 555 | close(fd_msr); |
| 556 | |
uwe | 8d342eb | 2011-07-28 08:13:25 +0000 | [diff] [blame] | 557 | /* Clear MSR file descriptor. */ |
hailfinger | 2cff9a7 | 2009-08-19 10:46:23 +0000 | [diff] [blame] | 558 | fd_msr = -1; |
| 559 | } |
| 560 | |
Edward O'Callaghan | ad51bfd | 2019-05-01 21:40:17 -0400 | [diff] [blame] | 561 | #elif defined(__MACH__) && defined(__APPLE__) |
| 562 | /* rdmsr() and wrmsr() are provided by DirectHW which needs neither setup nor cleanup. */ |
stepan | 6d42c0f | 2009-08-12 09:27:45 +0000 | [diff] [blame] | 563 | int setup_cpu_msr(int cpu) |
| 564 | { |
| 565 | // Always succeed for now |
| 566 | return 0; |
| 567 | } |
| 568 | |
| 569 | void cleanup_cpu_msr(void) |
| 570 | { |
| 571 | // Nothing, yet. |
| 572 | } |
oxygene | 5027589 | 2010-09-30 17:03:32 +0000 | [diff] [blame] | 573 | #elif defined(__LIBPAYLOAD__) |
| 574 | msr_t libpayload_rdmsr(int addr) |
| 575 | { |
| 576 | msr_t msr; |
| 577 | unsigned long long val = _rdmsr(addr); |
| 578 | msr.lo = val & 0xffffffff; |
| 579 | msr.hi = val >> 32; |
| 580 | return msr; |
| 581 | } |
| 582 | |
| 583 | int libpayload_wrmsr(int addr, msr_t msr) |
| 584 | { |
| 585 | _wrmsr(addr, msr.lo | ((unsigned long long)msr.hi << 32)); |
oxygene | 70aa650 | 2011-03-08 07:17:44 +0000 | [diff] [blame] | 586 | return 0; |
oxygene | 5027589 | 2010-09-30 17:03:32 +0000 | [diff] [blame] | 587 | } |
Edward O'Callaghan | b287898 | 2019-05-30 03:44:32 -0400 | [diff] [blame] | 588 | |
stepan | 6d42c0f | 2009-08-12 09:27:45 +0000 | [diff] [blame] | 589 | #else |
Edward O'Callaghan | ad51bfd | 2019-05-01 21:40:17 -0400 | [diff] [blame] | 590 | /* default MSR implementation */ |
stepan | 6d42c0f | 2009-08-12 09:27:45 +0000 | [diff] [blame] | 591 | msr_t rdmsr(int addr) |
| 592 | { |
| 593 | msr_t ret = { 0xffffffff, 0xffffffff }; |
| 594 | |
| 595 | return ret; |
| 596 | } |
| 597 | |
| 598 | int wrmsr(int addr, msr_t msr) |
| 599 | { |
| 600 | return -1; |
| 601 | } |
| 602 | |
| 603 | int setup_cpu_msr(int cpu) |
| 604 | { |
snelson | e42c380 | 2010-05-07 20:09:04 +0000 | [diff] [blame] | 605 | msg_pinfo("No MSR support for your OS yet.\n"); |
stepan | 6d42c0f | 2009-08-12 09:27:45 +0000 | [diff] [blame] | 606 | return -1; |
| 607 | } |
| 608 | |
| 609 | void cleanup_cpu_msr(void) |
| 610 | { |
| 611 | // Nothing, yet. |
| 612 | } |
| 613 | #endif |
Edward O'Callaghan | ad51bfd | 2019-05-01 21:40:17 -0400 | [diff] [blame] | 614 | #endif // OS switches for MSR code |
| 615 | #else // x86 |
hailfinger | 324a9cc | 2010-05-26 01:45:41 +0000 | [diff] [blame] | 616 | /* Does MSR exist on non-x86 architectures? */ |
Edward O'Callaghan | ad51bfd | 2019-05-01 21:40:17 -0400 | [diff] [blame] | 617 | #endif // arch switches for MSR code |