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rminnich8d3ff912003-10-25 17:01:29 +00001/*
uweb25f1ea2007-08-29 17:52:32 +00002 * This file is part of the flashrom project.
rminnich8d3ff912003-10-25 17:01:29 +00003 *
uwe555dd972007-09-09 20:21:05 +00004 * Copyright (C) 2000 Silicon Integrated System Corporation
5 * Copyright (C) 2004 Tyan Corp <yhlu@tyan.com>
uwe4475e902009-05-19 14:14:21 +00006 * Copyright (C) 2005-2008 coresystems GmbH
hailfinger23060112009-05-08 12:49:03 +00007 * Copyright (C) 2008,2009 Carl-Daniel Hailfinger
Edward O'Callaghan0949b782019-11-10 23:23:20 +11008 * Copyright (C) 2016 secunet Security Networks AG
9 * (Written by Nico Huber <nico.huber@secunet.com> for secunet)
rminnich8d3ff912003-10-25 17:01:29 +000010 *
uweb25f1ea2007-08-29 17:52:32 +000011 * This program is free software; you can redistribute it and/or modify
12 * it under the terms of the GNU General Public License as published by
13 * the Free Software Foundation; either version 2 of the License, or
14 * (at your option) any later version.
rminnich8d3ff912003-10-25 17:01:29 +000015 *
uweb25f1ea2007-08-29 17:52:32 +000016 * This program is distributed in the hope that it will be useful,
17 * but WITHOUT ANY WARRANTY; without even the implied warranty of
18 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
19 * GNU General Public License for more details.
rminnich8d3ff912003-10-25 17:01:29 +000020 */
21
hailfingera83a5fe2010-05-30 22:24:40 +000022#include <stdio.h>
stepan1da96c02006-11-21 23:48:51 +000023#include <sys/types.h>
oxygene50275892010-09-30 17:03:32 +000024#ifndef __LIBPAYLOAD__
25#include <fcntl.h>
stepan1da96c02006-11-21 23:48:51 +000026#include <sys/stat.h>
oxygene50275892010-09-30 17:03:32 +000027#endif
rminnich8d3ff912003-10-25 17:01:29 +000028#include <string.h>
Edward O'Callaghanb2257cc2020-07-25 22:19:47 +100029#include <unistd.h>
rminnich8d3ff912003-10-25 17:01:29 +000030#include <stdlib.h>
Edward O'Callaghanb2257cc2020-07-25 22:19:47 +100031#include <errno.h>
hailfingerf76cc322010-11-09 22:00:31 +000032#include <ctype.h>
ollie6a600992005-11-26 21:55:36 +000033#include <getopt.h>
hailfinger3b471632010-03-27 16:36:40 +000034#if HAVE_UTSNAME == 1
35#include <sys/utsname.h>
36#endif
Vadim Bendebury2b4dcef2018-05-21 10:47:18 -070037
38#include "action_descriptor.h"
rminnich8d3ff912003-10-25 17:01:29 +000039#include "flash.h"
hailfinger66966da2009-06-15 14:14:48 +000040#include "flashchips.h"
hailfinger428f6852010-07-27 22:41:39 +000041#include "programmer.h"
Duncan Laurie25a4ca22019-04-25 12:08:52 -070042#include "spi.h"
Edward O'Callaghan99974452020-10-13 13:28:33 +110043#include "chipdrivers.h"
rminnich8d3ff912003-10-25 17:01:29 +000044
krause2eb76212011-01-17 07:50:42 +000045const char flashrom_version[] = FLASHROM_VERSION;
Edward O'Callaghanc4d1f1c2020-04-17 13:27:23 +100046const char *chip_to_probe = NULL;
hailfinger80422e22009-12-13 22:28:00 +000047
David Hendricks1ed1d352011-11-23 17:54:37 -080048/* error handling stuff */
Edward O'Callaghan0a92ce22020-12-09 17:10:37 +110049static enum error_action access_denied_action = error_ignore;
David Hendricks1ed1d352011-11-23 17:54:37 -080050
51int ignore_error(int err) {
52 int rc = 0;
53
54 switch(err) {
Edward O'Callaghan0a92ce22020-12-09 17:10:37 +110055 case SPI_ACCESS_DENIED:
David Hendricks1ed1d352011-11-23 17:54:37 -080056 if (access_denied_action == error_ignore)
57 rc = 1;
58 break;
59 default:
60 break;
61 }
62
63 return rc;
64}
65
hailfinger969e2f32011-09-08 00:00:29 +000066static enum programmer programmer = PROGRAMMER_INVALID;
Edward O'Callaghanc4d1f1c2020-04-17 13:27:23 +100067static const char *programmer_param = NULL;
stepan782fb172007-04-06 11:58:03 +000068
uwee15beb92010-08-08 17:01:18 +000069/*
hailfinger80422e22009-12-13 22:28:00 +000070 * Programmers supporting multiple buses can have differing size limits on
71 * each bus. Store the limits for each bus in a common struct.
72 */
hailfinger1ff33dc2010-07-03 11:02:10 +000073struct decode_sizes max_rom_decode;
74
75/* If nonzero, used as the start address of bottom-aligned flash. */
76unsigned long flashbase;
hailfinger80422e22009-12-13 22:28:00 +000077
hailfinger5828baf2010-07-03 12:14:25 +000078/* Is writing allowed with this programmer? */
79int programmer_may_write;
80
hailfingerabe249e2009-05-08 17:43:22 +000081const struct programmer_entry programmer_table[] = {
hailfinger90c7d542010-05-31 15:27:27 +000082#if CONFIG_INTERNAL == 1
hailfingerabe249e2009-05-08 17:43:22 +000083 {
hailfinger3548a9a2009-08-12 14:34:35 +000084 .name = "internal",
Edward O'Callaghan0949b782019-11-10 23:23:20 +110085 .type = OTHER,
86 .devs.note = NULL,
hailfinger6c69ab02009-05-11 15:46:43 +000087 .init = internal_init,
hailfinger11ae3c42009-05-11 14:13:25 +000088 .map_flash_region = physmap,
89 .unmap_flash_region = physunmap,
hailfingere5829f62009-06-05 17:48:08 +000090 .delay = internal_delay,
David Hendricks55cdd9c2015-11-25 14:37:26 -080091
92 /*
93 * "Internal" implies in-system programming on a live system, so
94 * handle with paranoia to catch errors early. If something goes
95 * wrong then hopefully the system will still be recoverable.
96 */
97 .paranoid = 1,
hailfingerabe249e2009-05-08 17:43:22 +000098 },
hailfinger80422e22009-12-13 22:28:00 +000099#endif
stepan927d4e22007-04-04 22:45:58 +0000100
hailfinger90c7d542010-05-31 15:27:27 +0000101#if CONFIG_DUMMY == 1
hailfingera9df33c2009-05-09 00:54:55 +0000102 {
hailfinger3548a9a2009-08-12 14:34:35 +0000103 .name = "dummy",
Edward O'Callaghan0949b782019-11-10 23:23:20 +1100104 .type = OTHER,
105 /* FIXME */
106 .devs.note = "Dummy device, does nothing and logs all accesses\n",
hailfinger6c69ab02009-05-11 15:46:43 +0000107 .init = dummy_init,
hailfinger11ae3c42009-05-11 14:13:25 +0000108 .map_flash_region = dummy_map,
109 .unmap_flash_region = dummy_unmap,
hailfingere5829f62009-06-05 17:48:08 +0000110 .delay = internal_delay,
hailfingera9df33c2009-05-09 00:54:55 +0000111 },
hailfinger571a6b32009-09-16 10:09:21 +0000112#endif
hailfingera9df33c2009-05-09 00:54:55 +0000113
Edward O'Callaghande8b7632020-09-11 14:33:57 +1000114#if CONFIG_MEC1308 == 1
115 {
116 .name = "mec1308",
117 .type = OTHER,
118 .devs.note = "Microchip MEC1308 Embedded Controller.\n",
119 .init = mec1308_init,
120 .map_flash_region = fallback_map,
121 .unmap_flash_region = fallback_unmap,
122 .delay = internal_delay,
123 },
124#endif
125
hailfinger90c7d542010-05-31 15:27:27 +0000126#if CONFIG_NIC3COM == 1
uwe0f5a3a22009-05-13 11:36:06 +0000127 {
hailfinger3548a9a2009-08-12 14:34:35 +0000128 .name = "nic3com",
Edward O'Callaghan0949b782019-11-10 23:23:20 +1100129 .type = PCI,
130 .devs.dev = nics_3com,
uwe0f5a3a22009-05-13 11:36:06 +0000131 .init = nic3com_init,
uwe3e656bd2009-05-17 23:12:17 +0000132 .map_flash_region = fallback_map,
133 .unmap_flash_region = fallback_unmap,
hailfingere5829f62009-06-05 17:48:08 +0000134 .delay = internal_delay,
uwe0f5a3a22009-05-13 11:36:06 +0000135 },
hailfinger571a6b32009-09-16 10:09:21 +0000136#endif
uwe0f5a3a22009-05-13 11:36:06 +0000137
hailfinger90c7d542010-05-31 15:27:27 +0000138#if CONFIG_NICREALTEK == 1
hailfinger5aa36982010-05-21 21:54:07 +0000139 {
hailfinger0d703d42011-03-07 01:08:09 +0000140 /* This programmer works for Realtek RTL8139 and SMC 1211. */
uwe8d342eb2011-07-28 08:13:25 +0000141 .name = "nicrealtek",
Edward O'Callaghan0949b782019-11-10 23:23:20 +1100142 .type = PCI,
143 .devs.dev = nics_realtek,
uwe8d342eb2011-07-28 08:13:25 +0000144 .init = nicrealtek_init,
145 .map_flash_region = fallback_map,
146 .unmap_flash_region = fallback_unmap,
uwe8d342eb2011-07-28 08:13:25 +0000147 .delay = internal_delay,
hailfinger5aa36982010-05-21 21:54:07 +0000148 },
hailfinger5aa36982010-05-21 21:54:07 +0000149#endif
150
hailfingerf0a368f2010-06-07 22:37:54 +0000151#if CONFIG_NICNATSEMI == 1
152 {
uwe8d342eb2011-07-28 08:13:25 +0000153 .name = "nicnatsemi",
Edward O'Callaghan0949b782019-11-10 23:23:20 +1100154 .type = PCI,
155 .devs.dev = nics_natsemi,
uwe8d342eb2011-07-28 08:13:25 +0000156 .init = nicnatsemi_init,
157 .map_flash_region = fallback_map,
158 .unmap_flash_region = fallback_unmap,
uwe8d342eb2011-07-28 08:13:25 +0000159 .delay = internal_delay,
hailfingerf0a368f2010-06-07 22:37:54 +0000160 },
161#endif
hailfinger5aa36982010-05-21 21:54:07 +0000162
hailfinger90c7d542010-05-31 15:27:27 +0000163#if CONFIG_GFXNVIDIA == 1
uweff4576d2009-09-30 18:29:55 +0000164 {
165 .name = "gfxnvidia",
Edward O'Callaghan0949b782019-11-10 23:23:20 +1100166 .type = PCI,
167 .devs.dev = gfx_nvidia,
uweff4576d2009-09-30 18:29:55 +0000168 .init = gfxnvidia_init,
uweff4576d2009-09-30 18:29:55 +0000169 .map_flash_region = fallback_map,
170 .unmap_flash_region = fallback_unmap,
uweff4576d2009-09-30 18:29:55 +0000171 .delay = internal_delay,
172 },
173#endif
174
Edward O'Callaghande8b7632020-09-11 14:33:57 +1000175#if CONFIG_RAIDEN_DEBUG_SPI == 1
176 {
177 .name = "raiden_debug_spi",
178 .type = USB,
179 .devs.dev = devs_raiden,
180 .init = raiden_debug_spi_init,
181 .map_flash_region = fallback_map,
182 .unmap_flash_region = fallback_unmap,
183 .delay = internal_delay,
184 },
185#endif
186
hailfinger90c7d542010-05-31 15:27:27 +0000187#if CONFIG_DRKAISER == 1
ruikda922a12009-05-17 19:39:27 +0000188 {
uwee2f95ef2009-09-02 23:00:46 +0000189 .name = "drkaiser",
Edward O'Callaghan0949b782019-11-10 23:23:20 +1100190 .type = PCI,
191 .devs.dev = drkaiser_pcidev,
uwee2f95ef2009-09-02 23:00:46 +0000192 .init = drkaiser_init,
uwee2f95ef2009-09-02 23:00:46 +0000193 .map_flash_region = fallback_map,
194 .unmap_flash_region = fallback_unmap,
uwee2f95ef2009-09-02 23:00:46 +0000195 .delay = internal_delay,
196 },
hailfinger571a6b32009-09-16 10:09:21 +0000197#endif
uwee2f95ef2009-09-02 23:00:46 +0000198
hailfinger90c7d542010-05-31 15:27:27 +0000199#if CONFIG_SATASII == 1
uwee2f95ef2009-09-02 23:00:46 +0000200 {
hailfinger3548a9a2009-08-12 14:34:35 +0000201 .name = "satasii",
Edward O'Callaghan0949b782019-11-10 23:23:20 +1100202 .type = PCI,
203 .devs.dev = satas_sii,
ruikda922a12009-05-17 19:39:27 +0000204 .init = satasii_init,
uwe3e656bd2009-05-17 23:12:17 +0000205 .map_flash_region = fallback_map,
206 .unmap_flash_region = fallback_unmap,
hailfingere5829f62009-06-05 17:48:08 +0000207 .delay = internal_delay,
ruikda922a12009-05-17 19:39:27 +0000208 },
hailfinger571a6b32009-09-16 10:09:21 +0000209#endif
ruikda922a12009-05-17 19:39:27 +0000210
hailfinger90c7d542010-05-31 15:27:27 +0000211#if CONFIG_ATAHPT == 1
uwe7e627c82010-02-21 21:17:00 +0000212 {
213 .name = "atahpt",
Edward O'Callaghan0949b782019-11-10 23:23:20 +1100214 .type = PCI,
215 .devs.dev = ata_hpt,
uwe7e627c82010-02-21 21:17:00 +0000216 .init = atahpt_init,
uwe7e627c82010-02-21 21:17:00 +0000217 .map_flash_region = fallback_map,
218 .unmap_flash_region = fallback_unmap,
uwe7e627c82010-02-21 21:17:00 +0000219 .delay = internal_delay,
220 },
221#endif
222
Edward O'Callaghande8b7632020-09-11 14:33:57 +1000223#if CONFIG_ATAVIA == 1
224 {
225 .name = "atavia",
226 .type = PCI,
227 .devs.dev = ata_via,
228 .init = atavia_init,
229 .map_flash_region = atavia_map,
230 .unmap_flash_region = fallback_unmap,
231 .delay = internal_delay,
232 },
233#endif
234
235#if CONFIG_ATAPROMISE == 1
236 {
237 .name = "atapromise",
238 .type = PCI,
239 .devs.dev = ata_promise,
240 .init = atapromise_init,
241 .map_flash_region = atapromise_map,
242 .unmap_flash_region = fallback_unmap,
243 .delay = internal_delay,
244 },
245#endif
246
247#if CONFIG_IT8212 == 1
248 {
249 .name = "it8212",
250 .type = PCI,
251 .devs.dev = devs_it8212,
252 .init = it8212_init,
253 .map_flash_region = fallback_map,
254 .unmap_flash_region = fallback_unmap,
255 .delay = internal_delay,
256 },
257#endif
258
hailfinger90c7d542010-05-31 15:27:27 +0000259#if CONFIG_FT2232_SPI == 1
hailfingerf31da3d2009-06-16 21:08:06 +0000260 {
hailfinger90c7d542010-05-31 15:27:27 +0000261 .name = "ft2232_spi",
Edward O'Callaghan0949b782019-11-10 23:23:20 +1100262 .type = USB,
Nikolai Artemievc347a852020-04-29 12:17:08 +1000263 .devs.dev = devs_ft2232spi,
hailfingerf31da3d2009-06-16 21:08:06 +0000264 .init = ft2232_spi_init,
hailfinger6fe23d62009-08-12 11:39:29 +0000265 .map_flash_region = fallback_map,
266 .unmap_flash_region = fallback_unmap,
hailfingerf31da3d2009-06-16 21:08:06 +0000267 .delay = internal_delay,
268 },
hailfingerd9dcfbd2009-08-19 13:27:58 +0000269#endif
hailfinger6fe23d62009-08-12 11:39:29 +0000270
hailfinger90c7d542010-05-31 15:27:27 +0000271#if CONFIG_SERPROG == 1
hailfinger37b4fbf2009-06-23 11:33:43 +0000272 {
hailfinger3548a9a2009-08-12 14:34:35 +0000273 .name = "serprog",
Edward O'Callaghan0949b782019-11-10 23:23:20 +1100274 .type = OTHER,
275 /* FIXME */
276 .devs.note = "All programmer devices speaking the serprog protocol\n",
hailfinger37b4fbf2009-06-23 11:33:43 +0000277 .init = serprog_init,
Edward O'Callaghan62018182020-10-03 00:16:48 +1000278 .map_flash_region = serprog_map,
hailfinger37b4fbf2009-06-23 11:33:43 +0000279 .unmap_flash_region = fallback_unmap,
hailfinger37b4fbf2009-06-23 11:33:43 +0000280 .delay = serprog_delay,
281 },
hailfinger74d88a72009-08-12 16:17:41 +0000282#endif
hailfingerf31da3d2009-06-16 21:08:06 +0000283
hailfinger90c7d542010-05-31 15:27:27 +0000284#if CONFIG_BUSPIRATE_SPI == 1
hailfinger9c5add72009-11-24 00:20:03 +0000285 {
hailfinger90c7d542010-05-31 15:27:27 +0000286 .name = "buspirate_spi",
Edward O'Callaghan0949b782019-11-10 23:23:20 +1100287 .type = OTHER,
288 /* FIXME */
289 .devs.note = "Dangerous Prototypes Bus Pirate\n",
hailfinger9c5add72009-11-24 00:20:03 +0000290 .init = buspirate_spi_init,
hailfinger9c5add72009-11-24 00:20:03 +0000291 .map_flash_region = fallback_map,
292 .unmap_flash_region = fallback_unmap,
hailfinger9c5add72009-11-24 00:20:03 +0000293 .delay = internal_delay,
294 },
295#endif
296
Edward O'Callaghande8b7632020-09-11 14:33:57 +1000297#if CONFIG_DEDIPROG == 1
Anton Staafb2647882014-09-17 15:13:43 -0700298 {
Edward O'Callaghande8b7632020-09-11 14:33:57 +1000299 .name = "dediprog",
Brian J. Nemecb42d6c12020-07-23 03:07:38 -0700300 .type = USB,
Edward O'Callaghanac1678b2020-07-27 15:55:45 +1000301 .devs.dev = devs_dediprog,
Edward O'Callaghande8b7632020-09-11 14:33:57 +1000302 .init = dediprog_init,
Anton Staafb2647882014-09-17 15:13:43 -0700303 .map_flash_region = fallback_map,
304 .unmap_flash_region = fallback_unmap,
305 .delay = internal_delay,
306 },
307#endif
308
Edward O'Callaghande8b7632020-09-11 14:33:57 +1000309#if CONFIG_DEVELOPERBOX_SPI == 1
hailfingerdfb32a02010-01-19 11:15:48 +0000310 {
Edward O'Callaghande8b7632020-09-11 14:33:57 +1000311 .name = "developerbox",
Edward O'Callaghan0949b782019-11-10 23:23:20 +1100312 .type = USB,
Edward O'Callaghande8b7632020-09-11 14:33:57 +1000313 .devs.dev = devs_developerbox_spi,
314 .init = developerbox_spi_init,
315 .map_flash_region = fallback_map,
316 .unmap_flash_region = fallback_unmap,
317 .delay = internal_delay,
318 },
319#endif
320
321#if CONFIG_ENE_LPC == 1
322 {
323 .name = "ene_lpc",
324 .type = OTHER,
325 .devs.note = "ENE LPC interface keyboard controller\n",
326 .init = ene_lpc_init,
hailfingerdfb32a02010-01-19 11:15:48 +0000327 .map_flash_region = fallback_map,
328 .unmap_flash_region = fallback_unmap,
hailfingerdfb32a02010-01-19 11:15:48 +0000329 .delay = internal_delay,
330 },
331#endif
332
hailfinger52c4fa02010-07-21 10:26:01 +0000333#if CONFIG_RAYER_SPI == 1
334 {
335 .name = "rayer_spi",
Edward O'Callaghan0949b782019-11-10 23:23:20 +1100336 .type = OTHER,
337 /* FIXME */
338 .devs.note = "RayeR parallel port programmer\n",
hailfinger52c4fa02010-07-21 10:26:01 +0000339 .init = rayer_spi_init,
hailfinger52c4fa02010-07-21 10:26:01 +0000340 .map_flash_region = fallback_map,
341 .unmap_flash_region = fallback_unmap,
hailfinger52c4fa02010-07-21 10:26:01 +0000342 .delay = internal_delay,
343 },
344#endif
345
Edward O'Callaghande8b7632020-09-11 14:33:57 +1000346#if CONFIG_PONY_SPI == 1
347 {
348 .name = "pony_spi",
349 .type = OTHER,
350 /* FIXME */
351 .devs.note = "Programmers compatible with SI-Prog, serbang or AJAWe\n",
352 .init = pony_spi_init,
353 .map_flash_region = fallback_map,
354 .unmap_flash_region = fallback_unmap,
355 .delay = internal_delay,
356 },
357#endif
358
hailfinger7949b652011-05-08 00:24:18 +0000359#if CONFIG_NICINTEL == 1
360 {
361 .name = "nicintel",
Edward O'Callaghan0949b782019-11-10 23:23:20 +1100362 .type = PCI,
363 .devs.dev = nics_intel,
hailfinger7949b652011-05-08 00:24:18 +0000364 .init = nicintel_init,
hailfinger7949b652011-05-08 00:24:18 +0000365 .map_flash_region = fallback_map,
366 .unmap_flash_region = fallback_unmap,
hailfinger7949b652011-05-08 00:24:18 +0000367 .delay = internal_delay,
368 },
369#endif
370
uwe6764e922010-09-03 18:21:21 +0000371#if CONFIG_NICINTEL_SPI == 1
372 {
uwe8d342eb2011-07-28 08:13:25 +0000373 .name = "nicintel_spi",
Edward O'Callaghan0949b782019-11-10 23:23:20 +1100374 .type = PCI,
375 .devs.dev = nics_intel_spi,
uwe8d342eb2011-07-28 08:13:25 +0000376 .init = nicintel_spi_init,
377 .map_flash_region = fallback_map,
378 .unmap_flash_region = fallback_unmap,
uwe8d342eb2011-07-28 08:13:25 +0000379 .delay = internal_delay,
uwe6764e922010-09-03 18:21:21 +0000380 },
381#endif
382
Edward O'Callaghande8b7632020-09-11 14:33:57 +1000383#if CONFIG_NICINTEL_EEPROM == 1
384 {
385 .name = "nicintel_eeprom",
386 .type = PCI,
387 .devs.dev = nics_intel_ee,
388 .init = nicintel_ee_init,
389 .map_flash_region = fallback_map,
390 .unmap_flash_region = fallback_unmap,
391 .delay = internal_delay,
392 },
393#endif
394
hailfingerfb1f31f2010-12-03 14:48:11 +0000395#if CONFIG_OGP_SPI == 1
396 {
uwe8d342eb2011-07-28 08:13:25 +0000397 .name = "ogp_spi",
Edward O'Callaghan0949b782019-11-10 23:23:20 +1100398 .type = PCI,
399 .devs.dev = ogp_spi,
uwe8d342eb2011-07-28 08:13:25 +0000400 .init = ogp_spi_init,
401 .map_flash_region = fallback_map,
402 .unmap_flash_region = fallback_unmap,
uwe8d342eb2011-07-28 08:13:25 +0000403 .delay = internal_delay,
hailfingerfb1f31f2010-12-03 14:48:11 +0000404 },
405#endif
406
hailfinger935365d2011-02-04 21:37:59 +0000407#if CONFIG_SATAMV == 1
408 {
409 .name = "satamv",
Edward O'Callaghan0949b782019-11-10 23:23:20 +1100410 .type = PCI,
411 .devs.dev = satas_mv,
hailfinger935365d2011-02-04 21:37:59 +0000412 .init = satamv_init,
hailfinger935365d2011-02-04 21:37:59 +0000413 .map_flash_region = fallback_map,
414 .unmap_flash_region = fallback_unmap,
hailfinger935365d2011-02-04 21:37:59 +0000415 .delay = internal_delay,
416 },
417#endif
418
David Hendrickscebee892015-05-23 20:30:30 -0700419#if CONFIG_LINUX_MTD == 1
420 {
421 .name = "linux_mtd",
Edward O'Callaghan0949b782019-11-10 23:23:20 +1100422 .type = OTHER,
423 .devs.note = "Device files /dev/mtd*\n",
David Hendrickscebee892015-05-23 20:30:30 -0700424 .init = linux_mtd_init,
425 .map_flash_region = fallback_map,
426 .unmap_flash_region = fallback_unmap,
427 .delay = internal_delay,
428 },
429#endif
430
uwe7df6dda2011-09-03 18:37:52 +0000431#if CONFIG_LINUX_SPI == 1
432 {
433 .name = "linux_spi",
Edward O'Callaghan0949b782019-11-10 23:23:20 +1100434 .type = OTHER,
435 .devs.note = "Device files /dev/spidev*.*\n",
uwe7df6dda2011-09-03 18:37:52 +0000436 .init = linux_spi_init,
437 .map_flash_region = fallback_map,
438 .unmap_flash_region = fallback_unmap,
uwe7df6dda2011-09-03 18:37:52 +0000439 .delay = internal_delay,
440 },
441#endif
442
Shiyu Sun9dde7162020-04-16 17:32:55 +1000443#if CONFIG_LSPCON_I2C_SPI == 1
444 {
445 .name = "lspcon_i2c_spi",
446 .type = OTHER,
447 .devs.note = "Device files /dev/i2c-*.\n",
448 .init = lspcon_i2c_spi_init,
449 .map_flash_region = fallback_map,
450 .unmap_flash_region = fallback_unmap,
451 .delay = internal_delay,
452 },
453#endif
454
Edward O'Callaghan97dd9262020-03-26 00:00:41 +1100455#if CONFIG_REALTEK_MST_I2C_SPI == 1
456 {
457 .name = "realtek_mst_i2c_spi",
458 .type = OTHER,
459 .devs.note = "Device files /dev/i2c-*.\n",
460 .init = realtek_mst_i2c_spi_init,
461 .map_flash_region = fallback_map,
462 .unmap_flash_region = fallback_unmap,
463 .delay = internal_delay,
464 },
465#endif
466
Edward O'Callaghande8b7632020-09-11 14:33:57 +1000467#if CONFIG_USBBLASTER_SPI == 1
468 {
469 .name = "usbblaster_spi",
470 .type = USB,
471 .devs.dev = devs_usbblasterspi,
472 .init = usbblaster_spi_init,
473 .map_flash_region = fallback_map,
474 .unmap_flash_region = fallback_unmap,
475 .delay = internal_delay,
476 },
477#endif
478
479#if CONFIG_MSTARDDC_SPI == 1
480 {
481 .name = "mstarddc_spi",
482 .type = OTHER,
483 .devs.note = "MSTAR DDC devices addressable via /dev/i2c-* on Linux.\n",
484 .init = mstarddc_spi_init,
485 .map_flash_region = fallback_map,
486 .unmap_flash_region = fallback_unmap,
487 .delay = internal_delay,
488 },
489#endif
490
491#if CONFIG_PICKIT2_SPI == 1
492 {
493 .name = "pickit2_spi",
494 .type = USB,
495 .devs.dev = devs_pickit2_spi,
496 .init = pickit2_spi_init,
497 .map_flash_region = fallback_map,
498 .unmap_flash_region = fallback_unmap,
499 .delay = internal_delay,
500 },
501#endif
502
503#if CONFIG_CH341A_SPI == 1
504 {
505 .name = "ch341a_spi",
506 .type = USB,
507 .devs.dev = devs_ch341a_spi,
508 .init = ch341a_spi_init,
509 .map_flash_region = fallback_map,
510 .unmap_flash_region = fallback_unmap,
511 .delay = ch341a_spi_delay,
512 },
513#endif
514
515#if CONFIG_DIGILENT_SPI == 1
516 {
517 .name = "digilent_spi",
518 .type = USB,
519 .devs.dev = devs_digilent_spi,
520 .init = digilent_spi_init,
521 .map_flash_region = fallback_map,
522 .unmap_flash_region = fallback_unmap,
523 .delay = internal_delay,
524 },
525#endif
526
527#if CONFIG_JLINK_SPI == 1
528 {
529 .name = "jlink_spi",
530 .type = OTHER,
531 .init = jlink_spi_init,
532 .devs.note = "SEGGER J-Link and compatible devices\n",
533 .map_flash_region = fallback_map,
534 .unmap_flash_region = fallback_unmap,
535 .delay = internal_delay,
536 },
537#endif
538
539#if CONFIG_NI845X_SPI == 1
540 {
541 .name = "ni845x_spi",
542 .type = OTHER, // choose other because NI-845x uses own USB implementation
543 .devs.note = "National Instruments USB-845x\n",
544 .init = ni845x_spi_init,
545 .map_flash_region = fallback_map,
546 .unmap_flash_region = fallback_unmap,
547 .delay = internal_delay,
548 },
549#endif
550
551#if CONFIG_STLINKV3_SPI == 1
552 {
553 .name = "stlinkv3_spi",
554 .type = USB,
555 .devs.dev = devs_stlinkv3_spi,
556 .init = stlinkv3_spi_init,
557 .map_flash_region = fallback_map,
558 .unmap_flash_region = fallback_unmap,
559 .delay = internal_delay,
560 },
561#endif
562
Edward O'Callaghand8f72232020-09-30 14:21:42 +1000563#if CONFIG_GOOGLE_EC == 1
564 {
565 .name = "google_ec",
566 .type = OTHER,
567 .devs.note = "Google EC.\n",
568 .init = cros_ec_probe_dev,
569 .map_flash_region = fallback_map,
570 .unmap_flash_region = fallback_unmap,
571 .delay = internal_delay,
572 },
573#endif
574
Edward O'Callaghanda29ca82020-10-20 00:49:47 +1100575#if CONFIG_CROS_ALIAS == 1
576 {
577 .name = "ec",
578 .type = OTHER,
579 .devs.note = "Google EC alias mechanism.\n",
580 .init = cros_ec_alias_init,
581 .map_flash_region = physmap, /* TODO(b/171934191) */
582 .unmap_flash_region = physunmap, /* TODO(b/171934191) */
583 .delay = internal_delay,
584
585 /*
586 * "ec" implies in-system programming on a live system, so
587 * handle with paranoia to catch errors early. If something goes
588 * wrong then hopefully the system will still be recoverable.
589 */
590 .paranoid = 1,
591 },
Edward O'Callaghan5b16a082020-10-20 16:30:16 +1100592
593 {
594 .name = "host",
595 .type = OTHER,
596 .devs.note = "Google host alias mechanism.\n",
597 .init = cros_host_alias_init,
598 .map_flash_region = physmap,
599 .unmap_flash_region = physunmap,
600 .delay = internal_delay,
601
602 /*
603 * "Internal" implies in-system programming on a live system, so
604 * handle with paranoia to catch errors early. If something goes
605 * wrong then hopefully the system will still be recoverable.
606 */
607 .paranoid = 1,
608 },
Edward O'Callaghanda29ca82020-10-20 00:49:47 +1100609#endif
610
Patrick Georgi8ddfee92017-03-20 14:54:28 +0100611 {0}, /* This entry corresponds to PROGRAMMER_INVALID. */
hailfingerabe249e2009-05-08 17:43:22 +0000612};
stepan927d4e22007-04-04 22:45:58 +0000613
hailfingerf31cbdc2010-11-10 15:25:18 +0000614#define SHUTDOWN_MAXFN 32
hailfingerdc6f7972010-02-14 01:20:28 +0000615static int shutdown_fn_count = 0;
Edward O'Callaghande8b7632020-09-11 14:33:57 +1000616/** @private */
Edward O'Callaghan60df9dd2019-09-03 14:28:48 +1000617static struct shutdown_func_data {
David Hendricks93784b42016-08-09 17:00:38 -0700618 int (*func) (void *data);
hailfingerdc6f7972010-02-14 01:20:28 +0000619 void *data;
Edward O'Callaghan60df9dd2019-09-03 14:28:48 +1000620} shutdown_fn[SHUTDOWN_MAXFN];
hailfinger1ff33dc2010-07-03 11:02:10 +0000621/* Initialize to 0 to make sure nobody registers a shutdown function before
622 * programmer init.
623 */
624static int may_register_shutdown = 0;
hailfingerdc6f7972010-02-14 01:20:28 +0000625
Daniel Campellofbee2142021-04-20 16:09:09 -0600626/* Did we change something or was every erase/write skipped (if any)? */
627static bool all_skipped = true;
628
Souvik Ghoshd75cd672016-06-17 14:21:39 -0700629static int check_block_eraser(const struct flashctx *flash, int k, int log);
stefanct569dbb62011-07-01 00:19:12 +0000630
hailfingerdc6f7972010-02-14 01:20:28 +0000631/* Register a function to be executed on programmer shutdown.
632 * The advantage over atexit() is that you can supply a void pointer which will
633 * be used as parameter to the registered function upon programmer shutdown.
634 * This pointer can point to arbitrary data used by said function, e.g. undo
635 * information for GPIO settings etc. If unneeded, set data=NULL.
636 * Please note that the first (void *data) belongs to the function signature of
637 * the function passed as first parameter.
638 */
David Hendricks93784b42016-08-09 17:00:38 -0700639int register_shutdown(int (*function) (void *data), void *data)
hailfingerdc6f7972010-02-14 01:20:28 +0000640{
641 if (shutdown_fn_count >= SHUTDOWN_MAXFN) {
hailfinger63932d42010-06-04 23:20:21 +0000642 msg_perr("Tried to register more than %i shutdown functions.\n",
hailfingerdc6f7972010-02-14 01:20:28 +0000643 SHUTDOWN_MAXFN);
644 return 1;
645 }
hailfinger1ff33dc2010-07-03 11:02:10 +0000646 if (!may_register_shutdown) {
647 msg_perr("Tried to register a shutdown function before "
648 "programmer init.\n");
649 return 1;
650 }
hailfingerdc6f7972010-02-14 01:20:28 +0000651 shutdown_fn[shutdown_fn_count].func = function;
652 shutdown_fn[shutdown_fn_count].data = data;
653 shutdown_fn_count++;
654
655 return 0;
656}
657
Nikolai Artemiev55f7a332020-11-05 13:54:27 +1100658int register_chip_restore(chip_restore_fn_cb_t func,
659 struct flashctx *flash, uint8_t status)
660{
661 if (flash->chip_restore_fn_count >= MAX_CHIP_RESTORE_FUNCTIONS) {
662 msg_perr("Tried to register more than %i chip restore"
663 " functions.\n", MAX_CHIP_RESTORE_FUNCTIONS);
664 return 1;
665 }
666 flash->chip_restore_fn[flash->chip_restore_fn_count].func = func;
667 flash->chip_restore_fn[flash->chip_restore_fn_count].status = status;
668 flash->chip_restore_fn_count++;
669
670 return 0;
671}
672
673static int deregister_chip_restore(struct flashctx *flash)
674{
675 int rc = 0;
676
677 while (flash->chip_restore_fn_count > 0) {
678 int i = --flash->chip_restore_fn_count;
679 rc |= flash->chip_restore_fn[i].func(
680 flash, flash->chip_restore_fn[i].status);
681 }
682
683 return rc;
684}
685
Edward O'Callaghanb2257cc2020-07-25 22:19:47 +1000686int programmer_init(enum programmer prog, const char *param)
uweabe92a52009-05-16 22:36:00 +0000687{
hailfinger1ef766d2010-07-06 09:55:48 +0000688 int ret;
hailfinger969e2f32011-09-08 00:00:29 +0000689
690 if (prog >= PROGRAMMER_INVALID) {
691 msg_perr("Invalid programmer specified!\n");
692 return -1;
693 }
694 programmer = prog;
hailfinger1ff33dc2010-07-03 11:02:10 +0000695 /* Initialize all programmer specific data. */
696 /* Default to unlimited decode sizes. */
697 max_rom_decode = (const struct decode_sizes) {
698 .parallel = 0xffffffff,
699 .lpc = 0xffffffff,
700 .fwh = 0xffffffff,
uwe8d342eb2011-07-28 08:13:25 +0000701 .spi = 0xffffffff,
hailfinger1ff33dc2010-07-03 11:02:10 +0000702 };
hailfinger1ff33dc2010-07-03 11:02:10 +0000703 /* Default to top aligned flash at 4 GB. */
704 flashbase = 0;
705 /* Registering shutdown functions is now allowed. */
706 may_register_shutdown = 1;
hailfinger5828baf2010-07-03 12:14:25 +0000707 /* Default to allowing writes. Broken programmers set this to 0. */
708 programmer_may_write = 1;
hailfinger1ff33dc2010-07-03 11:02:10 +0000709
710 programmer_param = param;
Edward O'Callaghanb2257cc2020-07-25 22:19:47 +1000711 msg_pdbg("Initializing %s programmer\n", programmer_table[programmer].name);
David Hendricksac1d25c2016-08-09 17:00:58 -0700712 ret = programmer_table[programmer].init();
Nikolai Artemiev7d9c8ff2020-08-31 14:42:59 +1000713 if (programmer_param && strlen(programmer_param)) {
714 if (ret != 0) {
715 /* It is quite possible that any unhandled programmer parameter would have been valid,
716 * but an error in actual programmer init happened before the parameter was evaluated.
717 */
718 msg_pwarn("Unhandled programmer parameters (possibly due to another failure): %s\n",
719 programmer_param);
720 } else {
721 /* Actual programmer init was successful, but the user specified an invalid or unusable
722 * (for the current programmer configuration) parameter.
723 */
724 msg_perr("Unhandled programmer parameters: %s\n", programmer_param);
725 msg_perr("Aborting.\n");
726 ret = ERROR_FATAL;
727 }
728 }
hailfinger1ef766d2010-07-06 09:55:48 +0000729 return ret;
uweabe92a52009-05-16 22:36:00 +0000730}
731
Edward O'Callaghanb2257cc2020-07-25 22:19:47 +1000732/** Calls registered shutdown functions and resets internal programmer-related variables.
733 * Calling it is safe even without previous initialization, but further interactions with programmer support
734 * require a call to programmer_init() (afterwards).
735 *
736 * @return The OR-ed result values of all shutdown functions (i.e. 0 on success). */
David Hendricks93784b42016-08-09 17:00:38 -0700737int programmer_shutdown(void)
uweabe92a52009-05-16 22:36:00 +0000738{
dhendrix0ffc2eb2011-06-14 01:35:36 +0000739 int ret = 0;
740
hailfinger1ff33dc2010-07-03 11:02:10 +0000741 /* Registering shutdown functions is no longer allowed. */
742 may_register_shutdown = 0;
743 while (shutdown_fn_count > 0) {
744 int i = --shutdown_fn_count;
David Hendricks93784b42016-08-09 17:00:38 -0700745 ret |= shutdown_fn[i].func(shutdown_fn[i].data);
hailfinger1ff33dc2010-07-03 11:02:10 +0000746 }
Edward O'Callaghancf9c40f2020-10-19 20:02:39 +1100747
748 programmer_param = NULL;
749 registered_master_count = 0;
750
dhendrix0ffc2eb2011-06-14 01:35:36 +0000751 return ret;
uweabe92a52009-05-16 22:36:00 +0000752}
753
Edward O'Callaghana5cfb4d2020-09-07 16:26:42 +1000754void *programmer_map_flash_region(const char *descr, uintptr_t phys_addr, size_t len)
uweabe92a52009-05-16 22:36:00 +0000755{
Edward O'Callaghana5cfb4d2020-09-07 16:26:42 +1000756 void *ret = programmer_table[programmer].map_flash_region(descr, phys_addr, len);
Edward O'Callaghanea9e2452020-12-18 11:01:38 +1100757 msg_gspew("%s: mapping %s from 0x%0*" PRIxPTR " to 0x%0*" PRIxPTR "\n",
758 __func__, descr, PRIxPTR_WIDTH, phys_addr, PRIxPTR_WIDTH, (uintptr_t) ret);
Edward O'Callaghana5cfb4d2020-09-07 16:26:42 +1000759 return ret;
uweabe92a52009-05-16 22:36:00 +0000760}
761
762void programmer_unmap_flash_region(void *virt_addr, size_t len)
763{
764 programmer_table[programmer].unmap_flash_region(virt_addr, len);
Edward O'Callaghan79357b32020-08-02 01:24:58 +1000765 msg_gspew("%s: unmapped 0x%0*" PRIxPTR "\n", __func__, PRIxPTR_WIDTH, (uintptr_t)virt_addr);
uweabe92a52009-05-16 22:36:00 +0000766}
767
Souvik Ghoshd75cd672016-06-17 14:21:39 -0700768void chip_writeb(const struct flashctx *flash, uint8_t val, chipaddr addr)
uweabe92a52009-05-16 22:36:00 +0000769{
Edward O'Callaghanc66827e2020-10-09 12:22:04 +1100770 flash->mst->par.chip_writeb(flash, val, addr);
uweabe92a52009-05-16 22:36:00 +0000771}
772
Souvik Ghoshd75cd672016-06-17 14:21:39 -0700773void chip_writew(const struct flashctx *flash, uint16_t val, chipaddr addr)
uweabe92a52009-05-16 22:36:00 +0000774{
Edward O'Callaghanc66827e2020-10-09 12:22:04 +1100775 flash->mst->par.chip_writew(flash, val, addr);
uweabe92a52009-05-16 22:36:00 +0000776}
777
Souvik Ghoshd75cd672016-06-17 14:21:39 -0700778void chip_writel(const struct flashctx *flash, uint32_t val, chipaddr addr)
uweabe92a52009-05-16 22:36:00 +0000779{
Edward O'Callaghanc66827e2020-10-09 12:22:04 +1100780 flash->mst->par.chip_writel(flash, val, addr);
uweabe92a52009-05-16 22:36:00 +0000781}
782
Stuart langleyc98e43f2020-03-26 20:27:36 +1100783void chip_writen(const struct flashctx *flash, const uint8_t *buf, chipaddr addr, size_t len)
hailfinger9d987ef2009-06-05 18:32:07 +0000784{
Edward O'Callaghanc66827e2020-10-09 12:22:04 +1100785 flash->mst->par.chip_writen(flash, buf, addr, len);
hailfinger9d987ef2009-06-05 18:32:07 +0000786}
787
Souvik Ghoshd75cd672016-06-17 14:21:39 -0700788uint8_t chip_readb(const struct flashctx *flash, const chipaddr addr)
uweabe92a52009-05-16 22:36:00 +0000789{
Edward O'Callaghanc66827e2020-10-09 12:22:04 +1100790 return flash->mst->par.chip_readb(flash, addr);
uweabe92a52009-05-16 22:36:00 +0000791}
792
Souvik Ghoshd75cd672016-06-17 14:21:39 -0700793uint16_t chip_readw(const struct flashctx *flash, const chipaddr addr)
uweabe92a52009-05-16 22:36:00 +0000794{
Edward O'Callaghanc66827e2020-10-09 12:22:04 +1100795 return flash->mst->par.chip_readw(flash, addr);
uweabe92a52009-05-16 22:36:00 +0000796}
797
Souvik Ghoshd75cd672016-06-17 14:21:39 -0700798uint32_t chip_readl(const struct flashctx *flash, const chipaddr addr)
uweabe92a52009-05-16 22:36:00 +0000799{
Edward O'Callaghanc66827e2020-10-09 12:22:04 +1100800 return flash->mst->par.chip_readl(flash, addr);
uweabe92a52009-05-16 22:36:00 +0000801}
802
Edward O'Callaghana5cfb4d2020-09-07 16:26:42 +1000803void chip_readn(const struct flashctx *flash, uint8_t *buf, chipaddr addr,
804 size_t len)
hailfinger9d987ef2009-06-05 18:32:07 +0000805{
Edward O'Callaghanc66827e2020-10-09 12:22:04 +1100806 flash->mst->par.chip_readn(flash, buf, addr, len);
hailfinger9d987ef2009-06-05 18:32:07 +0000807}
808
Edward O'Callaghanc4d1f1c2020-04-17 13:27:23 +1000809void programmer_delay(unsigned int usecs)
hailfingere5829f62009-06-05 17:48:08 +0000810{
Urja Rannikko71cc94f2013-10-21 21:49:08 +0000811 if (usecs > 0)
812 programmer_table[programmer].delay(usecs);
hailfingere5829f62009-06-05 17:48:08 +0000813}
814
Edward O'Callaghana820b212020-09-17 22:53:26 +1000815int read_memmapped(struct flashctx *flash, uint8_t *buf, unsigned int start,
816 int unsigned len)
hailfinger23060112009-05-08 12:49:03 +0000817{
Souvik Ghoshd75cd672016-06-17 14:21:39 -0700818 chip_readn(flash, buf, flash->virtual_memory + start, len);
uwe8d342eb2011-07-28 08:13:25 +0000819
hailfinger23060112009-05-08 12:49:03 +0000820 return 0;
821}
822
Nikolai Artemiev7d9c8ff2020-08-31 14:42:59 +1000823/* This is a somewhat hacked function similar in some ways to strtok().
824 * It will look for needle with a subsequent '=' in haystack, return a copy of
825 * needle and remove everything from the first occurrence of needle to the next
826 * delimiter from haystack.
hailfinger6e5a52a2009-11-24 18:27:10 +0000827 */
Edward O'Callaghanc4d1f1c2020-04-17 13:27:23 +1000828char *extract_param(const char *const *haystack, const char *needle, const char *delim)
hailfinger6e5a52a2009-11-24 18:27:10 +0000829{
Nikolai Artemiev7d9c8ff2020-08-31 14:42:59 +1000830 char *param_pos, *opt_pos, *rest;
hailfinger1ef766d2010-07-06 09:55:48 +0000831 char *opt = NULL;
832 int optlen;
hailfingerf4aaccc2010-04-28 15:22:14 +0000833 int needlelen;
hailfinger6e5a52a2009-11-24 18:27:10 +0000834
hailfingerf4aaccc2010-04-28 15:22:14 +0000835 needlelen = strlen(needle);
836 if (!needlelen) {
837 msg_gerr("%s: empty needle! Please report a bug at "
838 "flashrom@flashrom.org\n", __func__);
839 return NULL;
840 }
841 /* No programmer parameters given. */
842 if (*haystack == NULL)
843 return NULL;
hailfinger6e5a52a2009-11-24 18:27:10 +0000844 param_pos = strstr(*haystack, needle);
845 do {
846 if (!param_pos)
847 return NULL;
hailfinger1ef766d2010-07-06 09:55:48 +0000848 /* Needle followed by '='? */
849 if (param_pos[needlelen] == '=') {
hailfinger1ef766d2010-07-06 09:55:48 +0000850 /* Beginning of the string? */
851 if (param_pos == *haystack)
852 break;
853 /* After a delimiter? */
854 if (strchr(delim, *(param_pos - 1)))
855 break;
856 }
hailfinger6e5a52a2009-11-24 18:27:10 +0000857 /* Continue searching. */
858 param_pos++;
859 param_pos = strstr(param_pos, needle);
860 } while (1);
uwe8d342eb2011-07-28 08:13:25 +0000861
hailfinger6e5a52a2009-11-24 18:27:10 +0000862 if (param_pos) {
hailfinger1ef766d2010-07-06 09:55:48 +0000863 /* Get the string after needle and '='. */
864 opt_pos = param_pos + needlelen + 1;
865 optlen = strcspn(opt_pos, delim);
866 /* Return an empty string if the parameter was empty. */
867 opt = malloc(optlen + 1);
868 if (!opt) {
snelsone42c3802010-05-07 20:09:04 +0000869 msg_gerr("Out of memory!\n");
hailfinger6e5a52a2009-11-24 18:27:10 +0000870 exit(1);
871 }
hailfinger1ef766d2010-07-06 09:55:48 +0000872 strncpy(opt, opt_pos, optlen);
873 opt[optlen] = '\0';
Nikolai Artemiev7d9c8ff2020-08-31 14:42:59 +1000874 rest = opt_pos + optlen;
875 /* Skip all delimiters after the current parameter. */
876 rest += strspn(rest, delim);
877 memmove(param_pos, rest, strlen(rest) + 1);
878 /* We could shrink haystack, but the effort is not worth it. */
hailfinger6e5a52a2009-11-24 18:27:10 +0000879 }
hailfinger6e5a52a2009-11-24 18:27:10 +0000880
hailfinger1ef766d2010-07-06 09:55:48 +0000881 return opt;
hailfinger6e5a52a2009-11-24 18:27:10 +0000882}
883
Edward O'Callaghana5cfb4d2020-09-07 16:26:42 +1000884char *extract_programmer_param(const char *param_name)
hailfingerddeb4ac2010-07-08 10:13:37 +0000885{
886 return extract_param(&programmer_param, param_name, ",");
887}
888
stefancte1c5acf2011-07-04 07:27:17 +0000889/* Returns the number of well-defined erasers for a chip. */
Souvik Ghoshd75cd672016-06-17 14:21:39 -0700890static unsigned int count_usable_erasers(const struct flashctx *flash)
stefanct569dbb62011-07-01 00:19:12 +0000891{
892 unsigned int usable_erasefunctions = 0;
893 int k;
894 for (k = 0; k < NUM_ERASEFUNCTIONS; k++) {
895 if (!check_block_eraser(flash, k, 0))
896 usable_erasefunctions++;
897 }
898 return usable_erasefunctions;
899}
900
Edward O'Callaghan445b48b2020-08-13 12:25:17 +1000901static int compare_range(const uint8_t *wantbuf, const uint8_t *havebuf, unsigned int start, unsigned int len)
Simon Glass4e305f42015-01-08 06:29:04 -0700902{
Edward O'Callaghan445b48b2020-08-13 12:25:17 +1000903 int ret = 0, failcount = 0;
904 unsigned int i;
Simon Glass4e305f42015-01-08 06:29:04 -0700905 for (i = 0; i < len; i++) {
Edward O'Callaghan445b48b2020-08-13 12:25:17 +1000906 if (wantbuf[i] != havebuf[i]) {
907 /* Only print the first failure. */
908 if (!failcount++)
909 msg_cerr("FAILED at 0x%08x! Expected=0x%02x, Found=0x%02x,",
910 start + i, wantbuf[i], havebuf[i]);
Simon Glass4e305f42015-01-08 06:29:04 -0700911 }
912 }
Edward O'Callaghan445b48b2020-08-13 12:25:17 +1000913 if (failcount) {
914 msg_cerr(" failed byte count from 0x%08x-0x%08x: 0x%x\n",
915 start, start + len - 1, failcount);
916 ret = -1;
917 }
918 return ret;
Simon Glass4e305f42015-01-08 06:29:04 -0700919}
920
Edward O'Callaghanfcd4b412020-08-19 14:44:44 +1000921/* start is an offset to the base address of the flash chip */
922static int check_erased_range(struct flashctx *flash, unsigned int start, unsigned int len)
923{
924 int ret;
925 uint8_t *cmpbuf = malloc(len);
926 const uint8_t erased_value = ERASED_VALUE(flash);
927
928 if (!cmpbuf) {
929 msg_gerr("Could not allocate memory!\n");
930 exit(1);
931 }
932 memset(cmpbuf, erased_value, len);
933 ret = verify_range(flash, cmpbuf, start, len);
934 free(cmpbuf);
935 return ret;
936}
937
uwee15beb92010-08-08 17:01:18 +0000938/*
hailfinger7af3d192009-11-25 17:05:52 +0000939 * @cmpbuf buffer to compare against, cmpbuf[0] is expected to match the
uwe8d342eb2011-07-28 08:13:25 +0000940 * flash content at location start
hailfinger7af83692009-06-15 17:23:36 +0000941 * @start offset to the base address of the flash chip
942 * @len length of the verified area
hailfinger7af83692009-06-15 17:23:36 +0000943 * @return 0 for success, -1 for failure
944 */
Edward O'Callaghan445b48b2020-08-13 12:25:17 +1000945int verify_range(struct flashctx *flash, const uint8_t *cmpbuf, unsigned int start, unsigned int len)
hailfinger7af83692009-06-15 17:23:36 +0000946{
hailfinger7af83692009-06-15 17:23:36 +0000947 if (!len)
Edward O'Callaghan2bd87622020-08-13 13:58:45 +1000948 return -1;
hailfinger7af83692009-06-15 17:23:36 +0000949
Patrick Georgif3fa2992017-02-02 16:24:44 +0100950 if (!flash->chip->read) {
snelsone42c3802010-05-07 20:09:04 +0000951 msg_cerr("ERROR: flashrom has no read function for this flash chip.\n");
Edward O'Callaghan2bd87622020-08-13 13:58:45 +1000952 return -1;
hailfingerb0f4d122009-06-24 08:20:45 +0000953 }
Edward O'Callaghan2bd87622020-08-13 13:58:45 +1000954
955 uint8_t *readbuf = malloc(len);
hailfinger7af83692009-06-15 17:23:36 +0000956 if (!readbuf) {
snelsone42c3802010-05-07 20:09:04 +0000957 msg_gerr("Could not allocate memory!\n");
Edward O'Callaghan2bd87622020-08-13 13:58:45 +1000958 return -1;
hailfinger7af83692009-06-15 17:23:36 +0000959 }
Edward O'Callaghan2bd87622020-08-13 13:58:45 +1000960 int ret = 0, failcount = 0;
hailfinger7af83692009-06-15 17:23:36 +0000961
Patrick Georgif3fa2992017-02-02 16:24:44 +0100962 if (start + len > flash->chip->total_size * 1024) {
snelsone42c3802010-05-07 20:09:04 +0000963 msg_gerr("Error: %s called with start 0x%x + len 0x%x >"
hailfinger7af83692009-06-15 17:23:36 +0000964 " total_size 0x%x\n", __func__, start, len,
Patrick Georgif3fa2992017-02-02 16:24:44 +0100965 flash->chip->total_size * 1024);
hailfinger7af83692009-06-15 17:23:36 +0000966 ret = -1;
967 goto out_free;
968 }
Vadim Bendebury2b4dcef2018-05-21 10:47:18 -0700969 msg_gdbg("%#06x..%#06x ", start, start + len -1);
Simon Glass4e305f42015-01-08 06:29:04 -0700970 if (programmer_table[programmer].paranoid) {
971 unsigned int i, chunksize;
David Hendricks1ed1d352011-11-23 17:54:37 -0800972
Simon Glass4e305f42015-01-08 06:29:04 -0700973 /* limit chunksize in order to catch errors early */
974 for (i = 0, chunksize = 0; i < len; i += chunksize) {
975 int tmp;
Douglas Anderson81e58f12021-02-01 13:16:08 -0800976 int chk_acc = 0;
David Hendricks1ed1d352011-11-23 17:54:37 -0800977
Douglas Anderson81e58f12021-02-01 13:16:08 -0800978 /*
979 * Let's work in chunks of at least 4096 bytes at a
980 * time to balance reacting fast but still avoiding the
981 * overhead of working at a smaller size if page_size is
982 * something like 256 bytes.
983 */
984 chunksize = max(flash->chip->page_size, 4096);
985 chunksize = min(chunksize, len - i);
986
987 /*
988 * If we don't have access to some part of this chunk
989 * then bring the size back down to page_size.
990 */
991 if (flash->chip->check_access) {
992 chk_acc = flash->chip->check_access(flash, start + i, chunksize, 0);
993 if (chk_acc) {
994 chunksize = min(chunksize, flash->chip->page_size);
995 chk_acc = flash->chip->check_access(flash, start + i, chunksize, 0);
996 }
997 }
998
Patrick Georgif3fa2992017-02-02 16:24:44 +0100999 tmp = flash->chip->read(flash, readbuf + i, start + i, chunksize);
Simon Glass4e305f42015-01-08 06:29:04 -07001000 if (tmp) {
1001 ret = tmp;
1002 if (ignore_error(tmp))
1003 continue;
1004 else
1005 goto out_free;
David Hendricks1ed1d352011-11-23 17:54:37 -08001006 }
Simon Glass4e305f42015-01-08 06:29:04 -07001007
Duncan Laurie25a4ca22019-04-25 12:08:52 -07001008 /*
1009 * Check write access permission and do not compare chunks
1010 * where flashrom does not have write access to the region.
1011 */
Douglas Anderson81e58f12021-02-01 13:16:08 -08001012 if (chk_acc && ignore_error(chk_acc))
1013 continue;
Duncan Laurie25a4ca22019-04-25 12:08:52 -07001014
Edward O'Callaghan445b48b2020-08-13 12:25:17 +10001015 failcount = compare_range(cmpbuf + i, readbuf + i, start + i, chunksize);
Simon Glass4e305f42015-01-08 06:29:04 -07001016 if (failcount)
1017 break;
David Hendricks1ed1d352011-11-23 17:54:37 -08001018 }
Simon Glass4e305f42015-01-08 06:29:04 -07001019 } else {
1020 int tmp;
1021
1022 /* read as much as we can to reduce transaction overhead */
Patrick Georgif3fa2992017-02-02 16:24:44 +01001023 tmp = flash->chip->read(flash, readbuf, start, len);
Simon Glass4e305f42015-01-08 06:29:04 -07001024 if (tmp && !ignore_error(tmp)) {
1025 ret = tmp;
1026 goto out_free;
1027 }
1028
Edward O'Callaghan445b48b2020-08-13 12:25:17 +10001029 failcount = compare_range(cmpbuf, readbuf, start, len);
hailfinger8cb6ece2010-11-16 17:21:58 +00001030 }
1031
hailfinger5be6c0f2009-07-23 01:42:56 +00001032 if (failcount) {
snelsone42c3802010-05-07 20:09:04 +00001033 msg_cerr(" failed byte count from 0x%08x-0x%08x: 0x%x\n",
uwe8d342eb2011-07-28 08:13:25 +00001034 start, start + len - 1, failcount);
hailfinger5be6c0f2009-07-23 01:42:56 +00001035 ret = -1;
1036 }
hailfinger7af83692009-06-15 17:23:36 +00001037
1038out_free:
1039 free(readbuf);
1040 return ret;
1041}
1042
Edward O'Callaghand8eca562019-02-24 21:10:33 +11001043/* Helper function for need_erase() that focuses on granularities of gran bytes. */
1044static int need_erase_gran_bytes(const uint8_t *have, const uint8_t *want, unsigned int len,
Edward O'Callaghan65891c82020-09-07 12:33:06 +10001045 unsigned int gran, const uint8_t erased_value)
Edward O'Callaghand8eca562019-02-24 21:10:33 +11001046{
1047 unsigned int i, j, limit;
1048 for (j = 0; j < len / gran; j++) {
1049 limit = min (gran, len - j * gran);
1050 /* Are 'have' and 'want' identical? */
1051 if (!memcmp(have + j * gran, want + j * gran, limit))
1052 continue;
1053 /* have needs to be in erased state. */
1054 for (i = 0; i < limit; i++)
Edward O'Callaghan65891c82020-09-07 12:33:06 +10001055 if (have[j * gran + i] != erased_value)
Edward O'Callaghand8eca562019-02-24 21:10:33 +11001056 return 1;
1057 }
1058 return 0;
1059}
1060
uwee15beb92010-08-08 17:01:18 +00001061/*
hailfingerb247c7a2010-03-08 00:42:32 +00001062 * Check if the buffer @have can be programmed to the content of @want without
1063 * erasing. This is only possible if all chunks of size @gran are either kept
1064 * as-is or changed from an all-ones state to any other state.
hailfingerb437e282010-11-04 01:04:27 +00001065 *
hailfingerb437e282010-11-04 01:04:27 +00001066 * Warning: This function assumes that @have and @want point to naturally
1067 * aligned regions.
hailfingerb247c7a2010-03-08 00:42:32 +00001068 *
1069 * @have buffer with current content
1070 * @want buffer with desired content
hailfingerb437e282010-11-04 01:04:27 +00001071 * @len length of the checked area
hailfingerb247c7a2010-03-08 00:42:32 +00001072 * @gran write granularity (enum, not count)
1073 * @return 0 if no erase is needed, 1 otherwise
1074 */
Edward O'Callaghanaccf9ff2021-01-22 01:33:03 +11001075static int need_erase(const uint8_t *have, const uint8_t *want, unsigned int len,
Edward O'Callaghan65891c82020-09-07 12:33:06 +10001076 enum write_granularity gran, const uint8_t erased_value)
hailfingerb247c7a2010-03-08 00:42:32 +00001077{
hailfingerb91c08c2011-08-15 19:54:20 +00001078 int result = 0;
Edward O'Callaghand8eca562019-02-24 21:10:33 +11001079 unsigned int i;
William A. Kennington IIIf15c2fa2017-04-07 17:38:42 -07001080
hailfingerb247c7a2010-03-08 00:42:32 +00001081 switch (gran) {
1082 case write_gran_1bit:
1083 for (i = 0; i < len; i++)
1084 if ((have[i] & want[i]) != want[i]) {
1085 result = 1;
1086 break;
1087 }
1088 break;
1089 case write_gran_1byte:
1090 for (i = 0; i < len; i++)
Edward O'Callaghan65891c82020-09-07 12:33:06 +10001091 if ((have[i] != want[i]) && (have[i] != erased_value)) {
hailfingerb247c7a2010-03-08 00:42:32 +00001092 result = 1;
1093 break;
1094 }
1095 break;
Edward O'Callaghand8eca562019-02-24 21:10:33 +11001096 case write_gran_128bytes:
Edward O'Callaghan65891c82020-09-07 12:33:06 +10001097 result = need_erase_gran_bytes(have, want, len, 128, erased_value);
Edward O'Callaghand8eca562019-02-24 21:10:33 +11001098 break;
hailfingerb247c7a2010-03-08 00:42:32 +00001099 case write_gran_256bytes:
Edward O'Callaghan65891c82020-09-07 12:33:06 +10001100 result = need_erase_gran_bytes(have, want, len, 256, erased_value);
Edward O'Callaghand8eca562019-02-24 21:10:33 +11001101 break;
1102 case write_gran_264bytes:
Edward O'Callaghan65891c82020-09-07 12:33:06 +10001103 result = need_erase_gran_bytes(have, want, len, 264, erased_value);
Edward O'Callaghand8eca562019-02-24 21:10:33 +11001104 break;
1105 case write_gran_512bytes:
Edward O'Callaghan65891c82020-09-07 12:33:06 +10001106 result = need_erase_gran_bytes(have, want, len, 512, erased_value);
Edward O'Callaghand8eca562019-02-24 21:10:33 +11001107 break;
1108 case write_gran_528bytes:
Edward O'Callaghan65891c82020-09-07 12:33:06 +10001109 result = need_erase_gran_bytes(have, want, len, 528, erased_value);
Edward O'Callaghand8eca562019-02-24 21:10:33 +11001110 break;
1111 case write_gran_1024bytes:
Edward O'Callaghan65891c82020-09-07 12:33:06 +10001112 result = need_erase_gran_bytes(have, want, len, 1024, erased_value);
Edward O'Callaghand8eca562019-02-24 21:10:33 +11001113 break;
1114 case write_gran_1056bytes:
Edward O'Callaghan65891c82020-09-07 12:33:06 +10001115 result = need_erase_gran_bytes(have, want, len, 1056, erased_value);
Edward O'Callaghand8eca562019-02-24 21:10:33 +11001116 break;
1117 case write_gran_1byte_implicit_erase:
1118 /* Do not erase, handle content changes from anything->0xff by writing 0xff. */
1119 result = 0;
hailfingerb247c7a2010-03-08 00:42:32 +00001120 break;
hailfingerb437e282010-11-04 01:04:27 +00001121 default:
1122 msg_cerr("%s: Unsupported granularity! Please report a bug at "
1123 "flashrom@flashrom.org\n", __func__);
hailfingerb247c7a2010-03-08 00:42:32 +00001124 }
1125 return result;
1126}
1127
hailfingerb437e282010-11-04 01:04:27 +00001128/**
1129 * Check if the buffer @have needs to be programmed to get the content of @want.
1130 * If yes, return 1 and fill in first_start with the start address of the
1131 * write operation and first_len with the length of the first to-be-written
1132 * chunk. If not, return 0 and leave first_start and first_len undefined.
1133 *
1134 * Warning: This function assumes that @have and @want point to naturally
1135 * aligned regions.
1136 *
1137 * @have buffer with current content
1138 * @want buffer with desired content
1139 * @len length of the checked area
1140 * @gran write granularity (enum, not count)
hailfinger90fcf9b2010-11-05 14:51:59 +00001141 * @first_start offset of the first byte which needs to be written (passed in
1142 * value is increased by the offset of the first needed write
1143 * relative to have/want or unchanged if no write is needed)
1144 * @return length of the first contiguous area which needs to be written
1145 * 0 if no write is needed
hailfingerb437e282010-11-04 01:04:27 +00001146 *
1147 * FIXME: This function needs a parameter which tells it about coalescing
1148 * in relation to the max write length of the programmer and the max write
1149 * length of the chip.
1150 */
Edward O'Callaghanb2257cc2020-07-25 22:19:47 +10001151static unsigned int get_next_write(const uint8_t *have, const uint8_t *want, unsigned int len,
stefanctc5eb8a92011-11-23 09:13:48 +00001152 unsigned int *first_start,
1153 enum write_granularity gran)
hailfingerb437e282010-11-04 01:04:27 +00001154{
stefanctc5eb8a92011-11-23 09:13:48 +00001155 int need_write = 0;
1156 unsigned int rel_start = 0, first_len = 0;
1157 unsigned int i, limit, stride;
hailfingerb437e282010-11-04 01:04:27 +00001158
hailfingerb437e282010-11-04 01:04:27 +00001159 switch (gran) {
1160 case write_gran_1bit:
1161 case write_gran_1byte:
Edward O'Callaghand8eca562019-02-24 21:10:33 +11001162 case write_gran_1byte_implicit_erase:
hailfinger90fcf9b2010-11-05 14:51:59 +00001163 stride = 1;
hailfingerb437e282010-11-04 01:04:27 +00001164 break;
Edward O'Callaghand8eca562019-02-24 21:10:33 +11001165 case write_gran_128bytes:
1166 stride = 128;
1167 break;
hailfingerb437e282010-11-04 01:04:27 +00001168 case write_gran_256bytes:
hailfinger90fcf9b2010-11-05 14:51:59 +00001169 stride = 256;
hailfingerb437e282010-11-04 01:04:27 +00001170 break;
Edward O'Callaghand8eca562019-02-24 21:10:33 +11001171 case write_gran_264bytes:
1172 stride = 264;
1173 break;
1174 case write_gran_512bytes:
1175 stride = 512;
1176 break;
1177 case write_gran_528bytes:
1178 stride = 528;
1179 break;
1180 case write_gran_1024bytes:
1181 stride = 1024;
1182 break;
1183 case write_gran_1056bytes:
1184 stride = 1056;
1185 break;
hailfingerb437e282010-11-04 01:04:27 +00001186 default:
1187 msg_cerr("%s: Unsupported granularity! Please report a bug at "
1188 "flashrom@flashrom.org\n", __func__);
hailfinger90fcf9b2010-11-05 14:51:59 +00001189 /* Claim that no write was needed. A write with unknown
1190 * granularity is too dangerous to try.
1191 */
1192 return 0;
hailfingerb437e282010-11-04 01:04:27 +00001193 }
hailfinger90fcf9b2010-11-05 14:51:59 +00001194 for (i = 0; i < len / stride; i++) {
1195 limit = min(stride, len - i * stride);
1196 /* Are 'have' and 'want' identical? */
1197 if (memcmp(have + i * stride, want + i * stride, limit)) {
1198 if (!need_write) {
1199 /* First location where have and want differ. */
1200 need_write = 1;
1201 rel_start = i * stride;
1202 }
1203 } else {
1204 if (need_write) {
1205 /* First location where have and want
1206 * do not differ anymore.
1207 */
hailfinger90fcf9b2010-11-05 14:51:59 +00001208 break;
1209 }
1210 }
1211 }
hailfingerffb7f382010-12-06 13:05:44 +00001212 if (need_write)
hailfinger90fcf9b2010-11-05 14:51:59 +00001213 first_len = min(i * stride - rel_start, len);
hailfingerb437e282010-11-04 01:04:27 +00001214 *first_start += rel_start;
hailfinger90fcf9b2010-11-05 14:51:59 +00001215 return first_len;
hailfingerb437e282010-11-04 01:04:27 +00001216}
1217
Edward O'Callaghanc66827e2020-10-09 12:22:04 +11001218/* Returns the number of busses commonly supported by the current programmer and flash chip where the latter
1219 * can not be completely accessed due to size/address limits of the programmer. */
1220unsigned int count_max_decode_exceedings(const struct flashctx *flash)
hailfingeraec9c962009-10-31 01:53:09 +00001221{
Edward O'Callaghanc66827e2020-10-09 12:22:04 +11001222 unsigned int limitexceeded = 0;
1223 uint32_t size = flash->chip->total_size * 1024;
1224 enum chipbustype buses = flash->mst->buses_supported & flash->chip->bustype;
uwe8d342eb2011-07-28 08:13:25 +00001225
1226 if ((buses & BUS_PARALLEL) && (max_rom_decode.parallel < size)) {
hailfingeraec9c962009-10-31 01:53:09 +00001227 limitexceeded++;
snelsone42c3802010-05-07 20:09:04 +00001228 msg_pdbg("Chip size %u kB is bigger than supported "
uwe8d342eb2011-07-28 08:13:25 +00001229 "size %u kB of chipset/board/programmer "
1230 "for %s interface, "
1231 "probe/read/erase/write may fail. ", size / 1024,
1232 max_rom_decode.parallel / 1024, "Parallel");
hailfingeraec9c962009-10-31 01:53:09 +00001233 }
hailfingere1e41ea2011-07-27 07:13:06 +00001234 if ((buses & BUS_LPC) && (max_rom_decode.lpc < size)) {
hailfingeraec9c962009-10-31 01:53:09 +00001235 limitexceeded++;
snelsone42c3802010-05-07 20:09:04 +00001236 msg_pdbg("Chip size %u kB is bigger than supported "
uwe8d342eb2011-07-28 08:13:25 +00001237 "size %u kB of chipset/board/programmer "
1238 "for %s interface, "
1239 "probe/read/erase/write may fail. ", size / 1024,
1240 max_rom_decode.lpc / 1024, "LPC");
hailfingeraec9c962009-10-31 01:53:09 +00001241 }
hailfingere1e41ea2011-07-27 07:13:06 +00001242 if ((buses & BUS_FWH) && (max_rom_decode.fwh < size)) {
hailfingeraec9c962009-10-31 01:53:09 +00001243 limitexceeded++;
snelsone42c3802010-05-07 20:09:04 +00001244 msg_pdbg("Chip size %u kB is bigger than supported "
uwe8d342eb2011-07-28 08:13:25 +00001245 "size %u kB of chipset/board/programmer "
1246 "for %s interface, "
1247 "probe/read/erase/write may fail. ", size / 1024,
1248 max_rom_decode.fwh / 1024, "FWH");
hailfingeraec9c962009-10-31 01:53:09 +00001249 }
hailfingere1e41ea2011-07-27 07:13:06 +00001250 if ((buses & BUS_SPI) && (max_rom_decode.spi < size)) {
hailfingeraec9c962009-10-31 01:53:09 +00001251 limitexceeded++;
snelsone42c3802010-05-07 20:09:04 +00001252 msg_pdbg("Chip size %u kB is bigger than supported "
uwe8d342eb2011-07-28 08:13:25 +00001253 "size %u kB of chipset/board/programmer "
1254 "for %s interface, "
1255 "probe/read/erase/write may fail. ", size / 1024,
1256 max_rom_decode.spi / 1024, "SPI");
hailfingeraec9c962009-10-31 01:53:09 +00001257 }
Edward O'Callaghanc66827e2020-10-09 12:22:04 +11001258 return limitexceeded;
hailfingeraec9c962009-10-31 01:53:09 +00001259}
1260
Edward O'Callaghan79357b32020-08-02 01:24:58 +10001261void unmap_flash(struct flashctx *flash)
1262{
1263 if (flash->virtual_registers != (chipaddr)ERROR_PTR) {
1264 programmer_unmap_flash_region((void *)flash->virtual_registers, flash->chip->total_size * 1024);
1265 flash->physical_registers = 0;
1266 flash->virtual_registers = (chipaddr)ERROR_PTR;
1267 }
1268
1269 if (flash->virtual_memory != (chipaddr)ERROR_PTR) {
1270 programmer_unmap_flash_region((void *)flash->virtual_memory, flash->chip->total_size * 1024);
1271 flash->physical_memory = 0;
1272 flash->virtual_memory = (chipaddr)ERROR_PTR;
1273 }
1274}
1275
1276int map_flash(struct flashctx *flash)
1277{
1278 /* Init pointers to the fail-safe state to distinguish them later from legit values. */
1279 flash->virtual_memory = (chipaddr)ERROR_PTR;
1280 flash->virtual_registers = (chipaddr)ERROR_PTR;
1281
1282 /* FIXME: This avoids mapping (and unmapping) of flash chip definitions with size 0.
1283 * These are used for various probing-related hacks that would not map successfully anyway and should be
1284 * removed ASAP. */
1285 if (flash->chip->total_size == 0)
1286 return 0;
1287
1288 const chipsize_t size = flash->chip->total_size * 1024;
1289 uintptr_t base = flashbase ? flashbase : (0xffffffff - size + 1);
1290 void *addr = programmer_map_flash_region(flash->chip->name, base, size);
1291 if (addr == ERROR_PTR) {
1292 msg_perr("Could not map flash chip %s at 0x%0*" PRIxPTR ".\n",
1293 flash->chip->name, PRIxPTR_WIDTH, base);
1294 return 1;
1295 }
1296 flash->physical_memory = base;
1297 flash->virtual_memory = (chipaddr)addr;
1298
1299 /* FIXME: Special function registers normally live 4 MByte below flash space, but it might be somewhere
1300 * completely different on some chips and programmers, or not mappable at all.
1301 * Ignore these problems for now and always report success. */
1302 if (flash->chip->feature_bits & FEATURE_REGISTERMAP) {
1303 base = 0xffffffff - size - 0x400000 + 1;
1304 addr = programmer_map_flash_region("flash chip registers", base, size);
1305 if (addr == ERROR_PTR) {
1306 msg_pdbg2("Could not map flash chip registers %s at 0x%0*" PRIxPTR ".\n",
1307 flash->chip->name, PRIxPTR_WIDTH, base);
1308 return 0;
1309 }
1310 flash->physical_registers = base;
1311 flash->virtual_registers = (chipaddr)addr;
1312 }
1313 return 0;
1314}
1315
Edward O'Callaghan8488f122019-06-17 12:38:15 +10001316/*
1317 * Return a string corresponding to the bustype parameter.
1318 * Memory is obtained with malloc() and must be freed with free() by the caller.
1319 */
1320char *flashbuses_to_text(enum chipbustype bustype)
1321{
1322 char *ret = calloc(1, 1);
1323 /*
1324 * FIXME: Once all chipsets and flash chips have been updated, NONSPI
1325 * will cease to exist and should be eliminated here as well.
1326 */
1327 if (bustype == BUS_NONSPI) {
1328 ret = strcat_realloc(ret, "Non-SPI, ");
1329 } else {
1330 if (bustype & BUS_PARALLEL)
1331 ret = strcat_realloc(ret, "Parallel, ");
1332 if (bustype & BUS_LPC)
1333 ret = strcat_realloc(ret, "LPC, ");
1334 if (bustype & BUS_FWH)
1335 ret = strcat_realloc(ret, "FWH, ");
1336 if (bustype & BUS_SPI)
1337 ret = strcat_realloc(ret, "SPI, ");
1338 if (bustype & BUS_PROG)
1339 ret = strcat_realloc(ret, "Programmer-specific, ");
1340 if (bustype == BUS_NONE)
1341 ret = strcat_realloc(ret, "None, ");
1342 }
1343 /* Kill last comma. */
1344 ret[strlen(ret) - 2] = '\0';
1345 ret = realloc(ret, strlen(ret) + 1);
1346 return ret;
1347}
1348
Edward O'Callaghanb2257cc2020-07-25 22:19:47 +10001349int probe_flash(struct registered_master *mst, int startchip, struct flashctx *flash, int force)
rminnich8d3ff912003-10-25 17:01:29 +00001350{
Edward O'Callaghan723c12c2020-08-01 22:42:00 +10001351 const struct flashchip *chip;
hailfingeraec9c962009-10-31 01:53:09 +00001352 enum chipbustype buses_common;
hailfingera916b422009-06-01 02:08:58 +00001353 char *tmp;
rminnich8d3ff912003-10-25 17:01:29 +00001354
Edward O'Callaghan723c12c2020-08-01 22:42:00 +10001355 for (chip = flashchips + startchip; chip && chip->name; chip++) {
Edward O'Callaghanf93b3742019-02-24 17:24:27 +11001356 if (chip_to_probe && strcmp(chip->name, chip_to_probe) != 0)
ollie5672ac62004-03-17 22:22:08 +00001357 continue;
Edward O'Callaghanc66827e2020-10-09 12:22:04 +11001358 buses_common = mst->buses_supported & chip->bustype;
Edward O'Callaghan4b940572019-08-02 01:44:47 +10001359 if (!buses_common)
hailfinger18bd4cc2011-06-17 22:38:53 +00001360 continue;
Edward O'Callaghancc1d0c92019-02-24 15:35:07 +11001361 /* Only probe for SPI25 chips by default. */
Edward O'Callaghanf93b3742019-02-24 17:24:27 +11001362 if (chip->bustype == BUS_SPI && !chip_to_probe && chip->spi_cmd_set != SPI25)
Edward O'Callaghancc1d0c92019-02-24 15:35:07 +11001363 continue;
Edward O'Callaghanb2257cc2020-07-25 22:19:47 +10001364 msg_gdbg("Probing for %s %s, %d kB: ", chip->vendor, chip->name, chip->total_size);
Edward O'Callaghanf93b3742019-02-24 17:24:27 +11001365 if (!chip->probe && !force) {
Edward O'Callaghanb2257cc2020-07-25 22:19:47 +10001366 msg_gdbg("failed! flashrom has no probe function for this flash chip.\n");
hailfingera916b422009-06-01 02:08:58 +00001367 continue;
1368 }
stepan782fb172007-04-06 11:58:03 +00001369
hailfinger48ed3e22011-05-04 00:39:50 +00001370 /* Start filling in the dynamic data. */
Edward O'Callaghanf93b3742019-02-24 17:24:27 +11001371 flash->chip = calloc(1, sizeof(struct flashchip));
1372 if (!flash->chip) {
Patrick Georgif3fa2992017-02-02 16:24:44 +01001373 msg_gerr("Out of memory!\n");
1374 exit(1);
1375 }
Edward O'Callaghanf93b3742019-02-24 17:24:27 +11001376 memcpy(flash->chip, chip, sizeof(struct flashchip));
1377 flash->mst = mst;
hailfinger48ed3e22011-05-04 00:39:50 +00001378
Edward O'Callaghan79357b32020-08-02 01:24:58 +10001379 if (map_flash(flash) != 0)
1380 goto notfound;
rminnich8d3ff912003-10-25 17:01:29 +00001381
Edward O'Callaghana820b212020-09-17 22:53:26 +10001382 /* We handle a forced match like a real match, we just avoid probing. Note that probe_flash()
1383 * is only called with force=1 after normal probing failed.
1384 */
stugec1e55fe2008-07-02 17:15:47 +00001385 if (force)
1386 break;
stepanc98b80b2006-03-16 16:57:41 +00001387
Edward O'Callaghanf93b3742019-02-24 17:24:27 +11001388 if (flash->chip->probe(flash) != 1)
stuge56300c32008-09-03 23:10:05 +00001389 goto notfound;
1390
hailfinger48ed3e22011-05-04 00:39:50 +00001391 /* If this is the first chip found, accept it.
1392 * If this is not the first chip found, accept it only if it is
Edward O'Callaghanb2257cc2020-07-25 22:19:47 +10001393 * a non-generic match. SFDP and CFI are generic matches.
1394 * startchip==0 means this call to probe_flash() is the first
1395 * one for this programmer interface (master) and thus no other chip has
1396 * been found on this interface.
hailfinger48ed3e22011-05-04 00:39:50 +00001397 */
Edward O'Callaghaneb022ec2020-09-24 22:39:00 +10001398 if (startchip == 0 && flash->chip->model_id == SFDP_DEVICE_ID) {
1399 msg_cinfo("===\n"
1400 "SFDP has autodetected a flash chip which is "
1401 "not natively supported by flashrom yet.\n");
1402 if (count_usable_erasers(flash) == 0)
1403 msg_cinfo("The standard operations read and "
1404 "verify should work, but to support "
1405 "erase, write and all other "
1406 "possible features");
1407 else
1408 msg_cinfo("All standard operations (read, "
1409 "verify, erase and write) should "
1410 "work, but to support all possible "
1411 "features");
1412
1413 msg_cinfo(" we need to add them manually.\n"
1414 "You can help us by mailing us the output of the following command to "
1415 "flashrom@flashrom.org:\n"
1416 "'flashrom -VV [plus the -p/--programmer parameter]'\n"
1417 "Thanks for your help!\n"
1418 "===\n");
1419 }
stugec1e55fe2008-07-02 17:15:47 +00001420
Edward O'Callaghand0fdcb62020-09-24 22:38:44 +10001421 /* First flash chip detected on this bus. */
1422 if (startchip == 0)
1423 break;
1424 /* Not the first flash chip detected on this bus, but not a generic match either. */
Edward O'Callaghaneb022ec2020-09-24 22:39:00 +10001425 if ((flash->chip->model_id != GENERIC_DEVICE_ID) && (flash->chip->model_id != SFDP_DEVICE_ID))
Edward O'Callaghand0fdcb62020-09-24 22:38:44 +10001426 break;
1427 /* Not the first flash chip detected on this bus, and it's just a generic match. Ignore it. */
stuge56300c32008-09-03 23:10:05 +00001428notfound:
Edward O'Callaghan79357b32020-08-02 01:24:58 +10001429 unmap_flash(flash);
Edward O'Callaghanf93b3742019-02-24 17:24:27 +11001430 free(flash->chip);
1431 flash->chip = NULL;
rminnich8d3ff912003-10-25 17:01:29 +00001432 }
uwebe4477b2007-08-23 16:08:21 +00001433
Edward O'Callaghanea9e2452020-12-18 11:01:38 +11001434 if (!flash->chip)
hailfinger48ed3e22011-05-04 00:39:50 +00001435 return -1;
stugec1e55fe2008-07-02 17:15:47 +00001436
Edward O'Callaghan53ff4ad2020-12-16 20:36:28 +11001437 /* Fill fallback layout covering the whole chip. */
1438 struct single_layout *const fallback = &flash->fallback_layout;
1439 fallback->base.entries = &fallback->entry;
1440 fallback->base.num_entries = 1;
1441 fallback->entry.start = 0;
1442 fallback->entry.end = flash->chip->total_size * 1024 - 1;
1443 fallback->entry.included = true;
1444 fallback->entry.name = strdup("complete flash");
1445 if (!fallback->entry.name) {
1446 msg_cerr("Failed to probe chip: %s\n", strerror(errno));
1447 return -1;
1448 }
stepan3e7aeae2011-01-19 06:21:54 +00001449
Edward O'Callaghanea9e2452020-12-18 11:01:38 +11001450 tmp = flashbuses_to_text(flash->chip->bustype);
Edward O'Callaghana820b212020-09-17 22:53:26 +10001451 msg_cinfo("%s %s flash chip \"%s\" (%d kB, %s) ", force ? "Assuming" : "Found",
1452 flash->chip->vendor, flash->chip->name, flash->chip->total_size, tmp);
stefanct588b6d22011-06-26 20:45:35 +00001453 free(tmp);
Edward O'Callaghan79357b32020-08-02 01:24:58 +10001454#if CONFIG_INTERNAL == 1
1455 if (programmer_table[programmer].map_flash_region == physmap)
1456 msg_cinfo("mapped at physical address 0x%0*" PRIxPTR ".\n",
1457 PRIxPTR_WIDTH, flash->physical_memory);
1458 else
1459#endif
1460 msg_cinfo("on %s.\n", programmer_table[programmer].name);
uwe9e6811e2009-06-28 21:47:57 +00001461
Edward O'Callaghana820b212020-09-17 22:53:26 +10001462 /* Flash registers may more likely not be mapped if the chip was forced.
1463 * Lock info may be stored in registers, so avoid lock info printing. */
hailfinger0f4c3952010-12-02 21:59:42 +00001464 if (!force)
Edward O'Callaghanf93b3742019-02-24 17:24:27 +11001465 if (flash->chip->printlock)
1466 flash->chip->printlock(flash);
snelson1ee293c2010-02-19 00:52:10 +00001467
Edward O'Callaghan79357b32020-08-02 01:24:58 +10001468 /* Get out of the way for later runs. */
1469 unmap_flash(flash);
1470
hailfinger48ed3e22011-05-04 00:39:50 +00001471 /* Return position of matching chip. */
Edward O'Callaghan723c12c2020-08-01 22:42:00 +10001472 return chip - flashchips;
rminnich8d3ff912003-10-25 17:01:29 +00001473}
1474
uwe8d342eb2011-07-28 08:13:25 +00001475int read_buf_from_file(unsigned char *buf, unsigned long size,
1476 const char *filename)
hailfinger771fc182010-10-15 00:01:14 +00001477{
Edward O'Callaghan597e2972020-12-13 12:24:49 +11001478#ifdef __LIBPAYLOAD__
1479 msg_gerr("Error: No file I/O support in libpayload\n");
1480 return 1;
1481#else
Edward O'Callaghane20f1582020-12-13 11:58:37 +11001482 int ret = 0;
Edward O'Callaghan3f972992020-10-26 01:48:37 +00001483
Edward O'Callaghane20f1582020-12-13 11:58:37 +11001484 FILE *image;
Edward O'Callaghan3f972992020-10-26 01:48:37 +00001485 if (!strncmp(filename, "-", sizeof("-")))
1486 image = fdopen(STDIN_FILENO, "rb");
1487 else
1488 image = fopen(filename, "rb");
1489 if (image == NULL) {
Edward O'Callaghan1c7092d2020-12-13 12:28:57 +11001490 msg_gerr("Error: opening file \"%s\" failed: %s\n", filename, strerror(errno));
hailfinger771fc182010-10-15 00:01:14 +00001491 return 1;
1492 }
Edward O'Callaghane20f1582020-12-13 11:58:37 +11001493
1494 struct stat image_stat;
hailfinger771fc182010-10-15 00:01:14 +00001495 if (fstat(fileno(image), &image_stat) != 0) {
Edward O'Callaghan1c7092d2020-12-13 12:28:57 +11001496 msg_gerr("Error: getting metadata of file \"%s\" failed: %s\n", filename, strerror(errno));
Edward O'Callaghane20f1582020-12-13 11:58:37 +11001497 ret = 1;
1498 goto out;
hailfinger771fc182010-10-15 00:01:14 +00001499 }
Nikolai Artemieve1f8f602021-02-12 11:44:32 +11001500 if ((image_stat.st_size != (__off_t)size) &&
Edward O'Callaghan3f972992020-10-26 01:48:37 +00001501 (strncmp(filename, "-", sizeof("-")))) {
Daniel Campellocb88c9a2021-04-13 19:23:47 -06001502 msg_gerr("Error: Image size (%jd B) doesn't match the expected size (%lu B)!\n",
Edward O'Callaghan1c7092d2020-12-13 12:28:57 +11001503 (intmax_t)image_stat.st_size, size);
Edward O'Callaghane20f1582020-12-13 11:58:37 +11001504 ret = 1;
1505 goto out;
hailfinger771fc182010-10-15 00:01:14 +00001506 }
Edward O'Callaghane20f1582020-12-13 11:58:37 +11001507
1508 unsigned long numbytes = fread(buf, 1, size, image);
hailfinger771fc182010-10-15 00:01:14 +00001509 if (numbytes != size) {
1510 msg_gerr("Error: Failed to read complete file. Got %ld bytes, "
1511 "wanted %ld!\n", numbytes, size);
Edward O'Callaghane20f1582020-12-13 11:58:37 +11001512 ret = 1;
hailfinger771fc182010-10-15 00:01:14 +00001513 }
Edward O'Callaghane20f1582020-12-13 11:58:37 +11001514out:
1515 (void)fclose(image);
1516 return ret;
Edward O'Callaghan597e2972020-12-13 12:24:49 +11001517#endif
hailfinger771fc182010-10-15 00:01:14 +00001518}
1519
Daniel Campellocb88c9a2021-04-13 19:23:47 -06001520/**
1521 * @brief Reads content to buffer from one or more files.
1522 *
1523 * Reads content to supplied buffer from files. If a filename is specified for
1524 * individual regions using the partial read syntax ('-i <region>[:<filename>]')
1525 * then this will read file data into the corresponding region in the
1526 * supplied buffer.
1527 *
1528 * @param flashctx Flash context to be used.
1529 * @param buf Chip-sized buffer to write data to
1530 * @return 0 on success
1531 */
1532static int read_buf_from_include_args(const struct flashctx *const flash,
1533 unsigned char *buf)
1534{
1535 const struct flashrom_layout *const layout = get_layout(flash);
1536 const struct romentry *entry = NULL;
1537
1538 /*
1539 * Content will be read from -i args, so they must not overlap since
1540 * we need to know exactly what content to write to the ROM.
1541 */
1542 if (included_regions_overlap(layout)) {
Daniel Campello2fdc8372021-04-16 17:52:51 -06001543 msg_gerr("Error: Included regions must not overlap when writing.\n");
Daniel Campellocb88c9a2021-04-13 19:23:47 -06001544 return 1;
1545 }
1546
1547 while ((entry = layout_next_included(layout, entry))) {
1548 if (!entry->file)
1549 continue;
1550 if (read_buf_from_file(buf + entry->start,
1551 entry->end - entry->start + 1, entry->file))
1552 return 1;
1553 }
1554 return 0;
1555}
1556
1557/**
1558 * @brief Writes passed data buffer into a file
1559 *
1560 * @param buf Buffer with data to write
1561 * @param size Size of buffer
1562 * @param filename File path to write to
1563 * @return 0 on success
1564 */
Edward O'Callaghanb2257cc2020-07-25 22:19:47 +10001565int write_buf_to_file(const unsigned char *buf, unsigned long size, const char *filename)
hailfingerd219a232009-01-28 00:27:54 +00001566{
Edward O'Callaghan597e2972020-12-13 12:24:49 +11001567#ifdef __LIBPAYLOAD__
1568 msg_gerr("Error: No file I/O support in libpayload\n");
1569 return 1;
1570#else
hailfingerd219a232009-01-28 00:27:54 +00001571 FILE *image;
Edward O'Callaghane20f1582020-12-13 11:58:37 +11001572 int ret = 0;
hailfingerde345862009-06-01 22:07:52 +00001573
1574 if (!filename) {
hailfinger42a850a2010-07-13 23:56:13 +00001575 msg_gerr("No filename specified.\n");
hailfingerde345862009-06-01 22:07:52 +00001576 return 1;
1577 }
Edward O'Callaghan3f972992020-10-26 01:48:37 +00001578 if (!strncmp(filename, "-", sizeof("-")))
1579 image = fdopen(STDOUT_FILENO, "wb");
1580 else
1581 image = fopen(filename, "wb");
1582 if (image == NULL) {
Edward O'Callaghan1c7092d2020-12-13 12:28:57 +11001583 msg_gerr("Error: opening file \"%s\" failed: %s\n", filename, strerror(errno));
hailfinger23060112009-05-08 12:49:03 +00001584 return 1;
hailfinger42a850a2010-07-13 23:56:13 +00001585 }
hailfingerd219a232009-01-28 00:27:54 +00001586
Edward O'Callaghane20f1582020-12-13 11:58:37 +11001587 unsigned long numbytes = fwrite(buf, 1, size, image);
hailfinger42a850a2010-07-13 23:56:13 +00001588 if (numbytes != size) {
Edward O'Callaghanb2257cc2020-07-25 22:19:47 +10001589 msg_gerr("Error: file %s could not be written completely.\n", filename);
Edward O'Callaghane20f1582020-12-13 11:58:37 +11001590 ret = 1;
1591 goto out;
hailfinger42a850a2010-07-13 23:56:13 +00001592 }
Edward O'Callaghane20f1582020-12-13 11:58:37 +11001593 if (fflush(image)) {
1594 msg_gerr("Error: flushing file \"%s\" failed: %s\n", filename, strerror(errno));
1595 ret = 1;
1596 }
1597 // Try to fsync() only regular files and if that function is available at all (e.g. not on MinGW).
1598#if defined(_POSIX_FSYNC) && (_POSIX_FSYNC != -1)
1599 struct stat image_stat;
1600 if (fstat(fileno(image), &image_stat) != 0) {
1601 msg_gerr("Error: getting metadata of file \"%s\" failed: %s\n", filename, strerror(errno));
1602 ret = 1;
1603 goto out;
1604 }
1605 if (S_ISREG(image_stat.st_mode)) {
1606 if (fsync(fileno(image))) {
1607 msg_gerr("Error: fsyncing file \"%s\" failed: %s\n", filename, strerror(errno));
1608 ret = 1;
1609 }
1610 }
1611#endif
1612out:
1613 if (fclose(image)) {
1614 msg_gerr("Error: closing file \"%s\" failed: %s\n", filename, strerror(errno));
1615 ret = 1;
1616 }
1617 return ret;
Edward O'Callaghan597e2972020-12-13 12:24:49 +11001618#endif
hailfingerd219a232009-01-28 00:27:54 +00001619}
1620
Daniel Campellocb88c9a2021-04-13 19:23:47 -06001621/**
1622 * @brief Writes content from buffer to one or more files.
1623 *
1624 * Writes content from supplied buffer to files. If a filename is specified for
1625 * individual regions using the partial read syntax ('-i <region>[:<filename>]')
1626 * then this will write files using data from the corresponding region in the
1627 * supplied buffer.
1628 *
1629 * @param flashctx Flash context to be used.
1630 * @param buf Chip-sized buffer to read data from
1631 * @return 0 on success
1632 */
1633static int write_buf_to_include_args(const struct flashctx *const flash,
1634 unsigned char *buf)
1635{
1636#ifdef __LIBPAYLOAD__
1637 msg_gerr("Error: No file I/O support in libpayload\n");
1638 return 1;
1639#else
1640 const struct flashrom_layout *const layout = get_layout(flash);
1641 const struct romentry *entry = NULL;
1642
1643 while ((entry = layout_next_included(layout, entry))) {
1644 if (!entry->file)
1645 continue;
1646 if (write_buf_to_file(buf + entry->start,
1647 entry->end - entry->start + 1, entry->file))
1648 return 1;
1649 }
1650
1651 return 0;
1652#endif
1653}
1654
David Hendrickse3451942013-03-21 17:23:29 -07001655/*
1656 * read_flash - wrapper for flash->read() with additional high-level policy
1657 *
1658 * @flash flash chip
1659 * @buf buffer to store data in
1660 * @start start address
1661 * @len number of bytes to read
1662 *
1663 * This wrapper simplifies most cases when the flash chip needs to be read
1664 * since policy decisions such as non-fatal error handling is centralized.
1665 */
Souvik Ghoshd75cd672016-06-17 14:21:39 -07001666int read_flash(struct flashctx *flash, uint8_t *buf,
David Hendrickse3451942013-03-21 17:23:29 -07001667 unsigned int start, unsigned int len)
1668{
David Hendricks4e76fdc2013-05-13 16:05:36 -07001669 int ret;
David Hendrickse3451942013-03-21 17:23:29 -07001670
Patrick Georgif3fa2992017-02-02 16:24:44 +01001671 if (!flash || !flash->chip->read)
David Hendrickse3451942013-03-21 17:23:29 -07001672 return -1;
1673
Vadim Bendebury2b4dcef2018-05-21 10:47:18 -07001674 msg_cdbg("%#06x-%#06x:R ", start, start + len - 1);
1675
Patrick Georgif3fa2992017-02-02 16:24:44 +01001676 ret = flash->chip->read(flash, buf, start, len);
David Hendrickse3451942013-03-21 17:23:29 -07001677 if (ret) {
1678 if (ignore_error(ret)) {
1679 msg_gdbg("ignoring error when reading 0x%x-0x%x\n",
1680 start, start + len - 1);
1681 ret = 0;
1682 } else {
1683 msg_gdbg("failed to read 0x%x-0x%x\n",
1684 start, start + len - 1);
1685 }
1686 }
1687
1688 return ret;
1689}
1690
David Hendricks7c8a1612013-04-26 19:14:44 -07001691/*
1692 * write_flash - wrapper for flash->write() with additional high-level policy
1693 *
1694 * @flash flash chip
1695 * @buf buffer to write to flash
1696 * @start start address in flash
1697 * @len number of bytes to write
1698 *
1699 * TODO: Look up regions that are write-protected and avoid attempt to write
1700 * to them at all.
1701 */
Daniel Campellofbee2142021-04-20 16:09:09 -06001702static int write_flash(struct flashctx *flash, const uint8_t *buf,
1703 unsigned int start, unsigned int len)
David Hendricks7c8a1612013-04-26 19:14:44 -07001704{
Patrick Georgif3fa2992017-02-02 16:24:44 +01001705 if (!flash || !flash->chip->write)
David Hendricks7c8a1612013-04-26 19:14:44 -07001706 return -1;
1707
Patrick Georgif3fa2992017-02-02 16:24:44 +01001708 return flash->chip->write(flash, buf, start, len);
David Hendricks7c8a1612013-04-26 19:14:44 -07001709}
1710
Daniel Campello731d8932021-04-21 13:02:22 -06001711static int read_by_layout(struct flashctx *, uint8_t *, bool);
Souvik Ghoshd75cd672016-06-17 14:21:39 -07001712int read_flash_to_file(struct flashctx *flash, const char *filename)
hailfinger42a850a2010-07-13 23:56:13 +00001713{
Patrick Georgif3fa2992017-02-02 16:24:44 +01001714 unsigned long size = flash->chip->total_size * 1024;
Richard Hughes74eec602018-12-19 15:30:39 +00001715 unsigned char *buf = calloc(size, sizeof(unsigned char));
hailfinger42a850a2010-07-13 23:56:13 +00001716 int ret = 0;
1717
1718 msg_cinfo("Reading flash... ");
1719 if (!buf) {
1720 msg_gerr("Memory allocation failed!\n");
1721 msg_cinfo("FAILED.\n");
1722 return 1;
1723 }
Louis Yung-Chieh Lo9c7525f2011-03-04 12:32:02 +08001724
1725 /* To support partial read, fill buffer to all 0xFF at beginning to make
1726 * debug easier. */
Edward O'Callaghanef783e32020-08-10 19:54:27 +10001727 memset(buf, ERASED_VALUE(flash), size);
Louis Yung-Chieh Lo9c7525f2011-03-04 12:32:02 +08001728
Patrick Georgif3fa2992017-02-02 16:24:44 +01001729 if (!flash->chip->read) {
hailfinger42a850a2010-07-13 23:56:13 +00001730 msg_cerr("No read function available for this flash chip.\n");
1731 ret = 1;
1732 goto out_free;
1733 }
Daniel Campello731d8932021-04-21 13:02:22 -06001734 if (read_by_layout(flash, buf, false)) {
Daniel Campello6b0f1fc2021-04-09 21:28:12 -06001735 msg_cerr("Read operation failed!\n");
Louis Yung-Chieh Lo9c7525f2011-03-04 12:32:02 +08001736 ret = 1;
1737 goto out_free;
Daniel Campello6b0f1fc2021-04-09 21:28:12 -06001738 }
Daniel Campellocb88c9a2021-04-13 19:23:47 -06001739 if (write_buf_to_include_args(flash, buf)) {
Daniel Campello6b0f1fc2021-04-09 21:28:12 -06001740 ret = 1;
1741 goto out_free;
hailfinger42a850a2010-07-13 23:56:13 +00001742 }
1743
David Hendricksdf29a832013-06-28 14:33:51 -07001744 if (filename)
1745 ret = write_buf_to_file(buf, size, filename);
hailfinger42a850a2010-07-13 23:56:13 +00001746out_free:
1747 free(buf);
Edward O'Callaghan6b2ff8a2020-12-11 14:33:23 +11001748 msg_cinfo("%s.\n", ret ? "FAILED" : "done");
hailfinger42a850a2010-07-13 23:56:13 +00001749 return ret;
1750}
1751
Edward O'Callaghan6240c852019-07-02 15:49:58 +10001752/* Even if an error is found, the function will keep going and check the rest. */
Edward O'Callaghanf93b3742019-02-24 17:24:27 +11001753static int selfcheck_eraseblocks(const struct flashchip *chip)
hailfinger45177872010-01-18 08:14:43 +00001754{
hailfingerb91c08c2011-08-15 19:54:20 +00001755 int i, j, k;
1756 int ret = 0;
hailfinger45177872010-01-18 08:14:43 +00001757
1758 for (k = 0; k < NUM_ERASEFUNCTIONS; k++) {
1759 unsigned int done = 0;
Edward O'Callaghanf93b3742019-02-24 17:24:27 +11001760 struct block_eraser eraser = chip->block_erasers[k];
hailfinger45177872010-01-18 08:14:43 +00001761
1762 for (i = 0; i < NUM_ERASEREGIONS; i++) {
1763 /* Blocks with zero size are bugs in flashchips.c. */
1764 if (eraser.eraseblocks[i].count &&
1765 !eraser.eraseblocks[i].size) {
1766 msg_gerr("ERROR: Flash chip %s erase function "
1767 "%i region %i has size 0. Please report"
1768 " a bug at flashrom@flashrom.org\n",
Edward O'Callaghanf93b3742019-02-24 17:24:27 +11001769 chip->name, k, i);
hailfinger9fed35d2010-01-19 06:42:46 +00001770 ret = 1;
hailfinger45177872010-01-18 08:14:43 +00001771 }
1772 /* Blocks with zero count are bugs in flashchips.c. */
1773 if (!eraser.eraseblocks[i].count &&
1774 eraser.eraseblocks[i].size) {
1775 msg_gerr("ERROR: Flash chip %s erase function "
1776 "%i region %i has count 0. Please report"
1777 " a bug at flashrom@flashrom.org\n",
Edward O'Callaghanf93b3742019-02-24 17:24:27 +11001778 chip->name, k, i);
hailfinger9fed35d2010-01-19 06:42:46 +00001779 ret = 1;
hailfinger45177872010-01-18 08:14:43 +00001780 }
1781 done += eraser.eraseblocks[i].count *
1782 eraser.eraseblocks[i].size;
1783 }
hailfinger9fed35d2010-01-19 06:42:46 +00001784 /* Empty eraseblock definition with erase function. */
1785 if (!done && eraser.block_erase)
snelsone42c3802010-05-07 20:09:04 +00001786 msg_gspew("Strange: Empty eraseblock definition with "
uwe8d342eb2011-07-28 08:13:25 +00001787 "non-empty erase function. Not an error.\n");
hailfinger45177872010-01-18 08:14:43 +00001788 if (!done)
1789 continue;
Edward O'Callaghanf93b3742019-02-24 17:24:27 +11001790 if (done != chip->total_size * 1024) {
hailfinger45177872010-01-18 08:14:43 +00001791 msg_gerr("ERROR: Flash chip %s erase function %i "
1792 "region walking resulted in 0x%06x bytes total,"
1793 " expected 0x%06x bytes. Please report a bug at"
Edward O'Callaghanf93b3742019-02-24 17:24:27 +11001794 " flashrom@flashrom.org\n", chip->name, k,
1795 done, chip->total_size * 1024);
hailfinger9fed35d2010-01-19 06:42:46 +00001796 ret = 1;
hailfinger45177872010-01-18 08:14:43 +00001797 }
hailfinger9fed35d2010-01-19 06:42:46 +00001798 if (!eraser.block_erase)
1799 continue;
1800 /* Check if there are identical erase functions for different
1801 * layouts. That would imply "magic" erase functions. The
1802 * easiest way to check this is with function pointers.
1803 */
uwef6f94d42010-03-13 17:28:29 +00001804 for (j = k + 1; j < NUM_ERASEFUNCTIONS; j++) {
hailfinger9fed35d2010-01-19 06:42:46 +00001805 if (eraser.block_erase ==
Edward O'Callaghanf93b3742019-02-24 17:24:27 +11001806 chip->block_erasers[j].block_erase) {
hailfinger9fed35d2010-01-19 06:42:46 +00001807 msg_gerr("ERROR: Flash chip %s erase function "
1808 "%i and %i are identical. Please report"
1809 " a bug at flashrom@flashrom.org\n",
Edward O'Callaghanf93b3742019-02-24 17:24:27 +11001810 chip->name, k, j);
hailfinger9fed35d2010-01-19 06:42:46 +00001811 ret = 1;
1812 }
uwef6f94d42010-03-13 17:28:29 +00001813 }
hailfinger45177872010-01-18 08:14:43 +00001814 }
hailfinger9fed35d2010-01-19 06:42:46 +00001815 return ret;
hailfinger45177872010-01-18 08:14:43 +00001816}
1817
Edward O'Callaghanbef74c22020-12-04 16:23:54 +11001818static int check_block_eraser(const struct flashctx *flash, int k, int log)
1819{
1820 struct block_eraser eraser = flash->chip->block_erasers[k];
1821
1822 if (!eraser.block_erase && !eraser.eraseblocks[0].count) {
1823 if (log)
1824 msg_cdbg("not defined. ");
1825 return 1;
1826 }
1827 if (!eraser.block_erase && eraser.eraseblocks[0].count) {
1828 if (log)
1829 msg_cdbg("eraseblock layout is known, but matching "
1830 "block erase function is not implemented. ");
1831 return 1;
1832 }
1833 if (eraser.block_erase && !eraser.eraseblocks[0].count) {
1834 if (log)
1835 msg_cdbg("block erase function found, but "
1836 "eraseblock layout is not defined. ");
1837 return 1;
1838 }
1839 // TODO: Once erase functions are annotated with allowed buses, check that as well.
1840 return 0;
1841}
1842
Daniel Campello488f2432021-04-28 15:00:38 -06001843/*
1844 * Gets the lowest erase granularity; it is used when
1845 * deciding if the layout map needs to be adjusted such that erase boundaries
1846 * match this granularity. Returns -1 if unsuccessful.
1847 */
1848static int get_required_erase_size(struct flashctx *flash)
1849{
1850 int i, erase_size_found = 0;
1851 unsigned int required_erase_size;
1852
1853 /*
1854 * Find eraseable block size for read alignment.
1855 * FIXME: This assumes the smallest block erase size is useable
1856 * by erase_and_write_flash().
1857 */
1858 required_erase_size = ~0;
1859 for (i = 0; i < NUM_ERASEFUNCTIONS; i++) {
1860 struct block_eraser eraser = flash->chip->block_erasers[i];
1861 int j;
1862
1863 for (j = 0; j < NUM_ERASEREGIONS; j++) {
1864 unsigned int size = eraser.eraseblocks[j].size;
1865
1866 if (size && (size < required_erase_size)) {
1867 required_erase_size = size;
1868 erase_size_found = 1;
1869 }
1870 }
1871 }
1872
1873 /* likely an error in flashchips[] */
1874 if (!erase_size_found) {
1875 msg_cerr("%s: No usable erase size found.\n", __func__);
1876 return -1;
1877 }
1878
1879 return required_erase_size;
1880}
1881
1882static int round_to_erasable_block_boundary(const int required_erase_size,
1883 const struct romentry *entry,
1884 chipoff_t *rounded_start,
1885 chipsize_t* rounded_len) {
1886 unsigned int start_align, len_align;
1887
1888 if (required_erase_size < 0)
1889 return 1;
1890
1891 /* round down to nearest eraseable block boundary */
1892 start_align = entry->start % required_erase_size;
1893 *rounded_start = entry->start - start_align;
1894
1895 /* round up to nearest eraseable block boundary */
1896 *rounded_len = entry->end - *rounded_start + 1;
1897 len_align = *rounded_len % required_erase_size;
1898 if (len_align)
1899 *rounded_len = *rounded_len + required_erase_size - len_align;
1900
1901 if (start_align || len_align) {
1902 msg_gdbg("\n%s: Re-aligned partial read due to eraseable "
1903 "block size requirement:\n\tstart: 0x%06x, "
1904 "len: 0x%06x, aligned start: 0x%06x, len: 0x%06x\n",
1905 __func__, entry->start, entry->end - entry->start + 1,
1906 *rounded_start, *rounded_len);
1907 }
1908
1909 return 0;
1910}
1911
Daniel Campello6b0f1fc2021-04-09 21:28:12 -06001912/**
1913 * @brief Reads the included layout regions into a buffer.
1914 *
1915 * If there is no layout set in the given flash context, the whole chip will
1916 * be read.
1917 *
1918 * @param flashctx Flash context to be used.
1919 * @param buffer Buffer of full chip size to read into.
1920 * @return 0 on success,
1921 * 1 if any read fails.
1922 */
Daniel Campello731d8932021-04-21 13:02:22 -06001923static int read_by_layout(struct flashctx *const flashctx, uint8_t *const buffer,
1924 bool align_to_erasable_block_boundary)
Daniel Campello6b0f1fc2021-04-09 21:28:12 -06001925{
1926 const struct flashrom_layout *const layout = get_layout(flashctx);
1927 const struct romentry *entry = NULL;
1928 int required_erase_size = get_required_erase_size(flashctx);
1929
1930 while ((entry = layout_next_included(layout, entry))) {
Daniel Campello731d8932021-04-21 13:02:22 -06001931 chipoff_t region_start = entry->start;
1932 chipsize_t region_len = entry->end - entry->start + 1;
Daniel Campello6b0f1fc2021-04-09 21:28:12 -06001933
Daniel Campello731d8932021-04-21 13:02:22 -06001934 if (align_to_erasable_block_boundary &&
1935 round_to_erasable_block_boundary(required_erase_size, entry,
1936 &region_start, &region_len))
Daniel Campello6b0f1fc2021-04-09 21:28:12 -06001937 return 1;
Daniel Campello731d8932021-04-21 13:02:22 -06001938 if (read_flash(flashctx, buffer + region_start, region_start, region_len))
Daniel Campello6b0f1fc2021-04-09 21:28:12 -06001939 return 1;
1940 }
1941 return 0;
1942}
1943
Edward O'Callaghan58c3f382020-12-04 16:26:55 +11001944typedef int (*erasefn_t)(struct flashctx *, unsigned int addr, unsigned int len);
Edward O'Callaghan2fc12e22020-12-10 10:32:26 +11001945/**
1946 * @private
1947 *
1948 * For read-erase-write, `curcontents` and `newcontents` shall point
1949 * to buffers of the chip's size. Both are supposed to be prefilled
1950 * with at least the included layout regions of the current flash
1951 * contents (`curcontents`) and the data to be written to the flash
1952 * (`newcontents`).
1953 *
1954 * For erase, `curcontents` and `newcontents` shall be NULL-pointers.
1955 *
1956 * The `chipoff_t` values are used internally by `walk_by_layout()`.
1957 */
1958struct walk_info {
1959 uint8_t *curcontents;
1960 const uint8_t *newcontents;
1961 chipoff_t erase_start;
Daniel Campello9437f712021-04-20 18:49:49 -06001962 chipoff_t erase_end;
Edward O'Callaghan2fc12e22020-12-10 10:32:26 +11001963};
Daniel Campello9437f712021-04-20 18:49:49 -06001964typedef int (*per_blockfn_t)(struct flashctx *, const struct walk_info *, erasefn_t);
Edward O'Callaghan58c3f382020-12-04 16:26:55 +11001965
Edward O'Callaghanecc0b202020-12-10 11:35:11 +11001966/*
1967 * Function to process processing units accumulated in the action descriptor.
1968 *
1969 * @flash pointer to the flash context to operate on
1970 * @per_blockfn helper function which can erase and program a section of the
1971 * flash chip. It receives the flash context, offset and length
1972 * of the area to erase/program, before and after contents (to
1973 * decide what exactly needs to be erased and or programmed)
1974 * and a pointer to the erase function which can operate on the
1975 * proper granularity.
1976 * @descriptor action descriptor including pointers to before and after
1977 * contents and an array of processing actions to take.
1978 *
1979 * Returns zero on success or an error code.
1980 */
1981static int walk_eraseregions(struct flashctx *flash,
1982 const per_blockfn_t per_blockfn,
1983 struct action_descriptor *descriptor)
1984{
1985 struct processing_unit *pu;
1986 int rc = 0;
1987 static int print_comma;
1988
1989 for (pu = descriptor->processing_units; pu->num_blocks; pu++) {
1990 unsigned base = pu->offset;
1991 unsigned top = pu->offset + pu->block_size * pu->num_blocks;
Edward O'Callaghan17361062020-12-12 17:31:59 +11001992 struct block_eraser *const eraser = &flash->chip->block_erasers[pu->block_eraser_index];
Edward O'Callaghanecc0b202020-12-10 11:35:11 +11001993
1994 while (base < top) {
1995
1996 if (print_comma)
1997 msg_cdbg(", ");
1998 else
1999 print_comma = 1;
2000
2001 msg_cdbg("0x%06x-0x%06zx", base, base + pu->block_size - 1);
2002
2003 struct walk_info info = {
Daniel Campello9437f712021-04-20 18:49:49 -06002004 .curcontents = descriptor->oldcontents + base,
2005 .newcontents = descriptor->newcontents + base,
Edward O'Callaghanecc0b202020-12-10 11:35:11 +11002006 .erase_start = base,
Daniel Campello9437f712021-04-20 18:49:49 -06002007 .erase_end = base + pu->block_size - 1,
Edward O'Callaghanecc0b202020-12-10 11:35:11 +11002008 };
Edward O'Callaghan17361062020-12-12 17:31:59 +11002009 rc = per_blockfn(flash, &info, eraser->block_erase);
Edward O'Callaghanecc0b202020-12-10 11:35:11 +11002010
2011 if (rc) {
2012 if (ignore_error(rc))
2013 rc = 0;
2014 else
2015 return rc;
2016 }
2017 base += pu->block_size;
2018 }
2019 }
2020 msg_cdbg("\n");
2021 return rc;
2022}
2023
Daniel Campello9437f712021-04-20 18:49:49 -06002024static int erase_and_write_block_helper(struct flashctx *const flash,
2025 const struct walk_info *const info,
2026 const erasefn_t erasefn)
hailfingerb437e282010-11-04 01:04:27 +00002027{
Daniel Campello9437f712021-04-20 18:49:49 -06002028 const unsigned int erase_len = info->erase_end + 1 - info->erase_start;
stefanctc5eb8a92011-11-23 09:13:48 +00002029 unsigned int starthere = 0, lenhere = 0;
Edward O'Callaghan307d1692020-12-12 00:18:22 +11002030 int ret = 0, writecount = 0;
David Hendricks048b38c2016-03-28 18:47:06 -07002031 int block_was_erased = 0;
Edward O'Callaghan10e63d92019-06-17 14:12:52 +10002032 enum write_granularity gran = flash->chip->gran;
Edward O'Callaghan307d1692020-12-12 00:18:22 +11002033 bool skipped = true;
hailfingerb437e282010-11-04 01:04:27 +00002034 msg_cdbg(":");
Daniel Campello9437f712021-04-20 18:49:49 -06002035 if (need_erase(info->curcontents, info->newcontents, erase_len, gran, 0xff)) {
Daniel Campellofbee2142021-04-20 16:09:09 -06002036 all_skipped = false;
Daisuke Nojiri446b6732018-09-07 18:32:56 -07002037 msg_cdbg(" E");
Daniel Campello9437f712021-04-20 18:49:49 -06002038 ret = erasefn(flash, info->erase_start, erase_len);
David Hendricks1ed1d352011-11-23 17:54:37 -08002039 if (ret) {
Edward O'Callaghan0a92ce22020-12-09 17:10:37 +11002040 if (ret == SPI_ACCESS_DENIED)
Daisuke Nojiri446b6732018-09-07 18:32:56 -07002041 msg_cdbg(" DENIED");
David Hendricks1ed1d352011-11-23 17:54:37 -08002042 else
Daisuke Nojiri446b6732018-09-07 18:32:56 -07002043 msg_cerr(" ERASE_FAILED\n");
hailfingerb437e282010-11-04 01:04:27 +00002044 return ret;
David Hendricks1ed1d352011-11-23 17:54:37 -08002045 }
2046
David Hendricks0954ffc2015-11-13 15:15:44 -08002047 if (programmer_table[programmer].paranoid) {
Daniel Campello9437f712021-04-20 18:49:49 -06002048 if (check_erased_range(flash, info->erase_start, erase_len)) {
Daisuke Nojiri446b6732018-09-07 18:32:56 -07002049 msg_cerr(" ERASE_FAILED\n");
David Hendricks0954ffc2015-11-13 15:15:44 -08002050 return -1;
2051 }
hailfingerac8e3182011-06-26 17:04:16 +00002052 }
David Hendricks0954ffc2015-11-13 15:15:44 -08002053
hailfinger90fcf9b2010-11-05 14:51:59 +00002054 /* Erase was successful. Adjust curcontents. */
Daniel Campello9437f712021-04-20 18:49:49 -06002055 memset(info->curcontents, ERASED_VALUE(flash), erase_len);
Edward O'Callaghan307d1692020-12-12 00:18:22 +11002056 skipped = false;
David Hendricks048b38c2016-03-28 18:47:06 -07002057 block_was_erased = 1;
hailfingerb437e282010-11-04 01:04:27 +00002058 }
hailfinger90fcf9b2010-11-05 14:51:59 +00002059 /* get_next_write() sets starthere to a new value after the call. */
Edward O'Callaghan2fc12e22020-12-10 10:32:26 +11002060 while ((lenhere = get_next_write(info->curcontents + starthere,
2061 info->newcontents + starthere,
Daniel Campello9437f712021-04-20 18:49:49 -06002062 erase_len - starthere, &starthere, gran))) {
Daniel Campellofbee2142021-04-20 16:09:09 -06002063 all_skipped = false;
hailfingerb437e282010-11-04 01:04:27 +00002064 if (!writecount++)
Daisuke Nojiri446b6732018-09-07 18:32:56 -07002065 msg_cdbg(" W");
hailfingerb437e282010-11-04 01:04:27 +00002066 /* Needs the partial write function signature. */
Edward O'Callaghan2fc12e22020-12-10 10:32:26 +11002067 ret = write_flash(flash, (uint8_t *)info->newcontents + starthere,
2068 info->erase_start + starthere, lenhere);
David Hendricks1ed1d352011-11-23 17:54:37 -08002069 if (ret) {
Edward O'Callaghan0a92ce22020-12-09 17:10:37 +11002070 if (ret == SPI_ACCESS_DENIED)
Daisuke Nojiri446b6732018-09-07 18:32:56 -07002071 msg_cdbg(" DENIED");
hailfingerb437e282010-11-04 01:04:27 +00002072 return ret;
David Hendricks1ed1d352011-11-23 17:54:37 -08002073 }
David Hendricks048b38c2016-03-28 18:47:06 -07002074
2075 /*
2076 * If the block needed to be erased and was erased successfully
2077 * then we can assume that we didn't run into any write-
2078 * protected areas. Otherwise, we need to verify each page to
2079 * ensure it was successfully written and abort if we encounter
2080 * any errors.
2081 */
2082 if (programmer_table[programmer].paranoid && !block_was_erased) {
Edward O'Callaghan2fc12e22020-12-10 10:32:26 +11002083 if (verify_range(flash, info->newcontents + starthere,
2084 info->erase_start + starthere, lenhere))
David Hendricks048b38c2016-03-28 18:47:06 -07002085 return -1;
2086 }
2087
hailfingerb437e282010-11-04 01:04:27 +00002088 starthere += lenhere;
Edward O'Callaghan307d1692020-12-12 00:18:22 +11002089 skipped = false;
hailfingerb437e282010-11-04 01:04:27 +00002090 }
Edward O'Callaghan307d1692020-12-12 00:18:22 +11002091 if (skipped)
2092 msg_cdbg("S");
hailfingerb437e282010-11-04 01:04:27 +00002093 return ret;
2094}
2095
Edward O'Callaghanaccf9ff2021-01-22 01:33:03 +11002096static int erase_and_write_flash(struct flashctx *flash,
Daniel Campello2e158342021-04-25 06:54:40 -06002097 void *const curcontents, void *const newcontents)
hailfingerd219a232009-01-28 00:27:54 +00002098{
Vadim Bendebury2b4dcef2018-05-21 10:47:18 -07002099 int ret = 1;
Daniel Campello2e158342021-04-25 06:54:40 -06002100 struct action_descriptor *descriptor =
2101 prepare_action_descriptor(flash, curcontents, newcontents,
2102 !flash->flags.do_not_diff);
hailfingercf848f12010-12-05 15:14:44 +00002103
hailfingercf848f12010-12-05 15:14:44 +00002104 msg_cinfo("Erasing and writing flash chip... ");
hailfingerb437e282010-11-04 01:04:27 +00002105
Vadim Bendebury2b4dcef2018-05-21 10:47:18 -07002106 ret = walk_eraseregions(flash, &erase_and_write_block_helper, descriptor);
hailfinger1e9ee0f2009-05-08 17:15:15 +00002107
hailfinger7df21362009-09-05 02:30:58 +00002108 if (ret) {
snelsone42c3802010-05-07 20:09:04 +00002109 msg_cerr("FAILED!\n");
hailfinger7df21362009-09-05 02:30:58 +00002110 } else {
David Hendricksc6c9f822010-11-03 15:07:01 -07002111 msg_cdbg("SUCCESS.\n");
hailfinger7df21362009-09-05 02:30:58 +00002112 }
Daniel Campello2e158342021-04-25 06:54:40 -06002113
2114 free(descriptor);
hailfinger7df21362009-09-05 02:30:58 +00002115 return ret;
hailfingerd219a232009-01-28 00:27:54 +00002116}
2117
Daniel Campelloef545b12021-04-10 10:39:26 -06002118/**
2119 * @brief Compares the included layout regions with content from a buffer.
2120 *
2121 * If there is no layout set in the given flash context, the whole chip's
2122 * contents will be compared.
2123 *
2124 * @param flashctx Flash context to be used.
2125 * @param curcontents A buffer of full chip size to read current chip contents into.
2126 * @param newcontents The new image to compare to.
2127 * @return 0 on success,
2128 * 1 if reading failed,
2129 * 3 if the contents don't match.
2130 */
2131static int verify_by_layout(struct flashctx *const flashctx,
2132 void *const curcontents, const uint8_t *const newcontents)
2133{
2134 const struct flashrom_layout *const layout = get_layout(flashctx);
2135 const struct romentry *entry = NULL;
Daniel Campello7ad0c472021-04-20 17:10:22 -06002136 int ret = 0;
Daniel Campelloef545b12021-04-10 10:39:26 -06002137
2138 while ((entry = layout_next_included(layout, entry))) {
2139 const chipoff_t region_start = entry->start;
2140 const chipsize_t region_len = entry->end - entry->start + 1;
Daniel Campelloef545b12021-04-10 10:39:26 -06002141
Daniel Campello7ad0c472021-04-20 17:10:22 -06002142 if ((ret = flashctx->chip->read(flashctx, curcontents + region_start,
2143 region_start, region_len)))
2144 break;
Daniel Campelloef545b12021-04-10 10:39:26 -06002145 if (compare_range(newcontents + region_start, curcontents + region_start,
2146 region_start, region_len))
2147 return 3;
2148 }
Daniel Campello7ad0c472021-04-20 17:10:22 -06002149
2150 if (ret) {
2151 msg_gdbg("Could not fully verify due to error, ");
2152 if (ignore_error(ret)) {
2153 msg_gdbg("ignoring\n");
2154 ret = 0;
2155 } else {
2156 msg_gdbg("aborting\n");
2157 ret = 1;
2158 }
2159 }
2160
2161 return ret;
Daniel Campelloef545b12021-04-10 10:39:26 -06002162}
2163
Edward O'Callaghan09fdc022020-09-07 15:51:53 +10002164static void nonfatal_help_message(void)
hailfinger4c47e9d2010-10-19 22:06:20 +00002165{
Edward O'Callaghan09fdc022020-09-07 15:51:53 +10002166 msg_gerr("Good, writing to the flash chip apparently didn't do anything.\n");
2167#if CONFIG_INTERNAL == 1
2168 if (programmer == PROGRAMMER_INTERNAL)
2169 msg_gerr("This means we have to add special support for your board, programmer or flash\n"
2170 "chip. Please report this on IRC at chat.freenode.net (channel #flashrom) or\n"
2171 "mail flashrom@flashrom.org, thanks!\n"
2172 "-------------------------------------------------------------------------------\n"
2173 "You may now reboot or simply leave the machine running.\n");
2174 else
2175#endif
2176 msg_gerr("Please check the connections (especially those to write protection pins) between\n"
2177 "the programmer and the flash chip. If you think the error is caused by flashrom\n"
2178 "please report this on IRC at chat.freenode.net (channel #flashrom) or\n"
2179 "mail flashrom@flashrom.org, thanks!\n");
hailfinger4c47e9d2010-10-19 22:06:20 +00002180}
2181
Edward O'Callaghan09fdc022020-09-07 15:51:53 +10002182static void emergency_help_message(void)
hailfinger0459e1c2009-08-19 13:55:34 +00002183{
Edward O'Callaghan09fdc022020-09-07 15:51:53 +10002184 msg_gerr("Your flash chip is in an unknown state.\n");
2185#if CONFIG_INTERNAL == 1
2186 if (programmer == PROGRAMMER_INTERNAL)
2187 msg_gerr("Get help on IRC at chat.freenode.net (channel #flashrom) or\n"
2188 "mail flashrom@flashrom.org with the subject \"FAILED: <your board name>\"!\n"
2189 "-------------------------------------------------------------------------------\n"
2190 "DO NOT REBOOT OR POWEROFF!\n");
2191 else
2192#endif
2193 msg_gerr("Please report this on IRC at chat.freenode.net (channel #flashrom) or\n"
2194 "mail flashrom@flashrom.org, thanks!\n");
hailfinger0459e1c2009-08-19 13:55:34 +00002195}
2196
hailfingerf79d1712010-10-06 23:48:34 +00002197void list_programmers_linebreak(int startcol, int cols, int paren)
2198{
2199 const char *pname;
hailfingerb91c08c2011-08-15 19:54:20 +00002200 int pnamelen;
2201 int remaining = 0, firstline = 1;
hailfingerf79d1712010-10-06 23:48:34 +00002202 enum programmer p;
hailfingerb91c08c2011-08-15 19:54:20 +00002203 int i;
hailfingerf79d1712010-10-06 23:48:34 +00002204
2205 for (p = 0; p < PROGRAMMER_INVALID; p++) {
2206 pname = programmer_table[p].name;
2207 pnamelen = strlen(pname);
2208 if (remaining - pnamelen - 2 < 0) {
2209 if (firstline)
2210 firstline = 0;
2211 else
Edward O'Callaghan90aaa302019-05-21 14:43:38 +10002212 msg_ginfo("\n");
hailfingerf79d1712010-10-06 23:48:34 +00002213 for (i = 0; i < startcol; i++)
Edward O'Callaghan90aaa302019-05-21 14:43:38 +10002214 msg_ginfo(" ");
hailfingerf79d1712010-10-06 23:48:34 +00002215 remaining = cols - startcol;
2216 } else {
Edward O'Callaghan90aaa302019-05-21 14:43:38 +10002217 msg_ginfo(" ");
hailfingerf79d1712010-10-06 23:48:34 +00002218 remaining--;
2219 }
2220 if (paren && (p == 0)) {
Edward O'Callaghan90aaa302019-05-21 14:43:38 +10002221 msg_ginfo("(");
hailfingerf79d1712010-10-06 23:48:34 +00002222 remaining--;
2223 }
Edward O'Callaghan90aaa302019-05-21 14:43:38 +10002224 msg_ginfo("%s", pname);
hailfingerf79d1712010-10-06 23:48:34 +00002225 remaining -= pnamelen;
2226 if (p < PROGRAMMER_INVALID - 1) {
Edward O'Callaghan90aaa302019-05-21 14:43:38 +10002227 msg_ginfo(",");
hailfingerf79d1712010-10-06 23:48:34 +00002228 remaining--;
2229 } else {
2230 if (paren)
Edward O'Callaghan90aaa302019-05-21 14:43:38 +10002231 msg_ginfo(")");
hailfingerf79d1712010-10-06 23:48:34 +00002232 }
2233 }
2234}
2235
Edward O'Callaghanb2257cc2020-07-25 22:19:47 +10002236static void print_sysinfo(void)
hailfinger3b471632010-03-27 16:36:40 +00002237{
Edward O'Callaghandfb1fa32020-09-07 16:00:36 +10002238#if IS_WINDOWS
2239 SYSTEM_INFO si;
2240 OSVERSIONINFOEX osvi;
hailfinger3b471632010-03-27 16:36:40 +00002241
Edward O'Callaghandfb1fa32020-09-07 16:00:36 +10002242 memset(&si, 0, sizeof(SYSTEM_INFO));
2243 memset(&osvi, 0, sizeof(OSVERSIONINFOEX));
2244 msg_ginfo(" on Windows");
2245 /* Tell Windows which version of the structure we want. */
2246 osvi.dwOSVersionInfoSize = sizeof(OSVERSIONINFOEX);
2247 if (GetVersionEx((OSVERSIONINFO*) &osvi))
2248 msg_ginfo(" %lu.%lu", osvi.dwMajorVersion, osvi.dwMinorVersion);
2249 else
2250 msg_ginfo(" unknown version");
2251 GetSystemInfo(&si);
2252 switch (si.wProcessorArchitecture) {
2253 case PROCESSOR_ARCHITECTURE_AMD64:
2254 msg_ginfo(" (x86_64)");
2255 break;
2256 case PROCESSOR_ARCHITECTURE_INTEL:
2257 msg_ginfo(" (x86)");
2258 break;
2259 default:
2260 msg_ginfo(" (unknown arch)");
2261 break;
2262 }
2263#elif HAVE_UTSNAME == 1
2264 struct utsname osinfo;
2265
2266 uname(&osinfo);
2267 msg_ginfo(" on %s %s (%s)", osinfo.sysname, osinfo.release,
hailfinger3b471632010-03-27 16:36:40 +00002268 osinfo.machine);
2269#else
Edward O'Callaghandfb1fa32020-09-07 16:00:36 +10002270 msg_ginfo(" on unknown machine");
hailfinger3b471632010-03-27 16:36:40 +00002271#endif
Souvik Ghosh3c963a42016-07-19 18:48:15 -07002272}
2273
2274void print_buildinfo(void)
2275{
2276 msg_gdbg("flashrom was built with");
hailfinger3b471632010-03-27 16:36:40 +00002277#if NEED_PCI == 1
2278#ifdef PCILIB_VERSION
Souvik Ghosh3c963a42016-07-19 18:48:15 -07002279 msg_gdbg(" libpci %s,", PCILIB_VERSION);
hailfinger3b471632010-03-27 16:36:40 +00002280#else
Souvik Ghosh3c963a42016-07-19 18:48:15 -07002281 msg_gdbg(" unknown PCI library,");
hailfinger3b471632010-03-27 16:36:40 +00002282#endif
2283#endif
2284#ifdef __clang__
Souvik Ghosh3c963a42016-07-19 18:48:15 -07002285 msg_gdbg(" LLVM Clang");
hailfinger3cc85ad2010-07-17 14:49:30 +00002286#ifdef __clang_version__
Souvik Ghosh3c963a42016-07-19 18:48:15 -07002287 msg_gdbg(" %s,", __clang_version__);
hailfinger3cc85ad2010-07-17 14:49:30 +00002288#else
Souvik Ghosh3c963a42016-07-19 18:48:15 -07002289 msg_gdbg(" unknown version (before r102686),");
hailfinger3cc85ad2010-07-17 14:49:30 +00002290#endif
hailfinger3b471632010-03-27 16:36:40 +00002291#elif defined(__GNUC__)
Souvik Ghosh3c963a42016-07-19 18:48:15 -07002292 msg_gdbg(" GCC");
hailfinger3b471632010-03-27 16:36:40 +00002293#ifdef __VERSION__
Souvik Ghosh3c963a42016-07-19 18:48:15 -07002294 msg_gdbg(" %s,", __VERSION__);
hailfinger3b471632010-03-27 16:36:40 +00002295#else
Souvik Ghosh3c963a42016-07-19 18:48:15 -07002296 msg_gdbg(" unknown version,");
hailfinger3b471632010-03-27 16:36:40 +00002297#endif
2298#else
Souvik Ghosh3c963a42016-07-19 18:48:15 -07002299 msg_gdbg(" unknown compiler,");
hailfinger324a9cc2010-05-26 01:45:41 +00002300#endif
2301#if defined (__FLASHROM_LITTLE_ENDIAN__)
Souvik Ghosh3c963a42016-07-19 18:48:15 -07002302 msg_gdbg(" little endian");
Edward O'Callaghan3c005942020-10-01 16:33:47 +10002303#elif defined (__FLASHROM_BIG_ENDIAN__)
Souvik Ghosh3c963a42016-07-19 18:48:15 -07002304 msg_gdbg(" big endian");
Edward O'Callaghan3c005942020-10-01 16:33:47 +10002305#else
2306#error Endianness could not be determined
hailfinger3b471632010-03-27 16:36:40 +00002307#endif
Souvik Ghosh3c963a42016-07-19 18:48:15 -07002308 msg_gdbg("\n");
hailfinger3b471632010-03-27 16:36:40 +00002309}
2310
uwefdeca092008-01-21 15:24:22 +00002311void print_version(void)
2312{
Edward O'Callaghanb2257cc2020-07-25 22:19:47 +10002313 msg_ginfo("flashrom %s", flashrom_version);
hailfinger3b471632010-03-27 16:36:40 +00002314 print_sysinfo();
Edward O'Callaghanb2257cc2020-07-25 22:19:47 +10002315 msg_ginfo("\n");
uwefdeca092008-01-21 15:24:22 +00002316}
2317
hailfinger74819ad2010-05-15 15:04:37 +00002318void print_banner(void)
2319{
2320 msg_ginfo("flashrom is free software, get the source code at "
Edward O'Callaghanb2257cc2020-07-25 22:19:47 +10002321 "https://flashrom.org\n");
hailfinger74819ad2010-05-15 15:04:37 +00002322 msg_ginfo("\n");
2323}
2324
hailfingerc77acb52009-12-24 02:15:55 +00002325int selfcheck(void)
2326{
Edward O'Callaghan6240c852019-07-02 15:49:58 +10002327 unsigned int i;
hailfinger45177872010-01-18 08:14:43 +00002328 int ret = 0;
hailfinger45177872010-01-18 08:14:43 +00002329
2330 /* Safety check. Instead of aborting after the first error, check
2331 * if more errors exist.
2332 */
hailfingerc77acb52009-12-24 02:15:55 +00002333 if (ARRAY_SIZE(programmer_table) - 1 != PROGRAMMER_INVALID) {
snelsone42c3802010-05-07 20:09:04 +00002334 msg_gerr("Programmer table miscompilation!\n");
hailfinger45177872010-01-18 08:14:43 +00002335 ret = 1;
hailfingerc77acb52009-12-24 02:15:55 +00002336 }
Edward O'Callaghanac1678b2020-07-27 15:55:45 +10002337 for (i = 0; i < PROGRAMMER_INVALID; i++) {
2338 const struct programmer_entry p = programmer_table[i];
2339 if (p.name == NULL) {
2340 msg_gerr("All programmers need a valid name, but the one with index %d does not!\n", i);
2341 ret = 1;
2342 /* This might hide other problems with this programmer, but allows for better error
2343 * messages below without jumping through hoops. */
2344 continue;
2345 }
2346 switch (p.type) {
2347 case USB:
2348 case PCI:
2349 case OTHER:
2350 if (p.devs.note == NULL) {
2351 if (strcmp("internal", p.name) == 0)
2352 break; /* This one has its device list stored separately. */
2353 msg_gerr("Programmer %s has neither a device list nor a textual description!\n",
2354 p.name);
2355 ret = 1;
2356 }
2357 break;
2358 default:
2359 msg_gerr("Programmer %s does not have a valid type set!\n", p.name);
2360 ret = 1;
2361 break;
2362 }
2363 if (p.init == NULL) {
2364 msg_gerr("Programmer %s does not have a valid init function!\n", p.name);
2365 ret = 1;
2366 }
2367 if (p.delay == NULL) {
2368 msg_gerr("Programmer %s does not have a valid delay function!\n", p.name);
2369 ret = 1;
2370 }
2371 if (p.map_flash_region == NULL) {
2372 msg_gerr("Programmer %s does not have a valid map_flash_region function!\n", p.name);
2373 ret = 1;
2374 }
2375 if (p.unmap_flash_region == NULL) {
2376 msg_gerr("Programmer %s does not have a valid unmap_flash_region function!\n", p.name);
2377 ret = 1;
2378 }
2379 }
2380
Edward O'Callaghan6240c852019-07-02 15:49:58 +10002381 /* It would be favorable if we could check for the correct layout (especially termination) of various
2382 * constant arrays: flashchips, chipset_enables, board_matches, boards_known, laptops_known.
2383 * They are all defined as externs in this compilation unit so we don't know their sizes which vary
2384 * depending on compiler flags, e.g. the target architecture, and can sometimes be 0.
2385 * For 'flashchips' we export the size explicitly to work around this and to be able to implement the
Edward O'Callaghanb2257cc2020-07-25 22:19:47 +10002386 * checks below. */
2387 if (flashchips_size <= 1 || flashchips[flashchips_size - 1].name != NULL) {
stefanct6d836ba2011-05-26 01:35:19 +00002388 msg_gerr("Flashchips table miscompilation!\n");
2389 ret = 1;
Edward O'Callaghan6240c852019-07-02 15:49:58 +10002390 } else {
2391 for (i = 0; i < flashchips_size - 1; i++) {
2392 const struct flashchip *chip = &flashchips[i];
2393 if (chip->vendor == NULL || chip->name == NULL || chip->bustype == BUS_NONE) {
2394 ret = 1;
2395 msg_gerr("ERROR: Some field of flash chip #%d (%s) is misconfigured.\n"
2396 "Please report a bug at flashrom@flashrom.org\n", i,
2397 chip->name == NULL ? "unnamed" : chip->name);
2398 }
Edward O'Callaghanb2257cc2020-07-25 22:19:47 +10002399 if (selfcheck_eraseblocks(chip)) {
Edward O'Callaghan6240c852019-07-02 15:49:58 +10002400 ret = 1;
Edward O'Callaghanb2257cc2020-07-25 22:19:47 +10002401 }
Edward O'Callaghan6240c852019-07-02 15:49:58 +10002402 }
stefanct6d836ba2011-05-26 01:35:19 +00002403 }
stefanct6d836ba2011-05-26 01:35:19 +00002404
Edward O'Callaghane6b85692020-12-18 11:01:55 +11002405#if CONFIG_INTERNAL == 1
2406 ret |= selfcheck_board_enables();
2407#endif
2408
Edward O'Callaghanb2257cc2020-07-25 22:19:47 +10002409 /* TODO: implement similar sanity checks for other arrays where deemed necessary. */
hailfinger45177872010-01-18 08:14:43 +00002410 return ret;
hailfingerc77acb52009-12-24 02:15:55 +00002411}
2412
Edward O'Callaghan2c8ec612021-04-15 13:44:39 +10002413/* FIXME: This function signature needs to be improved once prepare_flash_access()
2414 * has a better function signature.
hailfinger771fc182010-10-15 00:01:14 +00002415 */
Edward O'Callaghan0c310fe2020-08-10 17:02:23 +10002416static int chip_safety_check(const struct flashctx *flash, int force,
2417 int read_it, int write_it, int erase_it, int verify_it)
hailfinger771fc182010-10-15 00:01:14 +00002418{
Patrick Georgiac3423f2017-02-03 20:58:06 +01002419 const struct flashchip *chip = flash->chip;
2420
hailfinger771fc182010-10-15 00:01:14 +00002421 if (!programmer_may_write && (write_it || erase_it)) {
2422 msg_perr("Write/erase is not working yet on your programmer in "
2423 "its current configuration.\n");
2424 /* --force is the wrong approach, but it's the best we can do
2425 * until the generic programmer parameter parser is merged.
2426 */
2427 if (!force)
2428 return 1;
2429 msg_cerr("Continuing anyway.\n");
2430 }
2431
2432 if (read_it || erase_it || write_it || verify_it) {
2433 /* Everything needs read. */
Patrick Georgiac3423f2017-02-03 20:58:06 +01002434 if (chip->tested.read == BAD) {
hailfinger771fc182010-10-15 00:01:14 +00002435 msg_cerr("Read is not working on this chip. ");
2436 if (!force)
2437 return 1;
2438 msg_cerr("Continuing anyway.\n");
2439 }
Patrick Georgiac3423f2017-02-03 20:58:06 +01002440 if (!chip->read) {
hailfinger771fc182010-10-15 00:01:14 +00002441 msg_cerr("flashrom has no read function for this "
2442 "flash chip.\n");
2443 return 1;
2444 }
2445 }
2446 if (erase_it || write_it) {
2447 /* Write needs erase. */
Patrick Georgiac3423f2017-02-03 20:58:06 +01002448 if (chip->tested.erase == NA) {
2449 msg_cerr("Erase is not possible on this chip.\n");
2450 return 1;
2451 }
2452 if (chip->tested.erase == BAD) {
hailfinger771fc182010-10-15 00:01:14 +00002453 msg_cerr("Erase is not working on this chip. ");
2454 if (!force)
2455 return 1;
2456 msg_cerr("Continuing anyway.\n");
2457 }
stefancte1c5acf2011-07-04 07:27:17 +00002458 if(count_usable_erasers(flash) == 0) {
stefanct569dbb62011-07-01 00:19:12 +00002459 msg_cerr("flashrom has no erase function for this "
2460 "flash chip.\n");
2461 return 1;
2462 }
hailfinger771fc182010-10-15 00:01:14 +00002463 }
2464 if (write_it) {
Patrick Georgiac3423f2017-02-03 20:58:06 +01002465 if (chip->tested.write == NA) {
2466 msg_cerr("Write is not possible on this chip.\n");
2467 return 1;
2468 }
2469 if (chip->tested.write == BAD) {
hailfinger771fc182010-10-15 00:01:14 +00002470 msg_cerr("Write is not working on this chip. ");
2471 if (!force)
2472 return 1;
2473 msg_cerr("Continuing anyway.\n");
2474 }
Patrick Georgiac3423f2017-02-03 20:58:06 +01002475 if (!chip->write) {
hailfinger771fc182010-10-15 00:01:14 +00002476 msg_cerr("flashrom has no write function for this "
2477 "flash chip.\n");
2478 return 1;
2479 }
2480 }
2481 return 0;
2482}
2483
Edward O'Callaghana0176ff2020-08-18 15:49:23 +10002484int prepare_flash_access(struct flashctx *const flash,
Edward O'Callaghan27362b42020-08-10 17:58:03 +10002485 const bool read_it, const bool write_it,
2486 const bool erase_it, const bool verify_it)
2487{
Edward O'Callaghan2c679272020-09-23 22:41:01 +10002488 if (chip_safety_check(flash, flash->flags.force, read_it, write_it, erase_it, verify_it)) {
Edward O'Callaghan27362b42020-08-10 17:58:03 +10002489 msg_cerr("Aborting.\n");
2490 return 1;
2491 }
2492
Daniel Campellodf477722021-04-05 16:53:33 -06002493 if (flash->layout == get_global_layout() && normalize_romentries(flash)) {
Edward O'Callaghan27362b42020-08-10 17:58:03 +10002494 msg_cerr("Requested regions can not be handled. Aborting.\n");
2495 return 1;
2496 }
2497
Edward O'Callaghan40092972020-10-20 11:50:48 +11002498 /*
2499 * FIXME(b/171093672): Failures to map_flash() on some DUT's due to unknown cause,
2500 * can be repro'ed with upstream on Volteer.
2501 *
2502 * map_flash() can fail on opaque spi drv such as linux_mtd and even ichspi.
2503 * The issue is that 'internal' [alias 'host'] has the cb 'map_flash_region = physmap'
2504 * hooked and this can fail on some board topologies. Checking the return value can
2505 * cause board rw failures by bailing early. Avoid the early bail for now until a
2506 * full investigation can reveal the proper fix. This restores previous behaviour of
2507 * assuming a map went fine.
2508 */
2509#if 0
Edward O'Callaghan12d8f832020-10-13 13:45:31 +11002510 if (map_flash(flash) != 0)
2511 return 1;
Edward O'Callaghan40092972020-10-20 11:50:48 +11002512#endif
2513 map_flash(flash);
Edward O'Callaghan12d8f832020-10-13 13:45:31 +11002514
Edward O'Callaghan27362b42020-08-10 17:58:03 +10002515 /* Given the existence of read locks, we want to unlock for read,
2516 erase and write. */
2517 if (flash->chip->unlock)
2518 flash->chip->unlock(flash);
2519
2520 flash->address_high_byte = -1;
2521 flash->in_4ba_mode = false;
Nikolai Artemiev55f7a332020-11-05 13:54:27 +11002522 flash->chip_restore_fn_count = 0;
Edward O'Callaghan27362b42020-08-10 17:58:03 +10002523
Edward O'Callaghan99974452020-10-13 13:28:33 +11002524 /* Be careful about 4BA chips and broken masters */
2525 if (flash->chip->total_size > 16 * 1024 && spi_master_no_4ba_modes(flash)) {
2526 /* If we can't use native instructions, bail out */
2527 if ((flash->chip->feature_bits & FEATURE_4BA_NATIVE) != FEATURE_4BA_NATIVE
2528 || !spi_master_4ba(flash)) {
2529 msg_cerr("Programmer doesn't support this chip. Aborting.\n");
2530 return 1;
2531 }
2532 }
2533
Edward O'Callaghanecb10662020-11-11 20:23:44 +11002534 /* Enable/disable 4-byte addressing mode if flash chip supports it */
2535 if ((flash->chip->bustype == BUS_SPI) &&
2536 (flash->chip->feature_bits & (FEATURE_4BA_ENTER | FEATURE_4BA_ENTER_WREN | FEATURE_4BA_ENTER_EAR7))) {
2537 int ret;
2538 if (spi_master_4ba(flash))
2539 ret = spi_enter_4ba(flash);
2540 else
2541 ret = spi_exit_4ba(flash);
2542 if (ret) {
2543 msg_cerr("Failed to set correct 4BA mode! Aborting.\n");
2544 return 1;
2545 }
2546 }
2547
Edward O'Callaghan27362b42020-08-10 17:58:03 +10002548 return 0;
2549}
2550
Edward O'Callaghana820b212020-09-17 22:53:26 +10002551void finalize_flash_access(struct flashctx *const flash)
2552{
Nikolai Artemiev55f7a332020-11-05 13:54:27 +11002553 deregister_chip_restore(flash);
Edward O'Callaghana820b212020-09-17 22:53:26 +10002554 unmap_flash(flash);
2555}
2556
Daniel Campello3171d742021-04-21 06:32:06 -06002557static int setup_curcontents(struct flashctx *flashctx, void *curcontents,
Daniel Campelloee45dc12021-04-10 10:13:51 -06002558 int erase_it, const void *const refcontents)
Daniel Campello98eed1a2021-03-22 07:28:34 -06002559{
Daniel Campelloee45dc12021-04-10 10:13:51 -06002560 const size_t flash_size = flashctx->chip->total_size * 1024;
Daniel Campello6b0f1fc2021-04-09 21:28:12 -06002561 const bool verify_all = flashctx->flags.verify_whole_chip;
Daniel Campello98eed1a2021-03-22 07:28:34 -06002562
Daniel Campello3171d742021-04-21 06:32:06 -06002563 memset(curcontents, UNERASED_VALUE(flashctx), flash_size);
Daniel Campelloee45dc12021-04-10 10:13:51 -06002564 if (!flashctx->flags.do_not_diff) {
Daniel Campello65bfe2c2021-04-23 08:57:47 -06002565 /* If given, assume flash chip contains same data as `refcontents`. */
Daniel Campelloee45dc12021-04-10 10:13:51 -06002566 if (refcontents) {
2567 msg_cinfo("Assuming old flash chip contents as ref-file...\n");
Daniel Campello3171d742021-04-21 06:32:06 -06002568 memcpy(curcontents, refcontents, flash_size);
Daniel Campello98eed1a2021-03-22 07:28:34 -06002569 } else {
Daniel Campello65bfe2c2021-04-23 08:57:47 -06002570 /*
2571 * Read the whole chip to be able to check whether regions need to be
2572 * erased and to give better diagnostics in case write fails.
2573 * The alternative is to read only the regions which are to be
2574 * preserved, but in that case we might perform unneeded erase which
2575 * takes time as well.
2576 */
Daniel Campelloee45dc12021-04-10 10:13:51 -06002577 msg_cinfo("Reading old flash chip contents... ");
Daniel Campello65bfe2c2021-04-23 08:57:47 -06002578 if (verify_all) {
Daniel Campello3171d742021-04-21 06:32:06 -06002579 if (read_flash(flashctx, curcontents, 0, flash_size)) {
Daniel Campello6b0f1fc2021-04-09 21:28:12 -06002580 msg_cinfo("FAILED.\n");
2581 return 1;
2582 }
2583 } else {
Daniel Campello731d8932021-04-21 13:02:22 -06002584 /* WARNING: See FIXME on get_required_erase_size() */
2585 if (read_by_layout(flashctx, curcontents, true)) {
Daniel Campello6b0f1fc2021-04-09 21:28:12 -06002586 msg_cinfo("FAILED.\n");
2587 return 1;
2588 }
Daniel Campello98eed1a2021-03-22 07:28:34 -06002589 }
Daniel Campelloee45dc12021-04-10 10:13:51 -06002590 msg_cinfo("done.\n");
Daniel Campello98eed1a2021-03-22 07:28:34 -06002591 }
Daniel Campello98eed1a2021-03-22 07:28:34 -06002592 } else if (!erase_it) {
2593 msg_pinfo("No diff performed, considering the chip erased.\n");
Daniel Campello3171d742021-04-21 06:32:06 -06002594 memset(curcontents, ERASED_VALUE(flashctx), flash_size);
Daniel Campello98eed1a2021-03-22 07:28:34 -06002595 }
Daniel Campelloee45dc12021-04-10 10:13:51 -06002596 return 0;
Daniel Campello98eed1a2021-03-22 07:28:34 -06002597}
2598
Edward O'Callaghanf1436012020-12-07 17:58:23 +11002599/**
2600 * @addtogroup flashrom-flash
2601 * @{
Vadim Bendebury2b4dcef2018-05-21 10:47:18 -07002602 */
Edward O'Callaghanf1436012020-12-07 17:58:23 +11002603
Daniel Campellocb88c9a2021-04-13 19:23:47 -06002604static void combine_image_by_layout(const struct flashctx *const flashctx,
2605 uint8_t *const newcontents, const uint8_t *const oldcontents);
Edward O'Callaghanf1436012020-12-07 17:58:23 +11002606/**
2607 * @brief Erase the specified ROM chip.
2608 *
2609 * If a layout is set in the given flash context, only included regions
2610 * will be erased.
2611 *
2612 * @param flashctx The context of the flash chip to erase.
2613 * @return 0 on success.
2614 */
Daniel Campello26765322021-03-22 14:53:27 -06002615int flashrom_flash_erase(struct flashctx *const flashctx)
Vadim Bendebury2b4dcef2018-05-21 10:47:18 -07002616{
Daniel Campello26765322021-03-22 14:53:27 -06002617 const size_t flash_size = flashctx->chip->total_size * 1024;
Vadim Bendebury2b4dcef2018-05-21 10:47:18 -07002618
Daniel Campello26765322021-03-22 14:53:27 -06002619 int ret = 1;
2620
Daniel Campello3171d742021-04-21 06:32:06 -06002621 uint8_t *curcontents = malloc(flash_size);
Daniel Campello26765322021-03-22 14:53:27 -06002622 uint8_t *newcontents = malloc(flash_size);
Daniel Campello3171d742021-04-21 06:32:06 -06002623 if (!curcontents || !newcontents) {
Daniel Campello26765322021-03-22 14:53:27 -06002624 msg_gerr("Out of memory!\n");
2625 goto _free_ret;
Vadim Bendebury2b4dcef2018-05-21 10:47:18 -07002626 }
2627
Daniel Campello26765322021-03-22 14:53:27 -06002628 if (prepare_flash_access(flashctx, false, false, true, false))
2629 goto _free_ret;
Vadim Bendebury2b4dcef2018-05-21 10:47:18 -07002630
Daniel Campello3171d742021-04-21 06:32:06 -06002631 if (setup_curcontents(flashctx, curcontents, true, NULL))
Daniel Campelloee45dc12021-04-10 10:13:51 -06002632 goto _finalize_ret;
2633
2634 memset(newcontents, ERASED_VALUE(flashctx), flash_size);
Daniel Campello3171d742021-04-21 06:32:06 -06002635 combine_image_by_layout(flashctx, newcontents, curcontents);
Daniel Campello26765322021-03-22 14:53:27 -06002636
Daniel Campello2e158342021-04-25 06:54:40 -06002637 ret = erase_and_write_flash(flashctx, curcontents, newcontents);
Daniel Campello26765322021-03-22 14:53:27 -06002638
2639_finalize_ret:
2640 finalize_flash_access(flashctx);
2641_free_ret:
Daniel Campello3171d742021-04-21 06:32:06 -06002642 free(curcontents);
Daniel Campello26765322021-03-22 14:53:27 -06002643 free(newcontents);
Vadim Bendebury2b4dcef2018-05-21 10:47:18 -07002644 return ret;
2645}
2646
Edward O'Callaghanf1436012020-12-07 17:58:23 +11002647/** @} */ /* end flashrom-flash */
2648
Edward O'Callaghan8c2a3402020-12-09 12:23:01 +11002649/**
2650 * @defgroup flashrom-ops Operations
2651 * @{
2652 */
2653
Edward O'Callaghan84c89182020-12-09 12:33:37 +11002654/**
2655 * @brief Read the current image from the specified ROM chip.
2656 *
2657 * If a layout is set in the specified flash context, only included regions
2658 * will be read.
2659 *
2660 * @param flashctx The context of the flash chip.
2661 * @param buffer Target buffer to write image to.
2662 * @param buffer_len Size of target buffer in bytes.
2663 * @return 0 on success,
2664 * 2 if buffer_len is too short for the flash chip's contents,
2665 * or 1 on any other failure.
2666 */
Daniel Campello6b0f1fc2021-04-09 21:28:12 -06002667int flashrom_image_read(struct flashctx *const flashctx, void *const buffer, const size_t buffer_len)
Daisuke Nojiri6d2cb212018-09-07 19:02:02 -07002668{
Daniel Campello039cd2b2021-03-24 20:12:15 -06002669 const size_t flash_size = flashctx->chip->total_size * 1024;
2670
2671 if (flash_size > buffer_len)
2672 return 2;
2673
2674 if (prepare_flash_access(flashctx, true, false, false, false))
2675 return 1;
2676
2677 msg_cinfo("Reading flash... ");
2678
2679 int ret = 1;
Daniel Campello731d8932021-04-21 13:02:22 -06002680 if (read_by_layout(flashctx, buffer, false)) {
Daniel Campello039cd2b2021-03-24 20:12:15 -06002681 msg_cerr("Read operation failed!\n");
2682 msg_cinfo("FAILED.\n");
2683 goto _finalize_ret;
2684 }
2685 msg_cinfo("done.\n");
2686 ret = 0;
2687
2688_finalize_ret:
2689 finalize_flash_access(flashctx);
2690 return ret;
Daisuke Nojiri6d2cb212018-09-07 19:02:02 -07002691}
2692
Daniel Campellocb88c9a2021-04-13 19:23:47 -06002693static void combine_image_by_layout(const struct flashctx *const flashctx,
2694 uint8_t *const newcontents, const uint8_t *const oldcontents)
2695{
2696 const struct flashrom_layout *const layout = get_layout(flashctx);
2697 const struct romentry *included;
2698 chipoff_t start = 0;
2699
2700 while ((included = layout_next_included_region(layout, start))) {
2701 if (included->start > start) {
2702 /* copy everything up to the start of this included region */
2703 memcpy(newcontents + start, oldcontents + start, included->start - start);
2704 }
2705 /* skip this included region */
2706 start = included->end + 1;
2707 if (start == 0)
2708 return;
2709 }
2710
2711 /* copy the rest of the chip */
2712 const chipsize_t copy_len = flashctx->chip->total_size * 1024 - start;
2713 memcpy(newcontents + start, oldcontents + start, copy_len);
2714}
2715
Daniel Campelloc1c1f7b2021-03-19 13:09:27 -06002716/**
2717 * @brief Write the specified image to the ROM chip.
Edward O'Callaghan020dfa12020-09-23 23:12:55 +10002718 *
Daniel Campelloc1c1f7b2021-03-19 13:09:27 -06002719 * If a layout is set in the specified flash context, only erase blocks
2720 * containing included regions will be touched.
Edward O'Callaghan020dfa12020-09-23 23:12:55 +10002721 *
Daniel Campelloc1c1f7b2021-03-19 13:09:27 -06002722 * @param flashctx The context of the flash chip.
2723 * @param buffer Source buffer to read image from (may be altered for full verification).
2724 * @param buffer_len Size of source buffer in bytes.
2725 * @param refbuffer If given, assume flash chip contains same data as `refbuffer`.
2726 * @return 0 on success,
2727 * 4 if buffer_len doesn't match the size of the flash chip,
Daniel Campello7ad0c472021-04-20 17:10:22 -06002728 * 3 if write was tried but nothing has changed,
Daniel Campello1663cc82021-04-20 19:10:03 -06002729 * 2 if write failed and flash contents changed,
Daniel Campelloc1c1f7b2021-03-19 13:09:27 -06002730 * or 1 on any other failure.
hailfingerc77acb52009-12-24 02:15:55 +00002731 */
Daniel Campelloc1c1f7b2021-03-19 13:09:27 -06002732int flashrom_image_write(struct flashctx *const flashctx, void *const buffer, const size_t buffer_len,
Daniel Campellofbee2142021-04-20 16:09:09 -06002733 const void *const refbuffer)
hailfingerc77acb52009-12-24 02:15:55 +00002734{
Daniel Campello57eb4882021-03-25 08:45:10 -06002735 const size_t flash_size = flashctx->chip->total_size * 1024;
Daniel Campello57eb4882021-03-25 08:45:10 -06002736 const bool verify_all = flashctx->flags.verify_whole_chip;
2737 const bool verify = flashctx->flags.verify_after_write;
Edward O'Callaghan4eb85102020-12-18 13:17:08 +11002738
Daniel Campelloc1c1f7b2021-03-19 13:09:27 -06002739 if (buffer_len != flash_size)
2740 return 4;
2741
2742 int ret = 1;
Daniel Campello1663cc82021-04-20 19:10:03 -06002743 int tmp = 0;
Daniel Campelloc1c1f7b2021-03-19 13:09:27 -06002744
Daniel Campello3171d742021-04-21 06:32:06 -06002745 uint8_t *curcontents = malloc(flash_size);
Daniel Campelloc1c1f7b2021-03-19 13:09:27 -06002746 uint8_t *newcontents = malloc(flash_size);
Daniel Campello592296d2021-04-22 12:24:45 -06002747 uint8_t *oldcontents = NULL;
2748 if (verify_all)
2749 oldcontents = malloc(flash_size);
2750 if (!curcontents || !newcontents || (verify_all && !oldcontents)) {
stefanctd611e8f2011-07-12 22:35:21 +00002751 msg_gerr("Out of memory!\n");
Daniel Campelloc1c1f7b2021-03-19 13:09:27 -06002752 goto _free_ret;
stefanctd611e8f2011-07-12 22:35:21 +00002753 }
Daniel Campelloc1c1f7b2021-03-19 13:09:27 -06002754
2755 if (prepare_flash_access(flashctx, false, true, false, verify))
2756 goto _free_ret;
hailfingerb437e282010-11-04 01:04:27 +00002757
Daniel Campello3171d742021-04-21 06:32:06 -06002758 if (setup_curcontents(flashctx, curcontents, false, refbuffer))
Daniel Campelloee45dc12021-04-10 10:13:51 -06002759 goto _finalize_ret;
Daniel Campello592296d2021-04-22 12:24:45 -06002760 if (oldcontents)
2761 memcpy(oldcontents, curcontents, flash_size);
Daniel Campelloee45dc12021-04-10 10:13:51 -06002762
Daniel Campellocb88c9a2021-04-13 19:23:47 -06002763 memcpy(newcontents, buffer, flash_size);
Daniel Campello3171d742021-04-21 06:32:06 -06002764 combine_image_by_layout(flashctx, newcontents, curcontents);
uwef6641642007-05-09 10:17:44 +00002765
Daniel Campelloc1c1f7b2021-03-19 13:09:27 -06002766 // parse the new fmap and disable soft WP if necessary
Daniel Campello1663cc82021-04-20 19:10:03 -06002767 if ((tmp = cros_ec_prepare(newcontents, flash_size))) {
2768 msg_cerr("CROS_EC prepare failed, ret=%d.\n", tmp);
Daniel Campelloc1c1f7b2021-03-19 13:09:27 -06002769 goto _finalize_ret;
2770 }
Louis Yung-Chieh Lo8d0971e2012-03-23 00:07:38 +08002771
Daniel Campello2e158342021-04-25 06:54:40 -06002772 if (erase_and_write_flash(flashctx, curcontents, newcontents)) {
Daniel Campello1663cc82021-04-20 19:10:03 -06002773 msg_cerr("Uh oh. Erase/write failed. ");
2774 ret = 2;
2775 if (verify_all) {
2776 msg_cerr("Checking if anything has changed.\n");
2777 msg_cinfo("Reading current flash chip contents... ");
Daniel Campello592296d2021-04-22 12:24:45 -06002778 if (!read_flash(flashctx, curcontents, 0, flash_size)) {
Daniel Campello1663cc82021-04-20 19:10:03 -06002779 msg_cinfo("done.\n");
Daniel Campello592296d2021-04-22 12:24:45 -06002780 if (!memcmp(oldcontents, curcontents, flash_size)) {
Daniel Campello1663cc82021-04-20 19:10:03 -06002781 nonfatal_help_message();
2782 goto _finalize_ret;
2783 }
2784 msg_cerr("Apparently at least some data has changed.\n");
2785 } else
2786 msg_cerr("Can't even read anymore!\n");
2787 } else {
2788 msg_cerr("\n");
2789 }
Daniel Campelloc1c1f7b2021-03-19 13:09:27 -06002790 emergency_help_message();
Daniel Campelloc1c1f7b2021-03-19 13:09:27 -06002791 goto _finalize_ret;
2792 }
2793
Daniel Campello1663cc82021-04-20 19:10:03 -06002794 tmp = cros_ec_need_2nd_pass();
2795 if (tmp < 0) {
Daniel Campelloc1c1f7b2021-03-19 13:09:27 -06002796 // Jump failed
2797 msg_cerr("cros_ec_need_2nd_pass() failed. Stop.\n");
2798 emergency_help_message();
Daniel Campelloc1c1f7b2021-03-19 13:09:27 -06002799 goto _finalize_ret;
Daniel Campello1663cc82021-04-20 19:10:03 -06002800 } else if (tmp > 0) {
Daniel Campelloc1c1f7b2021-03-19 13:09:27 -06002801 // Need 2nd pass. Get the just written content.
2802 msg_pdbg("CROS_EC needs 2nd pass.\n");
Daniel Campello3171d742021-04-21 06:32:06 -06002803 if (setup_curcontents(flashctx, curcontents, false, NULL)) {
Daniel Campelloc1c1f7b2021-03-19 13:09:27 -06002804 emergency_help_message();
2805 goto _finalize_ret;
Louis Yung-Chieh Lo8d0971e2012-03-23 00:07:38 +08002806 }
Louis Yung-Chieh Lodeefd822012-07-09 17:07:43 +08002807
Daniel Campelloc1c1f7b2021-03-19 13:09:27 -06002808 // write 2nd pass
Daniel Campello2e158342021-04-25 06:54:40 -06002809 if (erase_and_write_flash(flashctx, curcontents, newcontents)) {
Daniel Campelloc1c1f7b2021-03-19 13:09:27 -06002810 msg_cerr("Uh oh. CROS_EC 2nd pass failed.\n");
Daniel Campello1663cc82021-04-20 19:10:03 -06002811 ret = 2;
Louis Yung-Chieh Lodeefd822012-07-09 17:07:43 +08002812 emergency_help_message();
Daniel Campello57eb4882021-03-25 08:45:10 -06002813 goto _finalize_ret;
Louis Yung-Chieh Lodeefd822012-07-09 17:07:43 +08002814 }
Daniel Campelloc1c1f7b2021-03-19 13:09:27 -06002815 }
2816
2817 if (cros_ec_finish() < 0) {
2818 msg_cerr("cros_ec_finish() failed. Stop.\n");
2819 emergency_help_message();
Daniel Campelloc1c1f7b2021-03-19 13:09:27 -06002820 goto _finalize_ret;
stuge8ce3a3c2008-04-28 14:47:30 +00002821 }
ollie6a600992005-11-26 21:55:36 +00002822
Daniel Campellocd387fd2021-04-20 17:54:35 -06002823 /* Verify only if we actually changed something. */
Daniel Campellofbee2142021-04-20 16:09:09 -06002824 if (verify && !all_skipped) {
Daniel Campello7ad0c472021-04-20 17:10:22 -06002825 const struct flashrom_layout *const layout_bak = flashctx->layout;
2826
Daniel Campellocd387fd2021-04-20 17:54:35 -06002827 msg_cinfo("Verifying flash... ");
Louis Yung-Chieh Lo5d95f042011-09-01 17:33:06 +08002828
Daniel Campellocd387fd2021-04-20 17:54:35 -06002829 /* Work around chips which need some time to calm down. */
2830 programmer_delay(1000*1000);
Louis Yung-Chieh Lo5d95f042011-09-01 17:33:06 +08002831
Daniel Campello7ad0c472021-04-20 17:10:22 -06002832 if (verify_all) {
2833 flashctx->layout = NULL;
2834 }
Daniel Campello3171d742021-04-21 06:32:06 -06002835 ret = verify_by_layout(flashctx, curcontents, newcontents);
Daniel Campello7ad0c472021-04-20 17:10:22 -06002836 flashctx->layout = layout_bak;
Daniel Campellocd387fd2021-04-20 17:54:35 -06002837 /* If we tried to write, and verification now fails, we
2838 might have an emergency situation. */
2839 if (ret)
2840 emergency_help_message();
2841 else
2842 msg_cinfo("VERIFIED.\n");
Daniel Campello1663cc82021-04-20 19:10:03 -06002843 } else {
2844 ret = 0;
hailfinger0459e1c2009-08-19 13:55:34 +00002845 }
ollie6a600992005-11-26 21:55:36 +00002846
Daniel Campello57eb4882021-03-25 08:45:10 -06002847_finalize_ret:
Daniel Campelloc1c1f7b2021-03-19 13:09:27 -06002848 finalize_flash_access(flashctx);
2849_free_ret:
Daniel Campello592296d2021-04-22 12:24:45 -06002850 free(oldcontents);
Daniel Campello3171d742021-04-21 06:32:06 -06002851 free(curcontents);
hailfinger90fcf9b2010-11-05 14:51:59 +00002852 free(newcontents);
stepan83eca252006-01-04 16:42:57 +00002853 return ret;
rminnich8d3ff912003-10-25 17:01:29 +00002854}
Edward O'Callaghan020dfa12020-09-23 23:12:55 +10002855
Daniel Campellof758a8b2021-03-22 14:47:13 -06002856/**
2857 * @brief Verify the ROM chip's contents with the specified image.
2858 *
2859 * If a layout is set in the specified flash context, only included regions
2860 * will be verified.
2861 *
2862 * @param flashctx The context of the flash chip.
2863 * @param buffer Source buffer to verify with.
2864 * @param buffer_len Size of source buffer in bytes.
2865 * @return 0 on success,
Daniel Campelloef545b12021-04-10 10:39:26 -06002866 * 3 if the chip's contents don't match,
Daniel Campellof758a8b2021-03-22 14:47:13 -06002867 * 2 if buffer_len doesn't match the size of the flash chip,
2868 * or 1 on any other failure.
2869 */
2870int flashrom_image_verify(struct flashctx *const flashctx, const void *const buffer, const size_t buffer_len)
2871{
2872 const size_t flash_size = flashctx->chip->total_size * 1024;
2873
2874 if (buffer_len != flash_size)
2875 return 2;
2876
Daniel Campellocb88c9a2021-04-13 19:23:47 -06002877 const uint8_t *const newcontents = buffer;
Daniel Campelloef545b12021-04-10 10:39:26 -06002878 uint8_t *const curcontents = malloc(flash_size);
Daniel Campellocb88c9a2021-04-13 19:23:47 -06002879 if (!curcontents) {
Daniel Campellof758a8b2021-03-22 14:47:13 -06002880 msg_gerr("Out of memory!\n");
Daniel Campellocb88c9a2021-04-13 19:23:47 -06002881 return 1;
Daniel Campellof758a8b2021-03-22 14:47:13 -06002882 }
2883
Daniel Campellocb88c9a2021-04-13 19:23:47 -06002884 int ret = 1;
2885
Daniel Campellof758a8b2021-03-22 14:47:13 -06002886 if (prepare_flash_access(flashctx, false, false, false, true))
2887 goto _free_ret;
2888
Daniel Campellof758a8b2021-03-22 14:47:13 -06002889 msg_cinfo("Verifying flash... ");
Daniel Campelloef545b12021-04-10 10:39:26 -06002890 ret = verify_by_layout(flashctx, curcontents, newcontents);
Daniel Campellof758a8b2021-03-22 14:47:13 -06002891 if (!ret)
2892 msg_cinfo("VERIFIED.\n");
2893
Daniel Campellof758a8b2021-03-22 14:47:13 -06002894 finalize_flash_access(flashctx);
2895_free_ret:
Daniel Campelloef545b12021-04-10 10:39:26 -06002896 free(curcontents);
Daniel Campellof758a8b2021-03-22 14:47:13 -06002897 return ret;
2898}
2899
Edward O'Callaghan020dfa12020-09-23 23:12:55 +10002900/** @} */ /* end flashrom-ops */
2901
2902int do_read(struct flashctx *const flash, const char *const filename)
2903{
Edward O'Callaghan8e3e18f2020-12-03 13:12:06 +11002904 if (prepare_flash_access(flash, true, false, false, false))
2905 return 1;
2906
Edward O'Callaghan471958e2020-12-09 12:40:12 +11002907 const int ret = read_flash_to_file(flash, filename);
2908
Edward O'Callaghan919ddbd2020-12-03 13:17:30 +11002909 finalize_flash_access(flash);
2910
Edward O'Callaghan020dfa12020-09-23 23:12:55 +10002911 return ret;
2912}
2913
Daniel Campello83752f82021-04-16 14:54:27 -06002914int do_extract(struct flashctx *const flash)
2915{
2916 prepare_layout_for_extraction(flash);
2917 return do_read(flash, NULL);
2918}
2919
Edward O'Callaghan6e573be2020-12-18 10:38:06 +11002920int do_erase(struct flashctx *const flash)
Edward O'Callaghan020dfa12020-09-23 23:12:55 +10002921{
Daniel Campello26765322021-03-22 14:53:27 -06002922 const int ret = flashrom_flash_erase(flash);
Edward O'Callaghan020dfa12020-09-23 23:12:55 +10002923
2924 /*
2925 * FIXME: Do we really want the scary warning if erase failed?
2926 * After all, after erase the chip is either blank or partially
2927 * blank or it has the old contents. A blank chip won't boot,
2928 * so if the user wanted erase and reboots afterwards, the user
2929 * knows very well that booting won't work.
2930 */
2931 if (ret)
2932 emergency_help_message();
2933
2934 return ret;
2935}
2936
Edward O'Callaghan6e573be2020-12-18 10:38:06 +11002937int do_write(struct flashctx *const flash, const char *const filename, const char *const referencefile)
Edward O'Callaghan020dfa12020-09-23 23:12:55 +10002938{
Daniel Campellofb0ee9c2021-03-19 12:51:25 -06002939 const size_t flash_size = flash->chip->total_size * 1024;
2940 int ret = 1;
Edward O'Callaghan8e3e18f2020-12-03 13:12:06 +11002941
Daniel Campellocb88c9a2021-04-13 19:23:47 -06002942 uint8_t *const newcontents = malloc(flash_size);
Daniel Campellofb0ee9c2021-03-19 12:51:25 -06002943 uint8_t *const refcontents = referencefile ? malloc(flash_size) : NULL;
2944
Daniel Campellocb88c9a2021-04-13 19:23:47 -06002945 if (!newcontents || (referencefile && !refcontents)) {
Daniel Campellofb0ee9c2021-03-19 12:51:25 -06002946 msg_gerr("Out of memory!\n");
2947 goto _free_ret;
2948 }
2949
Daniel Campellocb88c9a2021-04-13 19:23:47 -06002950 /* Read '-w' argument first... */
Daniel Campellofb0ee9c2021-03-19 12:51:25 -06002951 if (filename) {
2952 if (read_buf_from_file(newcontents, flash_size, filename))
2953 goto _free_ret;
Daniel Campellofb0ee9c2021-03-19 12:51:25 -06002954 }
Daniel Campellocb88c9a2021-04-13 19:23:47 -06002955 /*
2956 * ... then update newcontents with contents from files provided to '-i'
2957 * args if needed.
2958 */
2959 if (read_buf_from_include_args(flash, newcontents))
2960 goto _free_ret;
Daniel Campellofb0ee9c2021-03-19 12:51:25 -06002961
2962 if (referencefile) {
2963 if (read_buf_from_file(refcontents, flash_size, referencefile))
2964 goto _free_ret;
2965 }
2966
Daniel Campelloc1c1f7b2021-03-19 13:09:27 -06002967 ret = flashrom_image_write(flash, newcontents, flash_size, refcontents);
Edward O'Callaghan919ddbd2020-12-03 13:17:30 +11002968
Daniel Campellofb0ee9c2021-03-19 12:51:25 -06002969_free_ret:
2970 free(refcontents);
2971 free(newcontents);
Edward O'Callaghan020dfa12020-09-23 23:12:55 +10002972 return ret;
2973}
2974
Edward O'Callaghan6e573be2020-12-18 10:38:06 +11002975int do_verify(struct flashctx *const flash, const char *const filename)
Edward O'Callaghan020dfa12020-09-23 23:12:55 +10002976{
Daniel Campellofb0ee9c2021-03-19 12:51:25 -06002977 const size_t flash_size = flash->chip->total_size * 1024;
2978 int ret = 1;
Edward O'Callaghan8e3e18f2020-12-03 13:12:06 +11002979
Daniel Campellocb88c9a2021-04-13 19:23:47 -06002980 uint8_t *const newcontents = malloc(flash_size);
2981 if (!newcontents) {
Daniel Campellofb0ee9c2021-03-19 12:51:25 -06002982 msg_gerr("Out of memory!\n");
2983 goto _free_ret;
2984 }
2985
Daniel Campellocb88c9a2021-04-13 19:23:47 -06002986 /* Read '-v' argument first... */
Daniel Campellofb0ee9c2021-03-19 12:51:25 -06002987 if (filename) {
2988 if (read_buf_from_file(newcontents, flash_size, filename))
2989 goto _free_ret;
Daniel Campellofb0ee9c2021-03-19 12:51:25 -06002990 }
Daniel Campellocb88c9a2021-04-13 19:23:47 -06002991 /*
2992 * ... then update newcontents with contents from files provided to '-i'
2993 * args if needed.
2994 */
2995 if (read_buf_from_include_args(flash, newcontents))
2996 goto _free_ret;
Daniel Campellofb0ee9c2021-03-19 12:51:25 -06002997
Daniel Campellof758a8b2021-03-22 14:47:13 -06002998 ret = flashrom_image_verify(flash, newcontents, flash_size);
Edward O'Callaghan919ddbd2020-12-03 13:17:30 +11002999
Daniel Campellofb0ee9c2021-03-19 12:51:25 -06003000_free_ret:
3001 free(newcontents);
Edward O'Callaghan020dfa12020-09-23 23:12:55 +10003002 return ret;
3003}