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stepand4b13752007-10-15 21:45:29 +00001/*
2 * This file is part of the flashrom project.
3 *
Edward O'Callaghanbcae3752018-12-19 13:11:57 +11004 * Copyright (C) 2007, 2008, 2009, 2010, 2011 Carl-Daniel Hailfinger
stepandbd3af12008-06-27 16:28:34 +00005 * Copyright (C) 2008 coresystems GmbH
stepand4b13752007-10-15 21:45:29 +00006 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation; version 2 of the License.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
stepand4b13752007-10-15 21:45:29 +000016 */
17
18/*
19 * Contains the generic SPI framework
20 */
21
oxygene70aa6502011-03-08 07:17:44 +000022#include <strings.h>
hailfinger132df7b2010-09-15 00:13:02 +000023#include <string.h>
stepand4b13752007-10-15 21:45:29 +000024#include "flash.h"
hailfinger66966da2009-06-15 14:14:48 +000025#include "flashchips.h"
snelson8913d082010-02-26 05:48:29 +000026#include "chipdrivers.h"
hailfinger428f6852010-07-27 22:41:39 +000027#include "programmer.h"
hailfinger78031562008-05-13 14:58:23 +000028#include "spi.h"
stepand4b13752007-10-15 21:45:29 +000029
Souvik Ghoshd75cd672016-06-17 14:21:39 -070030int spi_send_command(const struct flashctx *flash, unsigned int writecnt, unsigned int readcnt,
uwefa98ca12008-10-18 21:14:13 +000031 const unsigned char *writearr, unsigned char *readarr)
hailfinger35cc8162007-10-16 21:09:06 +000032{
Edward O'Callaghanbcae3752018-12-19 13:11:57 +110033 if (!flash->mst->spi.command) {
Duncan Laurie870d8af2019-01-09 18:05:23 -080034 msg_pdbg("%s called, but SPI is unsupported on this "
David Hendricksac1d25c2016-08-09 17:00:58 -070035 "hardware. Please report a bug at "
36 "flashrom@flashrom.org\n", __func__);
37 return 1;
38 }
39
Edward O'Callaghanbcae3752018-12-19 13:11:57 +110040 return flash->mst->spi.command(flash, writecnt, readcnt,
David Hendricksac1d25c2016-08-09 17:00:58 -070041 writearr, readarr);
hailfinger35cc8162007-10-16 21:09:06 +000042}
43
Souvik Ghoshd75cd672016-06-17 14:21:39 -070044int spi_send_multicommand(const struct flashctx *flash, struct spi_command *cmds)
hailfinger68002c22009-07-10 21:08:55 +000045{
Edward O'Callaghanbcae3752018-12-19 13:11:57 +110046 if (!flash->mst->spi.multicommand) {
Duncan Laurie870d8af2019-01-09 18:05:23 -080047 msg_pdbg("%s called, but SPI is unsupported on this "
David Hendricksac1d25c2016-08-09 17:00:58 -070048 "hardware. Please report a bug at "
49 "flashrom@flashrom.org\n", __func__);
50 return 1;
51 }
52
Edward O'Callaghanbcae3752018-12-19 13:11:57 +110053 return flash->mst->spi.multicommand(flash, cmds);
hailfinger948b81f2009-07-22 15:36:50 +000054}
55
Souvik Ghoshd75cd672016-06-17 14:21:39 -070056int default_spi_send_command(const struct flashctx *flash, unsigned int writecnt, unsigned int readcnt,
hailfinger948b81f2009-07-22 15:36:50 +000057 const unsigned char *writearr, unsigned char *readarr)
58{
59 struct spi_command cmd[] = {
60 {
61 .writecnt = writecnt,
62 .readcnt = readcnt,
63 .writearr = writearr,
64 .readarr = readarr,
65 }, {
66 .writecnt = 0,
67 .writearr = NULL,
68 .readcnt = 0,
69 .readarr = NULL,
70 }};
71
Souvik Ghoshd75cd672016-06-17 14:21:39 -070072 return spi_send_multicommand(flash, cmd);
hailfinger948b81f2009-07-22 15:36:50 +000073}
74
Souvik Ghoshd75cd672016-06-17 14:21:39 -070075int default_spi_send_multicommand(const struct flashctx *flash, struct spi_command *cmds)
hailfinger948b81f2009-07-22 15:36:50 +000076{
77 int result = 0;
hailfingerbb092112009-09-18 15:50:56 +000078 for (; (cmds->writecnt || cmds->readcnt) && !result; cmds++) {
Souvik Ghoshd75cd672016-06-17 14:21:39 -070079 result = spi_send_command(flash, cmds->writecnt, cmds->readcnt,
hailfingerbb092112009-09-18 15:50:56 +000080 cmds->writearr, cmds->readarr);
hailfinger948b81f2009-07-22 15:36:50 +000081 }
82 return result;
hailfinger68002c22009-07-10 21:08:55 +000083}
84
Souvik Ghoshd75cd672016-06-17 14:21:39 -070085int default_spi_read(struct flashctx *flash, uint8_t *buf, unsigned int start, unsigned int len)
mkarcher8fb57592011-05-11 17:07:02 +000086{
Edward O'Callaghanbcae3752018-12-19 13:11:57 +110087 unsigned int max_data = flash->mst->spi.max_data_read;
David Hendricks1ed1d352011-11-23 17:54:37 -080088 int rc;
mkarcher8fb57592011-05-11 17:07:02 +000089 if (max_data == MAX_DATA_UNSPECIFIED) {
90 msg_perr("%s called, but SPI read chunk size not defined "
91 "on this hardware. Please report a bug at "
92 "flashrom@flashrom.org\n", __func__);
93 return 1;
94 }
Edward O'Callaghan27486212019-07-26 21:59:55 +100095 rc = spi_read_chunked(flash, buf, start, len, max_data);
David Hendricks1ed1d352011-11-23 17:54:37 -080096 /* translate SPI-specific access denied error to generic error */
97 if (rc == SPI_ACCESS_DENIED)
98 rc = ACCESS_DENIED;
99 return rc;
mkarcher8fb57592011-05-11 17:07:02 +0000100}
101
Patrick Georgiab8353e2017-02-03 18:32:01 +0100102int default_spi_write_256(struct flashctx *flash, const uint8_t *buf, unsigned int start, unsigned int len)
mkarcher8fb57592011-05-11 17:07:02 +0000103{
Edward O'Callaghanbcae3752018-12-19 13:11:57 +1100104 unsigned int max_data = flash->mst->spi.max_data_write;
David Hendricks1ed1d352011-11-23 17:54:37 -0800105 int rc;
mkarcher8fb57592011-05-11 17:07:02 +0000106 if (max_data == MAX_DATA_UNSPECIFIED) {
107 msg_perr("%s called, but SPI write chunk size not defined "
108 "on this hardware. Please report a bug at "
109 "flashrom@flashrom.org\n", __func__);
110 return 1;
111 }
David Hendricks1ed1d352011-11-23 17:54:37 -0800112 rc = spi_write_chunked(flash, buf, start, len, max_data);
113 /* translate SPI-specific access denied error to generic error */
114 if (rc == SPI_ACCESS_DENIED)
115 rc = ACCESS_DENIED;
116 return rc;
mkarcher8fb57592011-05-11 17:07:02 +0000117}
118
Souvik Ghoshd75cd672016-06-17 14:21:39 -0700119int spi_chip_read(struct flashctx *flash, uint8_t *buf, unsigned int start, unsigned int len)
hailfingerb8f7e882008-01-19 00:04:46 +0000120{
stefanctc5eb8a92011-11-23 09:13:48 +0000121 unsigned int addrbase = 0;
Edward O'Callaghanbcae3752018-12-19 13:11:57 +1100122 if (!flash->mst->spi.read) {
David Hendricksac1d25c2016-08-09 17:00:58 -0700123 msg_perr("%s called, but SPI read is unsupported on this "
124 "hardware. Please report a bug at "
125 "flashrom@flashrom.org\n", __func__);
126 return 1;
127 }
128
hailfinger132df7b2010-09-15 00:13:02 +0000129 /* Check if the chip fits between lowest valid and highest possible
130 * address. Highest possible address with the current SPI implementation
131 * means 0xffffff, the highest unsigned 24bit number.
132 */
Souvik Ghoshd75cd672016-06-17 14:21:39 -0700133 addrbase = spi_get_valid_read_addr(flash);
Boris Baykov1a2f5322016-06-11 18:29:00 +0200134 /* Show flash chip size warning if flash chip doesn't support
135 4-Bytes Addressing mode and last address excedes 24 bits */
Edward O'Callaghan9713aa62019-07-18 18:28:57 +1000136 if (!(flash->chip->feature_bits & FEATURE_4BA_ENTER_WREN) &&
Boris Baykov1a2f5322016-06-11 18:29:00 +0200137 addrbase + flash->chip->total_size * 1024 > (1 << 24)) {
hailfinger132df7b2010-09-15 00:13:02 +0000138 msg_perr("Flash chip size exceeds the allowed access window. ");
139 msg_perr("Read will probably fail.\n");
140 /* Try to get the best alignment subject to constraints. */
Patrick Georgif3fa2992017-02-02 16:24:44 +0100141 addrbase = (1 << 24) - flash->chip->total_size * 1024;
hailfinger132df7b2010-09-15 00:13:02 +0000142 }
143 /* Check if alignment is native (at least the largest power of two which
144 * is a factor of the mapped size of the chip).
145 */
Patrick Georgif3fa2992017-02-02 16:24:44 +0100146 if (ffs(flash->chip->total_size * 1024) > (ffs(addrbase) ? : 33)) {
hailfinger132df7b2010-09-15 00:13:02 +0000147 msg_perr("Flash chip is not aligned natively in the allowed "
148 "access window.\n");
149 msg_perr("Read will probably return garbage.\n");
150 }
Edward O'Callaghanbcae3752018-12-19 13:11:57 +1100151 return flash->mst->spi.read(flash, buf, addrbase + start, len);
hailfingerb8f7e882008-01-19 00:04:46 +0000152}
153
hailfingered063f52009-05-09 02:30:21 +0000154/*
hailfingered063f52009-05-09 02:30:21 +0000155 * Program chip using page (256 bytes) programming.
156 * Some SPI masters can't do this, they use single byte programming instead.
hailfingerc7d06c62010-07-14 16:19:05 +0000157 * The redirect to single byte programming is achieved by setting
158 * .write_256 = spi_chip_write_1
hailfingered063f52009-05-09 02:30:21 +0000159 */
hailfingerc7d06c62010-07-14 16:19:05 +0000160/* real chunksize is up to 256, logical chunksize is 256 */
Patrick Georgiab8353e2017-02-03 18:32:01 +0100161int spi_chip_write_256(struct flashctx *flash, const uint8_t *buf, unsigned int start, unsigned int len)
hailfinger2c361e42008-05-13 23:03:12 +0000162{
Edward O'Callaghanbcae3752018-12-19 13:11:57 +1100163 if (!flash->mst->spi.write_256) {
David Hendricksac1d25c2016-08-09 17:00:58 -0700164 msg_perr("%s called, but SPI page write is unsupported on this "
165 "hardware. Please report a bug at "
166 "flashrom@flashrom.org\n", __func__);
167 return 1;
168 }
169
Edward O'Callaghanbcae3752018-12-19 13:11:57 +1100170 return flash->mst->spi.write_256(flash, buf, start, len);
hailfingerc7d06c62010-07-14 16:19:05 +0000171}
172
hailfingerb767c122010-05-28 15:53:08 +0000173/*
174 * Get the lowest allowed address for read accesses. This often happens to
175 * be the lowest allowed address for all commands which take an address.
176 * This is a programmer limitation.
177 */
Souvik Ghoshd75cd672016-06-17 14:21:39 -0700178uint32_t spi_get_valid_read_addr(struct flashctx *flash)
hailfinger54c14662009-05-13 11:40:08 +0000179{
Edward O'Callaghanbcae3752018-12-19 13:11:57 +1100180 switch (flash->mst->spi.type) {
hailfinger90c7d542010-05-31 15:27:27 +0000181#if CONFIG_INTERNAL == 1
hailfingerb767c122010-05-28 15:53:08 +0000182#if defined(__i386__) || defined(__x86_64__)
183 case SPI_CONTROLLER_ICH7:
184 /* Return BBAR for ICH chipsets. */
185 return ichspi_bbar;
186#endif
187#endif
188 default:
189 return 0;
190 }
hailfinger54c14662009-05-13 11:40:08 +0000191}
mkarcherd264e9e2011-05-11 17:07:07 +0000192
Edward O'Callaghanbcae3752018-12-19 13:11:57 +1100193int register_spi_master(const struct spi_master *mst)
mkarcherd264e9e2011-05-11 17:07:07 +0000194{
Edward O'Callaghanbcae3752018-12-19 13:11:57 +1100195 struct registered_master rmst;
196
197 if (!mst->write_256 || !mst->read || !mst->command ||
198 !mst->multicommand ||
199 ((mst->command == default_spi_send_command) &&
200 (mst->multicommand == default_spi_send_multicommand))) {
201 msg_perr("%s called with incomplete master definition. "
202 "Please report a bug at flashrom@flashrom.org\n", __func__);
203 return ERROR_FLASHROM_BUG;
204 }
205
206 rmst.buses_supported = BUS_SPI;
207 rmst.spi = *mst;
208
209 return register_master(&rmst);
David Hendricks91040832011-07-08 20:01:09 -0700210}