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rminnich8d3ff912003-10-25 17:01:29 +00001/*
uweb25f1ea2007-08-29 17:52:32 +00002 * This file is part of the flashrom project.
rminnich8d3ff912003-10-25 17:01:29 +00003 *
uwe555dd972007-09-09 20:21:05 +00004 * Copyright (C) 2000 Silicon Integrated System Corporation
5 * Copyright (C) 2006 Giampiero Giancipoli <gianci@email.it>
6 * Copyright (C) 2006 coresystems GmbH <info@coresystems.de>
hailfinger428f2012007-12-31 01:49:00 +00007 * Copyright (C) 2007 Carl-Daniel Hailfinger
rminnich8d3ff912003-10-25 17:01:29 +00008 *
uweb25f1ea2007-08-29 17:52:32 +00009 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License as published by
11 * the Free Software Foundation; either version 2 of the License, or
12 * (at your option) any later version.
rminnich8d3ff912003-10-25 17:01:29 +000013 *
uweb25f1ea2007-08-29 17:52:32 +000014 * This program is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details.
rminnich8d3ff912003-10-25 17:01:29 +000018 *
uweb25f1ea2007-08-29 17:52:32 +000019 * You should have received a copy of the GNU General Public License
20 * along with this program; if not, write to the Free Software
21 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
rminnich8d3ff912003-10-25 17:01:29 +000022 */
23
24#include <stdio.h>
ollie6a600992005-11-26 21:55:36 +000025#include <stdint.h>
rminnich8d3ff912003-10-25 17:01:29 +000026#include "flash.h"
rminnich8d3ff912003-10-25 17:01:29 +000027
stepan7abc6322006-11-22 00:29:51 +000028#define MAX_REFLASH_TRIES 0x10
29
hailfinger79cf3672008-05-14 12:03:06 +000030/* Check one byte for odd parity */
31uint8_t oddparity(uint8_t val)
32{
33 val = (val ^ (val >> 4)) & 0xf;
34 val = (val ^ (val >> 2)) & 0x3;
35 return (val ^ (val >> 1)) & 0x1;
36}
37
uwedf467892007-08-23 10:20:40 +000038void toggle_ready_jedec(volatile uint8_t *dst)
39{
40 unsigned int i = 0;
41 uint8_t tmp1, tmp2;
42
hailfingerba3761a2009-03-05 19:24:22 +000043 tmp1 = readb(dst) & 0x40;
uwedf467892007-08-23 10:20:40 +000044
45 while (i++ < 0xFFFFFFF) {
hailfingerba3761a2009-03-05 19:24:22 +000046 tmp2 = readb(dst) & 0x40;
uwedf467892007-08-23 10:20:40 +000047 if (tmp1 == tmp2) {
48 break;
49 }
50 tmp1 = tmp2;
51 }
52}
53
54void data_polling_jedec(volatile uint8_t *dst, uint8_t data)
55{
56 unsigned int i = 0;
57 uint8_t tmp;
58
59 data &= 0x80;
60
61 while (i++ < 0xFFFFFFF) {
hailfingerba3761a2009-03-05 19:24:22 +000062 tmp = readb(dst) & 0x80;
uwedf467892007-08-23 10:20:40 +000063 if (tmp == data) {
64 break;
65 }
66 }
67}
68
69void unprotect_jedec(volatile uint8_t *bios)
70{
hailfingerba3761a2009-03-05 19:24:22 +000071 writeb(0xAA, bios + 0x5555);
72 writeb(0x55, bios + 0x2AAA);
73 writeb(0x80, bios + 0x5555);
74 writeb(0xAA, bios + 0x5555);
75 writeb(0x55, bios + 0x2AAA);
76 writeb(0x20, bios + 0x5555);
uwedf467892007-08-23 10:20:40 +000077
78 usleep(200);
79}
80
81void protect_jedec(volatile uint8_t *bios)
82{
hailfingerba3761a2009-03-05 19:24:22 +000083 writeb(0xAA, bios + 0x5555);
84 writeb(0x55, bios + 0x2AAA);
85 writeb(0xA0, bios + 0x5555);
uwedf467892007-08-23 10:20:40 +000086
87 usleep(200);
88}
89
ollie5b621572004-03-20 16:46:10 +000090int probe_jedec(struct flashchip *flash)
rminnich8d3ff912003-10-25 17:01:29 +000091{
stepan7cd945e2007-05-23 17:20:56 +000092 volatile uint8_t *bios = flash->virtual_memory;
ollie6a600992005-11-26 21:55:36 +000093 uint8_t id1, id2;
hailfinger428f2012007-12-31 01:49:00 +000094 uint32_t largeid1, largeid2;
rminnich8d3ff912003-10-25 17:01:29 +000095
ollie5b621572004-03-20 16:46:10 +000096 /* Issue JEDEC Product ID Entry command */
hailfingerba3761a2009-03-05 19:24:22 +000097 writeb(0xAA, bios + 0x5555);
ollie5b621572004-03-20 16:46:10 +000098 myusec_delay(10);
hailfingerba3761a2009-03-05 19:24:22 +000099 writeb(0x55, bios + 0x2AAA);
ollie5b621572004-03-20 16:46:10 +0000100 myusec_delay(10);
hailfingerba3761a2009-03-05 19:24:22 +0000101 writeb(0x90, bios + 0x5555);
hailfinger9c715292007-11-13 14:56:54 +0000102 /* Older chips may need up to 100 us to respond. The ATMEL 29C020
stugeeeb86d02008-06-24 02:09:09 +0000103 * needs 10 ms according to the data sheet.
hailfinger9c715292007-11-13 14:56:54 +0000104 */
stugeeeb86d02008-06-24 02:09:09 +0000105 myusec_delay(10000);
rminnich8d3ff912003-10-25 17:01:29 +0000106
ollie5b621572004-03-20 16:46:10 +0000107 /* Read product ID */
hailfingerba3761a2009-03-05 19:24:22 +0000108 id1 = readb(bios);
109 id2 = readb(bios + 0x01);
hailfinger428f2012007-12-31 01:49:00 +0000110 largeid1 = id1;
111 largeid2 = id2;
112
113 /* Check if it is a continuation ID, this should be a while loop. */
114 if (id1 == 0x7F) {
115 largeid1 <<= 8;
hailfingerba3761a2009-03-05 19:24:22 +0000116 id1 = readb(bios + 0x100);
hailfinger428f2012007-12-31 01:49:00 +0000117 largeid1 |= id1;
118 }
119 if (id2 == 0x7F) {
120 largeid2 <<= 8;
hailfingerba3761a2009-03-05 19:24:22 +0000121 id2 = readb(bios + 0x101);
hailfinger428f2012007-12-31 01:49:00 +0000122 largeid2 |= id2;
123 }
rminnich8d3ff912003-10-25 17:01:29 +0000124
ollie5b621572004-03-20 16:46:10 +0000125 /* Issue JEDEC Product ID Exit command */
hailfingerba3761a2009-03-05 19:24:22 +0000126 writeb(0xAA, bios + 0x5555);
ollie5b621572004-03-20 16:46:10 +0000127 myusec_delay(10);
hailfingerba3761a2009-03-05 19:24:22 +0000128 writeb(0x55, bios + 0x2AAA);
ollie5b621572004-03-20 16:46:10 +0000129 myusec_delay(10);
hailfingerba3761a2009-03-05 19:24:22 +0000130 writeb(0xF0, bios + 0x5555);
hailfinger9c715292007-11-13 14:56:54 +0000131 myusec_delay(40);
rminnich8d3ff912003-10-25 17:01:29 +0000132
stugef45dc842009-01-25 23:52:45 +0000133 printf_debug("%s: id1 0x%02x, id2 0x%02x", __FUNCTION__, largeid1, largeid2);
hailfinger79cf3672008-05-14 12:03:06 +0000134 if (!oddparity(id1))
135 printf_debug(", id1 parity violation");
136 printf_debug("\n");
hailfinger428f2012007-12-31 01:49:00 +0000137 if (largeid1 == flash->manufacture_id && largeid2 == flash->model_id)
ollie5b621572004-03-20 16:46:10 +0000138 return 1;
rminnich8d3ff912003-10-25 17:01:29 +0000139
ollie5b621572004-03-20 16:46:10 +0000140 return 0;
olliea3def632004-03-19 22:10:07 +0000141}
142
ollie6a600992005-11-26 21:55:36 +0000143int erase_sector_jedec(volatile uint8_t *bios, unsigned int page)
olliea3def632004-03-19 22:10:07 +0000144{
ollie5b621572004-03-20 16:46:10 +0000145 /* Issue the Sector Erase command */
hailfingerba3761a2009-03-05 19:24:22 +0000146 writeb(0xAA, bios + 0x5555);
olliea3def632004-03-19 22:10:07 +0000147 myusec_delay(10);
hailfingerba3761a2009-03-05 19:24:22 +0000148 writeb(0x55, bios + 0x2AAA);
olliea3def632004-03-19 22:10:07 +0000149 myusec_delay(10);
hailfingerba3761a2009-03-05 19:24:22 +0000150 writeb(0x80, bios + 0x5555);
olliea3def632004-03-19 22:10:07 +0000151 myusec_delay(10);
ollie0eb62d62004-12-08 20:10:01 +0000152
hailfingerba3761a2009-03-05 19:24:22 +0000153 writeb(0xAA, bios + 0x5555);
olliea3def632004-03-19 22:10:07 +0000154 myusec_delay(10);
hailfingerba3761a2009-03-05 19:24:22 +0000155 writeb(0x55, bios + 0x2AAA);
olliea3def632004-03-19 22:10:07 +0000156 myusec_delay(10);
hailfingerba3761a2009-03-05 19:24:22 +0000157 writeb(0x30, bios + page);
ollie5b621572004-03-20 16:46:10 +0000158 myusec_delay(10);
159
olliea3def632004-03-19 22:10:07 +0000160 /* wait for Toggle bit ready */
161 toggle_ready_jedec(bios);
162
uwebe4477b2007-08-23 16:08:21 +0000163 return 0;
rminnich8d3ff912003-10-25 17:01:29 +0000164}
olliea4302802004-12-07 03:15:51 +0000165
ollie6a600992005-11-26 21:55:36 +0000166int erase_block_jedec(volatile uint8_t *bios, unsigned int block)
rminnichdfcbaa72004-09-30 16:37:01 +0000167{
rminnichdfcbaa72004-09-30 16:37:01 +0000168 /* Issue the Sector Erase command */
hailfingerba3761a2009-03-05 19:24:22 +0000169 writeb(0xAA, bios + 0x5555);
rminnichdfcbaa72004-09-30 16:37:01 +0000170 myusec_delay(10);
hailfingerba3761a2009-03-05 19:24:22 +0000171 writeb(0x55, bios + 0x2AAA);
rminnichdfcbaa72004-09-30 16:37:01 +0000172 myusec_delay(10);
hailfingerba3761a2009-03-05 19:24:22 +0000173 writeb(0x80, bios + 0x5555);
rminnichdfcbaa72004-09-30 16:37:01 +0000174 myusec_delay(10);
ollie0eb62d62004-12-08 20:10:01 +0000175
hailfingerba3761a2009-03-05 19:24:22 +0000176 writeb(0xAA, bios + 0x5555);
rminnichdfcbaa72004-09-30 16:37:01 +0000177 myusec_delay(10);
hailfingerba3761a2009-03-05 19:24:22 +0000178 writeb(0x55, bios + 0x2AAA);
rminnichdfcbaa72004-09-30 16:37:01 +0000179 myusec_delay(10);
hailfingerba3761a2009-03-05 19:24:22 +0000180 writeb(0x50, bios + block);
rminnichdfcbaa72004-09-30 16:37:01 +0000181 myusec_delay(10);
182
183 /* wait for Toggle bit ready */
184 toggle_ready_jedec(bios);
185
uwebe4477b2007-08-23 16:08:21 +0000186 return 0;
rminnichdfcbaa72004-09-30 16:37:01 +0000187}
rminnich8d3ff912003-10-25 17:01:29 +0000188
ollie5b621572004-03-20 16:46:10 +0000189int erase_chip_jedec(struct flashchip *flash)
rminnich8d3ff912003-10-25 17:01:29 +0000190{
stepan7cd945e2007-05-23 17:20:56 +0000191 volatile uint8_t *bios = flash->virtual_memory;
rminnich8d3ff912003-10-25 17:01:29 +0000192
ollie5b621572004-03-20 16:46:10 +0000193 /* Issue the JEDEC Chip Erase command */
hailfingerba3761a2009-03-05 19:24:22 +0000194 writeb(0xAA, bios + 0x5555);
rminnich8d3ff912003-10-25 17:01:29 +0000195 myusec_delay(10);
hailfingerba3761a2009-03-05 19:24:22 +0000196 writeb(0x55, bios + 0x2AAA);
olliea3def632004-03-19 22:10:07 +0000197 myusec_delay(10);
hailfingerba3761a2009-03-05 19:24:22 +0000198 writeb(0x80, bios + 0x5555);
olliea3def632004-03-19 22:10:07 +0000199 myusec_delay(10);
ollie0eb62d62004-12-08 20:10:01 +0000200
hailfingerba3761a2009-03-05 19:24:22 +0000201 writeb(0xAA, bios + 0x5555);
olliea3def632004-03-19 22:10:07 +0000202 myusec_delay(10);
hailfingerba3761a2009-03-05 19:24:22 +0000203 writeb(0x55, bios + 0x2AAA);
olliea3def632004-03-19 22:10:07 +0000204 myusec_delay(10);
hailfingerba3761a2009-03-05 19:24:22 +0000205 writeb(0x10, bios + 0x5555);
olliea3def632004-03-19 22:10:07 +0000206 myusec_delay(10);
207
rminnich8d3ff912003-10-25 17:01:29 +0000208 toggle_ready_jedec(bios);
209
uwebe4477b2007-08-23 16:08:21 +0000210 return 0;
rminnich8d3ff912003-10-25 17:01:29 +0000211}
212
ollie6a600992005-11-26 21:55:36 +0000213int write_page_write_jedec(volatile uint8_t *bios, uint8_t *src,
214 volatile uint8_t *dst, int page_size)
rminnich8d3ff912003-10-25 17:01:29 +0000215{
stepan7abc6322006-11-22 00:29:51 +0000216 int i, tried = 0, start_index = 0, ok;
217 volatile uint8_t *d = dst;
218 uint8_t *s = src;
rminnich8d3ff912003-10-25 17:01:29 +0000219
stepan7abc6322006-11-22 00:29:51 +0000220retry:
ollie5b621572004-03-20 16:46:10 +0000221 /* Issue JEDEC Data Unprotect comand */
hailfingerba3761a2009-03-05 19:24:22 +0000222 writeb(0xAA, bios + 0x5555);
223 writeb(0x55, bios + 0x2AAA);
224 writeb(0xA0, bios + 0x5555);
ollie5b621572004-03-20 16:46:10 +0000225
olliea4302802004-12-07 03:15:51 +0000226 /* transfer data from source to destination */
stepan7abc6322006-11-22 00:29:51 +0000227 for (i = start_index; i < page_size; i++) {
olliea4302802004-12-07 03:15:51 +0000228 /* If the data is 0xFF, don't program it */
uwef6641642007-05-09 10:17:44 +0000229 if (*src != 0xFF)
hailfingerba3761a2009-03-05 19:24:22 +0000230 writeb(*src, dst);
stepan7abc6322006-11-22 00:29:51 +0000231 dst++;
232 src++;
ollie5b621572004-03-20 16:46:10 +0000233 }
234
ollie5b621572004-03-20 16:46:10 +0000235 toggle_ready_jedec(dst - 1);
olliea4302802004-12-07 03:15:51 +0000236
stepan7abc6322006-11-22 00:29:51 +0000237 dst = d;
238 src = s;
239 ok = 1;
240 for (i = 0; i < page_size; i++) {
hailfingerba3761a2009-03-05 19:24:22 +0000241 if (readb(dst) != *src) {
stepan7abc6322006-11-22 00:29:51 +0000242 ok = 0;
243 break;
244 }
245 dst++;
246 src++;
247 }
uwef6641642007-05-09 10:17:44 +0000248
stepan7abc6322006-11-22 00:29:51 +0000249 if (!ok && tried++ < MAX_REFLASH_TRIES) {
250 start_index = i;
uwef6641642007-05-09 10:17:44 +0000251 goto retry;
252 }
stepan7abc6322006-11-22 00:29:51 +0000253 if (!ok) {
uwef6641642007-05-09 10:17:44 +0000254 fprintf(stderr, " page %d failed!\n",
255 (unsigned int)(d - bios) / page_size);
stepan7abc6322006-11-22 00:29:51 +0000256 }
uwebe4477b2007-08-23 16:08:21 +0000257 return !ok;
ollie5b621572004-03-20 16:46:10 +0000258}
259
ollie6a600992005-11-26 21:55:36 +0000260int write_byte_program_jedec(volatile uint8_t *bios, uint8_t *src,
261 volatile uint8_t *dst)
olliebb5917a2004-03-22 22:19:17 +0000262{
stepan7abc6322006-11-22 00:29:51 +0000263 int tried = 0, ok = 1;
olliedd68ded2004-12-08 02:10:33 +0000264
olliea4302802004-12-07 03:15:51 +0000265 /* If the data is 0xFF, don't program it */
olliebb5917a2004-03-22 22:19:17 +0000266 if (*src == 0xFF) {
stepan7abc6322006-11-22 00:29:51 +0000267 return -1;
olliebb5917a2004-03-22 22:19:17 +0000268 }
olliea4302802004-12-07 03:15:51 +0000269
olliedd68ded2004-12-08 02:10:33 +0000270retry:
olliebb5917a2004-03-22 22:19:17 +0000271 /* Issue JEDEC Byte Program command */
hailfingerba3761a2009-03-05 19:24:22 +0000272 writeb(0xAA, bios + 0x5555);
273 writeb(0x55, bios + 0x2AAA);
274 writeb(0xA0, bios + 0x5555);
olliea4302802004-12-07 03:15:51 +0000275
276 /* transfer data from source to destination */
hailfingerba3761a2009-03-05 19:24:22 +0000277 writeb(*src, dst);
olliebb5917a2004-03-22 22:19:17 +0000278 toggle_ready_jedec(bios);
ollief1845bd2004-03-27 00:18:15 +0000279
hailfingerba3761a2009-03-05 19:24:22 +0000280 if (readb(dst) != *src && tried++ < MAX_REFLASH_TRIES) {
uwef6641642007-05-09 10:17:44 +0000281 goto retry;
282 }
olliedd68ded2004-12-08 02:10:33 +0000283
stepan7abc6322006-11-22 00:29:51 +0000284 if (tried >= MAX_REFLASH_TRIES)
uwef6641642007-05-09 10:17:44 +0000285 ok = 0;
stepan7abc6322006-11-22 00:29:51 +0000286
uwebe4477b2007-08-23 16:08:21 +0000287 return !ok;
olliebb5917a2004-03-22 22:19:17 +0000288}
289
ollie6a600992005-11-26 21:55:36 +0000290int write_sector_jedec(volatile uint8_t *bios, uint8_t *src,
291 volatile uint8_t *dst, unsigned int page_size)
ollie5b621572004-03-20 16:46:10 +0000292{
293 int i;
ollie5b621572004-03-20 16:46:10 +0000294
295 for (i = 0; i < page_size; i++) {
ollief1845bd2004-03-27 00:18:15 +0000296 write_byte_program_jedec(bios, src, dst);
297 dst++, src++;
ollie5b621572004-03-20 16:46:10 +0000298 }
299
uwebe4477b2007-08-23 16:08:21 +0000300 return 0;
ollie5b621572004-03-20 16:46:10 +0000301}
302
ollie6a600992005-11-26 21:55:36 +0000303int write_jedec(struct flashchip *flash, uint8_t *buf)
ollie5b621572004-03-20 16:46:10 +0000304{
305 int i;
olliebb5917a2004-03-22 22:19:17 +0000306 int total_size = flash->total_size * 1024;
307 int page_size = flash->page_size;
stepan7cd945e2007-05-23 17:20:56 +0000308 volatile uint8_t *bios = flash->virtual_memory;
ollie5b621572004-03-20 16:46:10 +0000309
310 erase_chip_jedec(flash);
uwef6641642007-05-09 10:17:44 +0000311 // dumb check if erase was successful.
312 for (i = 0; i < total_size; i++) {
313 if (bios[i] != (uint8_t) 0xff) {
uwefd2d0fe2007-10-17 23:55:15 +0000314 printf("ERASE FAILED @%d, val %02x!\n", i, bios[i]);
uwef6641642007-05-09 10:17:44 +0000315 return -1;
316 }
317 }
stepan7abc6322006-11-22 00:29:51 +0000318
uwefd2d0fe2007-10-17 23:55:15 +0000319 printf("Programming page: ");
ollie5b621572004-03-20 16:46:10 +0000320 for (i = 0; i < total_size / page_size; i++) {
321 printf("%04d at address: 0x%08x", i, i * page_size);
ollief1845bd2004-03-27 00:18:15 +0000322 write_page_write_jedec(bios, buf + i * page_size,
323 bios + i * page_size, page_size);
olliebb5917a2004-03-22 22:19:17 +0000324 printf("\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b");
rminnich8d3ff912003-10-25 17:01:29 +0000325 }
326 printf("\n");
ollie5b621572004-03-20 16:46:10 +0000327 protect_jedec(bios);
rminnich8d3ff912003-10-25 17:01:29 +0000328
uwebe4477b2007-08-23 16:08:21 +0000329 return 0;
rminnich8d3ff912003-10-25 17:01:29 +0000330}