Original v2 revision: 3332
flashrom: Support Pm49FL004/2 Block Locking Registers
The PMC chips understand both LPC and FWH flash commands. When in FWH mode
(MSR_DIVIL_BALL_OPT(0x51400015) = 0x00000f7d on 5536 boards) the Block
Locking Registers by default lock the flash chip for write and erase - in
addition to any chipset write protection.
This patch adds unlock operations before Pm49FL004/2 write and erase, and
it includes an svn mv pm49fl004.c pm49fl00x.c
Thanks go to Nikolay for this patch.
Signed-off-by: Nikolay Petukhov <nikolay.petukhov@gmail.com>
Signed-off-by: Peter Stuge <peter@stuge.se>
Acked-by: Bari Ari <bari@onelabs.com>
git-svn-id: svn://coreboot.org/flashrom/trunk@243 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
diff --git a/flash.h b/flash.h
index 673643f..a3740ee 100644
--- a/flash.h
+++ b/flash.h
@@ -453,10 +453,10 @@
int erase_29f002(struct flashchip *flash);
int write_29f002(struct flashchip *flash, uint8_t *buf);
-/* pm49fl004.c */
-int probe_49fl004(struct flashchip *flash);
-int erase_49fl004(struct flashchip *flash);
-int write_49fl004(struct flashchip *flash, uint8_t *buf);
+/* pm49fl00x.c */
+int probe_49fl00x(struct flashchip *flash);
+int erase_49fl00x(struct flashchip *flash);
+int write_49fl00x(struct flashchip *flash, uint8_t *buf);
/* sharplhf00l04.c */
int probe_lhf00l04(struct flashchip *flash);