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gerrit.openfyde.cn / chromium.googlesource.com / chromiumos / third_party / flashrom / 00b29cfa29a7aab6713124a414da15de8e2acb24
commit00b29cfa29a7aab6713124a414da15de8e2acb24[log] [tgz]
authorAngel Pons <th3fanbus@gmail.com>Fri Jul 10 17:04:10 2020 +0200
committerCommit Bot <commit-bot@chromium.org>Mon May 17 15:37:12 2021 +0000
tree93f35ffdc129c72ba489dd8261aa9cab5aeeb268
parentf1eeda615c95c03b292840963fd3383f7bf0d4dc [diff]
BACKPORT: Add Gemini Lake support

The SPI hardware is pretty much unchanged from Apollo Lake. However, the
IFD differs significantly enough to require special handling.

BUG=none
BRANCH=none
TEST=builds

Original-Signed-off-by: Angel Pons <th3fanbus@gmail.com>
Original-Change-Id: Ib5dcdf204166f44a8531c19b5f363b851d2ccd77
Original-Reviewed-on: https://review.coreboot.org/c/flashrom/+/54276
Original-Reviewed-by: Edward O'Callaghan <quasisec@chromium.org>
Original-Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
(cherry picked from commit 11a35980defbf800e33e77cc7a82e89c33865b25)

Change-Id: Ibdec67c30a09f4c1b741a53f7d791b0fc0fd04f7
Signed-off-by: Edward O'Callaghan <quasisec@google.com>
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/third_party/flashrom/+/2896437
Reviewed-by: Sam McNally <sammc@chromium.org>
Commit-Queue: Edward O'Callaghan <quasisec@chromium.org>
Tested-by: Edward O'Callaghan <quasisec@chromium.org>
6 files changed
tree: 93f35ffdc129c72ba489dd8261aa9cab5aeeb268
  1. Documentation/
  2. tests/
  3. util/
  4. .gitattributes
  5. .gitignore
  6. 82802ab.c
  7. action_descriptor.c
  8. action_descriptor.h
  9. amd_imc.c
  10. archtest.c
  11. at45db.c
  12. atahpt.c
  13. atapromise.c
  14. atavia.c
  15. big_lock.c
  16. big_lock.h
  17. bitbang_spi.c
  18. board_enable.c
  19. buspirate_spi.c
  20. cbtable.c
  21. ch341a_spi.c
  22. chipdrivers.h
  23. chipset_enable.c
  24. cli_classic.c
  25. cli_common.c
  26. cli_output.c
  27. COPYING
  28. coreboot_tables.h
  29. cros_alias.c
  30. cros_ec.c
  31. cros_ec.h
  32. cros_ec_commands.h
  33. cros_ec_dev.c
  34. custom_baud.c
  35. custom_baud.h
  36. dediprog.c
  37. developerbox_spi.c
  38. digilent_spi.c
  39. dmi.c
  40. drkaiser.c
  41. dummyflasher.c
  42. edi.c
  43. edi.h
  44. en29lv640b.c
  45. endiantest.c
  46. ene.h
  47. ene_lpc.c
  48. file.c
  49. file.h
  50. file_lock.c
  51. flash.h
  52. flashchips.c
  53. flashchips.h
  54. flashrom.8.tmpl
  55. flashrom.c
  56. fmap.c
  57. fmap.h
  58. ft2232_spi.c
  59. gfxnvidia.c
  60. helpers.c
  61. hwaccess.c
  62. hwaccess.h
  63. hwaccess_x86_io.h
  64. i2c_helper.h
  65. i2c_helper_linux.c
  66. ich_descriptors.c
  67. ich_descriptors.h
  68. ichspi.c
  69. internal.c
  70. ipc_lock.h
  71. it8212.c
  72. it85spi.c
  73. it87spi.c
  74. jedec.c
  75. jlink_spi.c
  76. layout.c
  77. layout.h
  78. libflashrom.c
  79. libflashrom.h
  80. libflashrom.map
  81. linux_mtd.c
  82. linux_spi.c
  83. lspcon_i2c_spi.c
  84. Makefile
  85. mcp6x_spi.c
  86. mec1308.c
  87. meson.build
  88. meson_options.txt
  89. mstarddc_spi.c
  90. ni845x_spi.c
  91. nic3com.c
  92. nicintel.c
  93. nicintel_eeprom.c
  94. nicintel_spi.c
  95. nicnatsemi.c
  96. nicrealtek.c
  97. ogp_spi.c
  98. opaque.c
  99. os.h
  100. OWNERS
  101. pcidev.c
  102. physmap.c
  103. pickit2_spi.c
  104. platform.h
  105. pony_spi.c
  106. power.c
  107. power.h
  108. PRESUBMIT.cfg
  109. print.c
  110. print_wiki.c
  111. processor_enable.c
  112. programmer.c
  113. programmer.h
  114. raiden_debug_spi.c
  115. rayer_spi.c
  116. README
  117. README.chromiumos
  118. realtek_mst_i2c_spi.c
  119. s25f.c
  120. satamv.c
  121. satasii.c
  122. sb600spi.c
  123. serial.c
  124. serprog.c
  125. serprog.h
  126. sfdp.c
  127. spi.c
  128. spi.h
  129. spi25.c
  130. spi25_statusreg.c
  131. spi95.c
  132. sst28sf040.c
  133. sst49lfxxxc.c
  134. sst_fwhub.c
  135. stlinkv3_spi.c
  136. stm50.c
  137. udelay.c
  138. usb_device.c
  139. usb_device.h
  140. usbblaster_spi.c
  141. usbdev.c
  142. w29ee011.c
  143. w39.c
  144. wbsio_spi.c
  145. writeprotect.c
  146. writeprotect.h