FROMLIST: soc/mediatek/mt8192: Add EMI Settings of 8GB Normal Mode
By default, 8GB DDRs may use byte mode, but some DDRs also
use normal mode, add normal mode settings for supporting
this kind of DDRs.
Signed-off-by: Xi Chen <xixi.chen@mediatek.com>
Change-Id: Ia446c8d9279d815ff415af531a9bd872bded0515
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/third_party/coreboot/blobs/+/2744482
Reviewed-by: Yu-Ping Wu <yupingso@chromium.org>
Commit-Queue: Hung-Te Lin <hungte@chromium.org>
Commit-Queue: Yu-Ping Wu <yupingso@chromium.org>
Tested-by: Hung-Te Lin <hungte@chromium.org>
Auto-Submit: Hung-Te Lin <hungte@chromium.org>
diff --git a/soc/mediatek/mt8192/dram.elf b/soc/mediatek/mt8192/dram.elf
index ef69998..3ebab75 100644
--- a/soc/mediatek/mt8192/dram.elf
+++ b/soc/mediatek/mt8192/dram.elf
Binary files differ
diff --git a/soc/mediatek/mt8192/dram.elf.md5 b/soc/mediatek/mt8192/dram.elf.md5
index 2cc9713..1f8c2ec 100644
--- a/soc/mediatek/mt8192/dram.elf.md5
+++ b/soc/mediatek/mt8192/dram.elf.md5
@@ -1 +1 @@
-60df9250131a76f8e800b903c4b8670b *dram.elf
+9fb366552fa2c7a8151800e9df85e2df *dram.elf
diff --git a/soc/mediatek/mt8192/dram_release_notes.txt b/soc/mediatek/mt8192/dram_release_notes.txt
index 8296bab..9879730 100644
--- a/soc/mediatek/mt8192/dram_release_notes.txt
+++ b/soc/mediatek/mt8192/dram_release_notes.txt
@@ -1,3 +1,18 @@
+# 1.5.1
+
+1. A local build from 71629f0 (CL:*3639823), incompatible with previous versions.
+ Protocal (params header) version: 5
+
+2. Include changes:
+
+ CL:*3475447 dramc: mt8192: enable per-bank refresh
+ CL:*3531917 dramc: mt8192: Add ddr_type for struct sdram_info
+ CL:*3517916 dramc: mt8192: Add EMI Settings of 8GB normal mode
+ CL:*3568265 dramc: mt8192: Move memory address to 0x00250000 (Depends: CB:50017)
+ CL:*3574468 dramc: mt8192: Add blob version
+ CL:*3596349 dramc: mt8192: set max freq 3200 for discrete DDR
+ CL:*3639823 dramc: mt8192: fix blob version issue
+
# 2020.12.01
1. A local build and incompatible with previous versions.