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JB Tsai0c16a0f2015-03-19 14:30:31 +08001/*
2 * Copyright 2015 The Chromium OS Authors. All rights reserved.
3 * Use of this source code is governed by a BSD-style license that can be
4 * found in the LICENSE file.
5 */
6
Gurchetan Singh46faf6b2016-08-05 14:40:07 -07007#ifdef DRV_MEDIATEK
JB Tsai0c16a0f2015-03-19 14:30:31 +08008
Gurchetan Singh1b1d56a2017-03-10 16:25:23 -08009// clang-format off
Yiwei Zhang23d5fb32022-09-27 04:15:11 +000010#include <assert.h>
Stéphane Marchesin6ac299f2019-03-21 12:23:29 -070011#include <errno.h>
Luigi Santivetti500928f2018-08-28 10:09:20 +010012#include <fcntl.h>
Nicolas Boichatd7c83382019-08-29 21:46:29 +080013#include <inttypes.h>
Luigi Santivetti500928f2018-08-28 10:09:20 +010014#include <poll.h>
Ilja H. Friedelf9d2ab72015-04-09 14:08:36 -070015#include <stdio.h>
JB Tsai0c16a0f2015-03-19 14:30:31 +080016#include <string.h>
Gurchetan Singhef920532016-08-12 16:38:25 -070017#include <sys/mman.h>
Luigi Santivetti500928f2018-08-28 10:09:20 +010018#include <unistd.h>
JB Tsai0c16a0f2015-03-19 14:30:31 +080019#include <xf86drm.h>
20#include <mediatek_drm.h>
Gurchetan Singh1b1d56a2017-03-10 16:25:23 -080021// clang-format on
Gurchetan Singhef920532016-08-12 16:38:25 -070022
Yiwei Zhangb7a64442021-09-30 05:13:10 +000023#include "drv_helpers.h"
Gurchetan Singh46faf6b2016-08-05 14:40:07 -070024#include "drv_priv.h"
Gurchetan Singh179687e2016-10-28 10:07:35 -070025#include "util.h"
26
Miguel Casasdea0ccb2018-07-02 09:40:25 -040027#define TILE_TYPE_LINEAR 0
28
Hsin-Yi Wang8fe9f192022-01-18 17:51:02 +080029#if defined(MTK_MT8183) || defined(MTK_MT8186)
Yiwei Zhang185a1392022-09-08 19:21:19 +000030#define SUPPORTS_YUV422
Hsin-Yi Wang8fe9f192022-01-18 17:51:02 +080031#endif
32
33// All platforms except MT8173 should USE_NV12_FOR_HW_VIDEO_DECODING.
34#if defined(MTK_MT8183) || defined(MTK_MT8186) || defined(MTK_MT8192) || defined(MTK_MT8195)
35#define USE_NV12_FOR_HW_VIDEO_DECODING
Miguel Casas35fd7d22022-02-18 10:52:28 -080036#else
37#define DONT_USE_64_ALIGNMENT_FOR_VIDEO_BUFFERS
Hsin-Yi Wang8fe9f192022-01-18 17:51:02 +080038#endif
39
Yiwei Zhang5c937422022-08-10 18:23:30 +000040// For Mali Sigurd based GPUs, the texture unit reads outside the specified texture dimensions.
41// Therefore, certain formats require extra memory padding to its allocated surface to prevent the
42// hardware from reading outside an allocation. For YVU420, we need additional padding for the last
43// chroma plane.
44#if defined(MTK_MT8186)
45#define USE_EXTRA_PADDING_FOR_YVU420
46#endif
47
Gurchetan Singh469a3aa2017-08-03 18:17:34 -070048struct mediatek_private_map_data {
49 void *cached_addr;
50 void *gem_addr;
Luigi Santivetti500928f2018-08-28 10:09:20 +010051 int prime_fd;
Gurchetan Singh469a3aa2017-08-03 18:17:34 -070052};
53
Gurchetan Singh767c5382018-05-05 00:42:12 +000054static const uint32_t render_target_formats[] = { DRM_FORMAT_ABGR8888, DRM_FORMAT_ARGB8888,
Gurchetan Singh71bc6652018-09-17 17:42:05 -070055 DRM_FORMAT_RGB565, DRM_FORMAT_XBGR8888,
56 DRM_FORMAT_XRGB8888 };
Gurchetan Singh8ac0c9a2017-05-15 09:34:22 -070057
Hsin-Yi Wang8fe9f192022-01-18 17:51:02 +080058// clang-format off
Yiwei Zhangf4c17252021-10-30 08:29:48 +000059static const uint32_t texture_source_formats[] = {
Yiwei Zhang185a1392022-09-08 19:21:19 +000060#ifdef SUPPORTS_YUV422
Hsin-Yi Wang8fe9f192022-01-18 17:51:02 +080061 DRM_FORMAT_NV21,
62 DRM_FORMAT_YUYV,
Yiwei Zhang185a1392022-09-08 19:21:19 +000063#endif
Hsin-Yi Wang8fe9f192022-01-18 17:51:02 +080064 DRM_FORMAT_ABGR2101010,
65 DRM_FORMAT_ABGR16161616F,
Hsin-Yi Wang8fe9f192022-01-18 17:51:02 +080066 DRM_FORMAT_NV12,
67 DRM_FORMAT_YVU420,
68 DRM_FORMAT_YVU420_ANDROID
69};
Miguel Casas35fd7d22022-02-18 10:52:28 -080070
Miguel Casas35fd7d22022-02-18 10:52:28 -080071static const uint32_t video_yuv_formats[] = {
72 DRM_FORMAT_NV21,
73 DRM_FORMAT_NV12,
Justin Greenc9f64622022-08-22 16:46:16 -040074 DRM_FORMAT_YUYV,
Miguel Casas35fd7d22022-02-18 10:52:28 -080075 DRM_FORMAT_YVU420,
76 DRM_FORMAT_YVU420_ANDROID
77};
Hsin-Yi Wang8fe9f192022-01-18 17:51:02 +080078// clang-format on
Gurchetan Singh179687e2016-10-28 10:07:35 -070079
Miguel Casas35fd7d22022-02-18 10:52:28 -080080static bool is_video_yuv_format(uint32_t format)
81{
82 size_t i;
83 for (i = 0; i < ARRAY_SIZE(video_yuv_formats); ++i) {
84 if (format == video_yuv_formats[i])
85 return true;
86 }
87 return false;
88}
Miguel Casas35fd7d22022-02-18 10:52:28 -080089
Yiwei Zhang23d5fb32022-09-27 04:15:11 +000090static uint32_t get_format_horizontal_alignment(uint32_t format)
91{
92#ifdef DONT_USE_64_ALIGNMENT_FOR_VIDEO_BUFFERS
93 switch (format) {
94 case DRM_FORMAT_NV21:
95 case DRM_FORMAT_NV12:
96 case DRM_FORMAT_YUYV:
97 return 16;
98 case DRM_FORMAT_YVU420:
99 case DRM_FORMAT_YVU420_ANDROID:
100 /* see drv_bo_from_format_and_padding */
101 return 32;
102 default:
103 assert(!is_video_yuv_format(format));
104 break;
105 }
106#endif
107
108 /*
109 * Since the ARM L1 cache line size is 64 bytes, align to that as a
110 * performance optimization, except for video buffers on certain platforms,
111 * these should only be accessed from the GPU and VCODEC subsystems (maybe
112 * also MDP), so it's better to align to macroblocks.
113 */
114 return 64;
115}
116
Gurchetan Singh179687e2016-10-28 10:07:35 -0700117static int mediatek_init(struct driver *drv)
118{
Miguel Casasdea0ccb2018-07-02 09:40:25 -0400119 struct format_metadata metadata;
120
Gurchetan Singhd3001452017-11-03 17:18:36 -0700121 drv_add_combinations(drv, render_target_formats, ARRAY_SIZE(render_target_formats),
Gurchetan Singh1914f982020-03-24 13:53:51 -0700122 &LINEAR_METADATA, BO_USE_RENDER_MASK | BO_USE_SCANOUT);
Gurchetan Singh8ac0c9a2017-05-15 09:34:22 -0700123
Gurchetan Singhd3001452017-11-03 17:18:36 -0700124 drv_add_combinations(drv, texture_source_formats, ARRAY_SIZE(texture_source_formats),
125 &LINEAR_METADATA, BO_USE_TEXTURE_MASK);
Gurchetan Singh8ac0c9a2017-05-15 09:34:22 -0700126
Gurchetan Singhbbba9dd2020-10-12 17:31:10 -0700127 drv_add_combination(drv, DRM_FORMAT_R8, &LINEAR_METADATA, BO_USE_SW_MASK | BO_USE_LINEAR);
Hirokazu Hondafd8b8ab2020-06-16 15:28:56 +0900128
Justin Greenc9f64622022-08-22 16:46:16 -0400129 /* YUYV format for video overlay and camera subsystem. */
130 drv_add_combination(drv, DRM_FORMAT_YUYV, &LINEAR_METADATA,
Justin Green18051932022-08-30 13:04:29 -0400131 BO_USE_HW_VIDEO_DECODER | BO_USE_SCANOUT | BO_USE_LINEAR |
132 BO_USE_TEXTURE);
Justin Greenc9f64622022-08-22 16:46:16 -0400133
Gurchetan Singh71bc6652018-09-17 17:42:05 -0700134 /* Android CTS tests require this. */
135 drv_add_combination(drv, DRM_FORMAT_BGR888, &LINEAR_METADATA, BO_USE_SW_MASK);
136
Miguel Casasdea0ccb2018-07-02 09:40:25 -0400137 /* Support BO_USE_HW_VIDEO_DECODER for protected content minigbm allocations. */
138 metadata.tiling = TILE_TYPE_LINEAR;
139 metadata.priority = 1;
140 metadata.modifier = DRM_FORMAT_MOD_LINEAR;
141 drv_modify_combination(drv, DRM_FORMAT_YVU420, &metadata, BO_USE_HW_VIDEO_DECODER);
142 drv_modify_combination(drv, DRM_FORMAT_YVU420_ANDROID, &metadata, BO_USE_HW_VIDEO_DECODER);
Hsin-Yi Wang8fe9f192022-01-18 17:51:02 +0800143#ifdef USE_NV12_FOR_HW_VIDEO_DECODING
Wei Lee2f02cfb2020-08-05 17:24:45 +0800144 // TODO(hiroh): Switch to use NV12 for video decoder on MT8173 as well.
Hirokazu Honda0f0ce6f2019-07-24 19:40:20 +0900145 drv_modify_combination(drv, DRM_FORMAT_NV12, &metadata, BO_USE_HW_VIDEO_DECODER);
Wei Lee2f02cfb2020-08-05 17:24:45 +0800146#endif
Miguel Casasdea0ccb2018-07-02 09:40:25 -0400147
David Stevens49518142020-06-15 13:48:48 +0900148 /*
149 * R8 format is used for Android's HAL_PIXEL_FORMAT_BLOB for input/output from
150 * hardware decoder/encoder.
151 */
152 drv_modify_combination(drv, DRM_FORMAT_R8, &metadata,
Wei Leee03625b2020-07-21 11:27:14 +0800153 BO_USE_HW_VIDEO_DECODER | BO_USE_HW_VIDEO_ENCODER |
Yiwei Zhangbbe1fd32022-07-20 20:44:22 +0000154 BO_USE_CAMERA_READ | BO_USE_CAMERA_WRITE |
Jason Macnak80f664c2022-07-19 16:44:22 -0700155 BO_USE_GPU_DATA_BUFFER | BO_USE_SENSOR_DIRECT_DATA);
David Stevens49518142020-06-15 13:48:48 +0900156
Hirokazu Honda3bd681c2020-06-23 17:52:20 +0900157 /* NV12 format for encoding and display. */
158 drv_modify_combination(drv, DRM_FORMAT_NV12, &metadata,
Wei Leee03625b2020-07-21 11:27:14 +0800159 BO_USE_SCANOUT | BO_USE_HW_VIDEO_ENCODER | BO_USE_CAMERA_READ |
160 BO_USE_CAMERA_WRITE);
Hirokazu Honda3bd681c2020-06-23 17:52:20 +0900161
Wei Leee03625b2020-07-21 11:27:14 +0800162#ifdef MTK_MT8183
Nick Fan01c40142018-10-08 11:53:26 +0800163 /* Only for MT8183 Camera subsystem */
Nick Fan01c40142018-10-08 11:53:26 +0800164 drv_modify_combination(drv, DRM_FORMAT_NV21, &metadata,
165 BO_USE_CAMERA_READ | BO_USE_CAMERA_WRITE);
166 drv_modify_combination(drv, DRM_FORMAT_YUYV, &metadata,
167 BO_USE_CAMERA_READ | BO_USE_CAMERA_WRITE);
168 drv_modify_combination(drv, DRM_FORMAT_YVU420, &metadata,
169 BO_USE_CAMERA_READ | BO_USE_CAMERA_WRITE);
Jasmine Chenc7aa9742019-08-14 15:28:22 +0800170 /* Private formats for private reprocessing in camera */
171 drv_add_combination(drv, DRM_FORMAT_MTISP_SXYZW10, &metadata,
172 BO_USE_CAMERA_READ | BO_USE_CAMERA_WRITE | BO_USE_SW_MASK);
Nick Fan01c40142018-10-08 11:53:26 +0800173#endif
174
Gurchetan Singh8ac0c9a2017-05-15 09:34:22 -0700175 return drv_modify_linear_combinations(drv);
Gurchetan Singh179687e2016-10-28 10:07:35 -0700176}
JB Tsai0c16a0f2015-03-19 14:30:31 +0800177
Fritz Koenig1b9b5b92019-03-19 13:25:45 -0700178static int mediatek_bo_create_with_modifiers(struct bo *bo, uint32_t width, uint32_t height,
179 uint32_t format, const uint64_t *modifiers,
180 uint32_t count)
JB Tsai0c16a0f2015-03-19 14:30:31 +0800181{
JB Tsai0c16a0f2015-03-19 14:30:31 +0800182 int ret;
Gurchetan Singh42cc6d62016-08-29 18:19:19 -0700183 size_t plane;
Gurchetan Singh6423ecb2017-03-29 08:23:40 -0700184 uint32_t stride;
Gurchetan Singh99644382020-10-07 15:28:11 -0700185 struct drm_mtk_gem_create gem_create = { 0 };
Hsin-Yi Wang2581c472022-04-06 17:34:33 +0800186 /*
187 * We identify the ChromeOS Camera App buffers via these two USE flags. Those buffers need
188 * the same alignment as the video hardware encoding.
189 */
190 const bool is_camera_preview =
191 (bo->meta.use_flags & BO_USE_SCANOUT) && (bo->meta.use_flags & BO_USE_CAMERA_WRITE);
JB Tsai0c16a0f2015-03-19 14:30:31 +0800192
Fritz Koenig1b9b5b92019-03-19 13:25:45 -0700193 if (!drv_has_modifier(modifiers, count, DRM_FORMAT_MOD_LINEAR)) {
194 errno = EINVAL;
Yiwei Zhang04954732022-07-13 23:34:33 +0000195 drv_loge("no usable modifier found\n");
Fritz Koenig1b9b5b92019-03-19 13:25:45 -0700196 return -EINVAL;
197 }
198
Gurchetan Singh6423ecb2017-03-29 08:23:40 -0700199 stride = drv_stride_from_format(format, width, 0);
Yiwei Zhang23d5fb32022-09-27 04:15:11 +0000200 stride = ALIGN(stride, get_format_horizontal_alignment(format));
Hirokazu Honda2a2bfc22019-10-11 15:54:50 +0900201
Hsin-Yi Wang2581c472022-04-06 17:34:33 +0800202 if ((bo->meta.use_flags & BO_USE_HW_VIDEO_ENCODER) || is_camera_preview) {
Hirokazu Honda2a2bfc22019-10-11 15:54:50 +0900203 uint32_t aligned_height = ALIGN(height, 32);
204 uint32_t padding[DRV_MAX_PLANES] = { 0 };
205
206 for (plane = 0; plane < bo->meta.num_planes; ++plane) {
207 uint32_t plane_stride = drv_stride_from_format(format, stride, plane);
208 padding[plane] = plane_stride *
209 (32 / drv_vertical_subsampling_from_format(format, plane));
210 }
211
212 drv_bo_from_format_and_padding(bo, stride, aligned_height, format, padding);
213 } else {
Yiwei Zhang185a1392022-09-08 19:21:19 +0000214#ifdef SUPPORTS_YUV422
Moja Hsu059ac082019-10-02 14:47:10 +0800215 /*
216 * JPEG Encoder Accelerator requires 16x16 alignment. We want the buffer
217 * from camera can be put in JEA directly so align the height to 16
218 * bytes.
219 */
220 if (format == DRM_FORMAT_NV12)
221 height = ALIGN(height, 16);
222#endif
Hirokazu Honda2a2bfc22019-10-11 15:54:50 +0900223 drv_bo_from_format(bo, stride, height, format);
Yiwei Zhang5c937422022-08-10 18:23:30 +0000224
225#ifdef USE_EXTRA_PADDING_FOR_YVU420
Yiwei Zhangb2dde012022-09-27 04:12:54 +0000226 /*
227 * Apply extra padding for YV12 if the height does not meet round up requirement and
228 * the image is to be sampled by gpu.
229 */
230 static const uint32_t required_round_up = 4;
231 const uint32_t height_mod = height % required_round_up;
Yiwei Zhang5c937422022-08-10 18:23:30 +0000232 if ((format == DRM_FORMAT_YVU420 || format == DRM_FORMAT_YVU420_ANDROID) &&
Yiwei Zhangb2dde012022-09-27 04:12:54 +0000233 (bo->meta.use_flags & BO_USE_TEXTURE) && height_mod) {
234 const uint32_t height_padding = required_round_up - height_mod;
235 const uint32_t u_padding =
236 drv_size_from_format(format, bo->meta.strides[2], height_padding, 2);
237
238 bo->meta.total_size += u_padding;
239
240 /*
241 * Since we are not aligning Y, we must make sure that its padding fits
242 * inside the rest of the space allocated for the V/U planes.
243 */
244 const uint32_t y_padding =
245 drv_size_from_format(format, bo->meta.strides[0], height_padding, 0);
246 const uint32_t vu_size = drv_bo_get_plane_size(bo, 2) * 2;
247 if (y_padding > vu_size) {
248 /* Align with mali workaround to pad all 3 planes. */
249 bo->meta.total_size += y_padding + u_padding;
250 }
Yiwei Zhang5c937422022-08-10 18:23:30 +0000251 }
252#endif
Hirokazu Honda2a2bfc22019-10-11 15:54:50 +0900253 }
Yuly Novikov96c7a3b2015-12-08 22:48:29 -0500254
Gurchetan Singh298b7572019-09-19 09:55:18 -0700255 gem_create.size = bo->meta.total_size;
JB Tsai0c16a0f2015-03-19 14:30:31 +0800256
Gurchetan Singh46faf6b2016-08-05 14:40:07 -0700257 ret = drmIoctl(bo->drv->fd, DRM_IOCTL_MTK_GEM_CREATE, &gem_create);
Ilja H. Friedelf9d2ab72015-04-09 14:08:36 -0700258 if (ret) {
Yiwei Zhang04954732022-07-13 23:34:33 +0000259 drv_loge("DRM_IOCTL_MTK_GEM_CREATE failed (size=%" PRIu64 ")\n", gem_create.size);
Stéphane Marchesin6ac299f2019-03-21 12:23:29 -0700260 return -errno;
Ilja H. Friedelf9d2ab72015-04-09 14:08:36 -0700261 }
JB Tsai0c16a0f2015-03-19 14:30:31 +0800262
Gurchetan Singh298b7572019-09-19 09:55:18 -0700263 for (plane = 0; plane < bo->meta.num_planes; plane++)
Gurchetan Singh42cc6d62016-08-29 18:19:19 -0700264 bo->handles[plane].u32 = gem_create.handle;
JB Tsai0c16a0f2015-03-19 14:30:31 +0800265
266 return 0;
267}
268
Fritz Koenig1b9b5b92019-03-19 13:25:45 -0700269static int mediatek_bo_create(struct bo *bo, uint32_t width, uint32_t height, uint32_t format,
270 uint64_t use_flags)
271{
272 uint64_t modifiers[] = { DRM_FORMAT_MOD_LINEAR };
273 return mediatek_bo_create_with_modifiers(bo, width, height, format, modifiers,
274 ARRAY_SIZE(modifiers));
275}
276
Gurchetan Singhee43c302017-11-14 18:20:27 -0800277static void *mediatek_bo_map(struct bo *bo, struct vma *vma, size_t plane, uint32_t map_flags)
Gurchetan Singhef920532016-08-12 16:38:25 -0700278{
Luigi Santivetti500928f2018-08-28 10:09:20 +0100279 int ret, prime_fd;
Gurchetan Singh99644382020-10-07 15:28:11 -0700280 struct drm_mtk_gem_map_off gem_map = { 0 };
Gurchetan Singh469a3aa2017-08-03 18:17:34 -0700281 struct mediatek_private_map_data *priv;
Yiwei Zhangafdf87d2021-09-28 04:06:06 +0000282 void *addr = NULL;
Gurchetan Singhef920532016-08-12 16:38:25 -0700283
Gurchetan Singhef920532016-08-12 16:38:25 -0700284 gem_map.handle = bo->handles[0].u32;
285
286 ret = drmIoctl(bo->drv->fd, DRM_IOCTL_MTK_GEM_MAP_OFFSET, &gem_map);
287 if (ret) {
Yiwei Zhang04954732022-07-13 23:34:33 +0000288 drv_loge("DRM_IOCTL_MTK_GEM_MAP_OFFSET failed\n");
Gurchetan Singhef920532016-08-12 16:38:25 -0700289 return MAP_FAILED;
290 }
291
David Stevensddb56b52020-03-13 15:24:37 +0900292 prime_fd = drv_bo_get_plane_fd(bo, 0);
293 if (prime_fd < 0) {
Yiwei Zhang04954732022-07-13 23:34:33 +0000294 drv_loge("Failed to get a prime fd\n");
Luigi Santivetti500928f2018-08-28 10:09:20 +0100295 return MAP_FAILED;
296 }
297
Yiwei Zhangafdf87d2021-09-28 04:06:06 +0000298 addr = mmap(0, bo->meta.total_size, drv_get_prot(map_flags), MAP_SHARED, bo->drv->fd,
299 gem_map.offset);
300 if (addr == MAP_FAILED)
301 goto out_close_prime_fd;
Gurchetan Singh469a3aa2017-08-03 18:17:34 -0700302
Gurchetan Singh298b7572019-09-19 09:55:18 -0700303 vma->length = bo->meta.total_size;
Gurchetan Singh1a31e602016-10-06 10:58:00 -0700304
Luigi Santivetti500928f2018-08-28 10:09:20 +0100305 priv = calloc(1, sizeof(*priv));
Yiwei Zhangafdf87d2021-09-28 04:06:06 +0000306 if (!priv)
307 goto out_unmap_addr;
Luigi Santivetti500928f2018-08-28 10:09:20 +0100308
Gurchetan Singh298b7572019-09-19 09:55:18 -0700309 if (bo->meta.use_flags & BO_USE_RENDERSCRIPT) {
310 priv->cached_addr = calloc(1, bo->meta.total_size);
Yiwei Zhangafdf87d2021-09-28 04:06:06 +0000311 if (!priv->cached_addr)
312 goto out_free_priv;
313
Gurchetan Singh469a3aa2017-08-03 18:17:34 -0700314 priv->gem_addr = addr;
Gurchetan Singh469a3aa2017-08-03 18:17:34 -0700315 addr = priv->cached_addr;
316 }
317
Yiwei Zhangafdf87d2021-09-28 04:06:06 +0000318 priv->prime_fd = prime_fd;
319 vma->priv = priv;
320
Gurchetan Singh469a3aa2017-08-03 18:17:34 -0700321 return addr;
Yiwei Zhangafdf87d2021-09-28 04:06:06 +0000322
323out_free_priv:
324 free(priv);
325out_unmap_addr:
326 munmap(addr, bo->meta.total_size);
327out_close_prime_fd:
328 close(prime_fd);
329 return MAP_FAILED;
Gurchetan Singh469a3aa2017-08-03 18:17:34 -0700330}
331
Gurchetan Singhee43c302017-11-14 18:20:27 -0800332static int mediatek_bo_unmap(struct bo *bo, struct vma *vma)
Gurchetan Singh469a3aa2017-08-03 18:17:34 -0700333{
Gurchetan Singhee43c302017-11-14 18:20:27 -0800334 if (vma->priv) {
335 struct mediatek_private_map_data *priv = vma->priv;
Luigi Santivettia72f4422018-09-12 16:28:21 +0100336
337 if (priv->cached_addr) {
338 vma->addr = priv->gem_addr;
339 free(priv->cached_addr);
340 }
341
Luigi Santivetti500928f2018-08-28 10:09:20 +0100342 close(priv->prime_fd);
Gurchetan Singh469a3aa2017-08-03 18:17:34 -0700343 free(priv);
Gurchetan Singhee43c302017-11-14 18:20:27 -0800344 vma->priv = NULL;
Gurchetan Singh469a3aa2017-08-03 18:17:34 -0700345 }
346
Gurchetan Singhee43c302017-11-14 18:20:27 -0800347 return munmap(vma->addr, vma->length);
Gurchetan Singhef920532016-08-12 16:38:25 -0700348}
349
Gurchetan Singhef262d82017-11-28 16:56:17 -0800350static int mediatek_bo_invalidate(struct bo *bo, struct mapping *mapping)
351{
Luigi Santivetti500928f2018-08-28 10:09:20 +0100352 struct mediatek_private_map_data *priv = mapping->vma->priv;
353
354 if (priv) {
355 struct pollfd fds = {
356 .fd = priv->prime_fd,
357 };
358
359 if (mapping->vma->map_flags & BO_MAP_WRITE)
360 fds.events |= POLLOUT;
361
362 if (mapping->vma->map_flags & BO_MAP_READ)
363 fds.events |= POLLIN;
364
365 poll(&fds, 1, -1);
366 if (fds.revents != fds.events)
Yiwei Zhang04954732022-07-13 23:34:33 +0000367 drv_loge("poll prime_fd failed\n");
Luigi Santivetti500928f2018-08-28 10:09:20 +0100368
369 if (priv->cached_addr)
Gurchetan Singh298b7572019-09-19 09:55:18 -0700370 memcpy(priv->cached_addr, priv->gem_addr, bo->meta.total_size);
Gurchetan Singhef262d82017-11-28 16:56:17 -0800371 }
372
373 return 0;
374}
375
Gurchetan Singh47e629b2017-11-02 14:07:18 -0700376static int mediatek_bo_flush(struct bo *bo, struct mapping *mapping)
Gurchetan Singh8e02e052017-09-14 14:18:43 -0700377{
Gurchetan Singh47e629b2017-11-02 14:07:18 -0700378 struct mediatek_private_map_data *priv = mapping->vma->priv;
Luigi Santivetti500928f2018-08-28 10:09:20 +0100379 if (priv && priv->cached_addr && (mapping->vma->map_flags & BO_MAP_WRITE))
Gurchetan Singh298b7572019-09-19 09:55:18 -0700380 memcpy(priv->gem_addr, priv->cached_addr, bo->meta.total_size);
Gurchetan Singh8e02e052017-09-14 14:18:43 -0700381
382 return 0;
383}
384
Yiwei Zhangb8ad7b82021-10-01 17:55:14 +0000385static void mediatek_resolve_format_and_use_flags(struct driver *drv, uint32_t format,
386 uint64_t use_flags, uint32_t *out_format,
387 uint64_t *out_use_flags)
Gurchetan Singh42cc6d62016-08-29 18:19:19 -0700388{
Yiwei Zhangb8ad7b82021-10-01 17:55:14 +0000389 *out_format = format;
390 *out_use_flags = use_flags;
Gurchetan Singh42cc6d62016-08-29 18:19:19 -0700391 switch (format) {
Gurchetan Singhf3b22da2016-11-21 10:46:38 -0800392 case DRM_FORMAT_FLEX_IMPLEMENTATION_DEFINED:
Nick Fan01c40142018-10-08 11:53:26 +0800393#ifdef MTK_MT8183
Jasmine Chenc7aa9742019-08-14 15:28:22 +0800394 /* Only MT8183 Camera subsystem offers private reprocessing
395 * capability. CAMERA_READ indicates the buffer is intended for
396 * reprocessing and hence given the private format for MTK. */
Yiwei Zhangb8ad7b82021-10-01 17:55:14 +0000397 if (use_flags & BO_USE_CAMERA_READ) {
398 *out_format = DRM_FORMAT_MTISP_SXYZW10;
399 break;
400 }
Nick Fan01c40142018-10-08 11:53:26 +0800401#endif
Yiwei Zhangb8ad7b82021-10-01 17:55:14 +0000402 if (use_flags & BO_USE_CAMERA_WRITE) {
403 *out_format = DRM_FORMAT_NV12;
404 break;
405 }
Wei Leee03625b2020-07-21 11:27:14 +0800406
Yiwei Zhangb8ad7b82021-10-01 17:55:14 +0000407 /* HACK: See b/28671744 */
408 *out_format = DRM_FORMAT_XBGR8888;
Yiwei Zhang3a171db2021-10-01 22:12:05 +0000409 *out_use_flags &= ~BO_USE_HW_VIDEO_ENCODER;
Yiwei Zhangb8ad7b82021-10-01 17:55:14 +0000410 break;
Gurchetan Singhf3b22da2016-11-21 10:46:38 -0800411 case DRM_FORMAT_FLEX_YCbCr_420_888:
Hsin-Yi Wang8fe9f192022-01-18 17:51:02 +0800412#ifdef USE_NV12_FOR_HW_VIDEO_DECODING
Wei Lee2f02cfb2020-08-05 17:24:45 +0800413 // TODO(hiroh): Switch to use NV12 for video decoder on MT8173 as well.
414 if (use_flags & (BO_USE_HW_VIDEO_DECODER)) {
Yiwei Zhangb8ad7b82021-10-01 17:55:14 +0000415 *out_format = DRM_FORMAT_NV12;
416 break;
Wei Lee2f02cfb2020-08-05 17:24:45 +0800417 }
418#endif
419 if (use_flags &
420 (BO_USE_CAMERA_READ | BO_USE_CAMERA_WRITE | BO_USE_HW_VIDEO_ENCODER)) {
Yiwei Zhangb8ad7b82021-10-01 17:55:14 +0000421 *out_format = DRM_FORMAT_NV12;
422 break;
Hirokazu Honda2a2bfc22019-10-11 15:54:50 +0900423 }
Yiwei Zhangb3caf222021-10-01 21:55:58 +0000424
425 /* HACK: See b/139714614 */
Yiwei Zhangb8ad7b82021-10-01 17:55:14 +0000426 *out_format = DRM_FORMAT_YVU420;
Yiwei Zhangb3caf222021-10-01 21:55:58 +0000427 *out_use_flags &= ~BO_USE_SCANOUT;
Yiwei Zhangb8ad7b82021-10-01 17:55:14 +0000428 break;
Gurchetan Singh42cc6d62016-08-29 18:19:19 -0700429 default:
Yiwei Zhangb8ad7b82021-10-01 17:55:14 +0000430 break;
Gurchetan Singh42cc6d62016-08-29 18:19:19 -0700431 }
Hsin-Yi Wangd4df3d52022-03-28 13:29:06 +0800432 /* Mediatek doesn't support YUV overlays */
433 if (is_video_yuv_format(format))
434 *out_use_flags &= ~BO_USE_SCANOUT;
Gurchetan Singh42cc6d62016-08-29 18:19:19 -0700435}
436
Gurchetan Singh3e9d3832017-10-31 10:36:25 -0700437const struct backend backend_mediatek = {
JB Tsai0c16a0f2015-03-19 14:30:31 +0800438 .name = "mediatek",
Gurchetan Singh179687e2016-10-28 10:07:35 -0700439 .init = mediatek_init,
Gurchetan Singhd7c84fd2016-08-16 18:18:24 -0700440 .bo_create = mediatek_bo_create,
Fritz Koenig1b9b5b92019-03-19 13:25:45 -0700441 .bo_create_with_modifiers = mediatek_bo_create_with_modifiers,
Gurchetan Singh46faf6b2016-08-05 14:40:07 -0700442 .bo_destroy = drv_gem_bo_destroy,
Gurchetan Singh71611d62017-01-03 16:49:56 -0800443 .bo_import = drv_prime_bo_import,
Gurchetan Singhd7c84fd2016-08-16 18:18:24 -0700444 .bo_map = mediatek_bo_map,
Gurchetan Singh469a3aa2017-08-03 18:17:34 -0700445 .bo_unmap = mediatek_bo_unmap,
Gurchetan Singhef262d82017-11-28 16:56:17 -0800446 .bo_invalidate = mediatek_bo_invalidate,
Gurchetan Singh8e02e052017-09-14 14:18:43 -0700447 .bo_flush = mediatek_bo_flush,
Yiwei Zhangb8ad7b82021-10-01 17:55:14 +0000448 .resolve_format_and_use_flags = mediatek_resolve_format_and_use_flags,
JB Tsai0c16a0f2015-03-19 14:30:31 +0800449};
450
451#endif