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Stéphane Marchesin25a26062014-09-12 16:18:59 -07001/*
Daniele Castagna7a755de2016-12-16 17:32:30 -05002 * Copyright 2014 The Chromium OS Authors. All rights reserved.
Stéphane Marchesin25a26062014-09-12 16:18:59 -07003 * Use of this source code is governed by a BSD-style license that can be
4 * found in the LICENSE file.
5 */
6
Gurchetan Singh46faf6b2016-08-05 14:40:07 -07007#ifdef DRV_ROCKCHIP
Stéphane Marchesin25a26062014-09-12 16:18:59 -07008
Zach Reizner58080df2016-04-27 11:14:41 -07009#include <errno.h>
Nicolas Boichatd7c83382019-08-29 21:46:29 +080010#include <inttypes.h>
Gurchetan Singh1b1d56a2017-03-10 16:25:23 -080011#include <rockchip_drm.h>
Ilja H. Friedelf9d2ab72015-04-09 14:08:36 -070012#include <stdio.h>
Stéphane Marchesin25a26062014-09-12 16:18:59 -070013#include <string.h>
Gurchetan Singhef920532016-08-12 16:38:25 -070014#include <sys/mman.h>
Stéphane Marchesin25a26062014-09-12 16:18:59 -070015#include <xf86drm.h>
Stéphane Marchesin25a26062014-09-12 16:18:59 -070016
Gurchetan Singh46faf6b2016-08-05 14:40:07 -070017#include "drv_priv.h"
Dominik Behre13ac282015-01-13 00:59:21 -080018#include "helpers.h"
Zach Reizner58080df2016-04-27 11:14:41 -070019#include "util.h"
Stéphane Marchesin25a26062014-09-12 16:18:59 -070020
Gurchetan Singh469a3aa2017-08-03 18:17:34 -070021struct rockchip_private_map_data {
22 void *cached_addr;
23 void *gem_addr;
24};
25
Gurchetan Singh767c5382018-05-05 00:42:12 +000026static const uint32_t render_target_formats[] = { DRM_FORMAT_ABGR8888, DRM_FORMAT_ARGB8888,
Gurchetan Singhabe44f62018-06-06 17:01:51 -070027 DRM_FORMAT_BGR888, DRM_FORMAT_RGB565,
28 DRM_FORMAT_XBGR8888, DRM_FORMAT_XRGB8888 };
Gurchetan Singh8ac0c9a2017-05-15 09:34:22 -070029
Gurchetan Singhdc9b1202019-06-04 16:53:54 -070030static const uint32_t texture_source_formats[] = { DRM_FORMAT_NV12, DRM_FORMAT_YVU420,
31 DRM_FORMAT_YVU420_ANDROID };
Gurchetan Singh179687e2016-10-28 10:07:35 -070032
Gurchetan Singh1b1d56a2017-03-10 16:25:23 -080033static int afbc_bo_from_format(struct bo *bo, uint32_t width, uint32_t height, uint32_t format)
Kristian H. Kristensenb1efbd82016-09-06 11:43:26 -070034{
35 /* We've restricted ourselves to four bytes per pixel. */
36 const uint32_t pixel_size = 4;
37
38 const uint32_t clump_width = 4;
39 const uint32_t clump_height = 4;
40
41#define AFBC_NARROW 1
42#if AFBC_NARROW == 1
43 const uint32_t block_width = 4 * clump_width;
44 const uint32_t block_height = 4 * clump_height;
45#else
46 const uint32_t block_width = 8 * clump_width;
47 const uint32_t block_height = 2 * clump_height;
48#endif
49
50 const uint32_t header_block_size = 16;
51 const uint32_t body_block_size = block_width * block_height * pixel_size;
52 const uint32_t width_in_blocks = DIV_ROUND_UP(width, block_width);
53 const uint32_t height_in_blocks = DIV_ROUND_UP(height, block_height);
54 const uint32_t total_blocks = width_in_blocks * height_in_blocks;
55
56 const uint32_t header_plane_size = total_blocks * header_block_size;
57 const uint32_t body_plane_size = total_blocks * body_block_size;
58
59 /* GPU requires 64 bytes, but EGL import code expects 1024 byte
60 * alignement for the body plane. */
61 const uint32_t body_plane_alignment = 1024;
62
Gurchetan Singh1b1d56a2017-03-10 16:25:23 -080063 const uint32_t body_plane_offset = ALIGN(header_plane_size, body_plane_alignment);
64 const uint32_t total_size = body_plane_offset + body_plane_size;
Kristian H. Kristensenb1efbd82016-09-06 11:43:26 -070065
Gurchetan Singh298b7572019-09-19 09:55:18 -070066 bo->meta.strides[0] = width_in_blocks * block_width * pixel_size;
67 bo->meta.sizes[0] = total_size;
68 bo->meta.offsets[0] = 0;
Kristian H. Kristensenb1efbd82016-09-06 11:43:26 -070069
Gurchetan Singh298b7572019-09-19 09:55:18 -070070 bo->meta.total_size = total_size;
Kristian H. Kristensenb1efbd82016-09-06 11:43:26 -070071
Gurchetan Singh298b7572019-09-19 09:55:18 -070072 bo->meta.format_modifiers[0] = DRM_FORMAT_MOD_CHROMEOS_ROCKCHIP_AFBC;
Kristian H. Kristensenb1efbd82016-09-06 11:43:26 -070073
74 return 0;
75}
76
Gurchetan Singh6b41fb52017-03-01 20:14:39 -080077static int rockchip_add_kms_item(struct driver *drv, const struct kms_item *item)
78{
Gurchetan Singh8ac0c9a2017-05-15 09:34:22 -070079 uint32_t i, j;
Gurchetan Singha1892b22017-09-28 16:40:52 -070080 uint64_t use_flags;
Gurchetan Singh6b41fb52017-03-01 20:14:39 -080081 struct combination *combo;
82 struct format_metadata metadata;
83
Gurchetan Singhbc9a87d2017-11-03 17:17:35 -070084 for (i = 0; i < drv_array_size(drv->combos); i++) {
85 combo = (struct combination *)drv_array_at_idx(drv->combos, i);
Gurchetan Singh6b41fb52017-03-01 20:14:39 -080086 if (combo->format == item->format) {
Gurchetan Singh1b1d56a2017-03-10 16:25:23 -080087 if (item->modifier == DRM_FORMAT_MOD_CHROMEOS_ROCKCHIP_AFBC) {
Gurchetan Singha1892b22017-09-28 16:40:52 -070088 use_flags = BO_USE_RENDERING | BO_USE_SCANOUT | BO_USE_TEXTURE;
Gurchetan Singh6b41fb52017-03-01 20:14:39 -080089 metadata.modifier = item->modifier;
90 metadata.tiling = 0;
91 metadata.priority = 2;
92
Gurchetan Singh8ac0c9a2017-05-15 09:34:22 -070093 for (j = 0; j < ARRAY_SIZE(texture_source_formats); j++) {
94 if (item->format == texture_source_formats[j])
Gurchetan Singha1892b22017-09-28 16:40:52 -070095 use_flags &= ~BO_USE_RENDERING;
Gurchetan Singh8ac0c9a2017-05-15 09:34:22 -070096 }
97
Gurchetan Singhbc9a87d2017-11-03 17:17:35 -070098 drv_add_combinations(drv, &item->format, 1, &metadata, use_flags);
Gurchetan Singh6b41fb52017-03-01 20:14:39 -080099 } else {
Gurchetan Singha1892b22017-09-28 16:40:52 -0700100 combo->use_flags |= item->use_flags;
Gurchetan Singh6b41fb52017-03-01 20:14:39 -0800101 }
102 }
103 }
104
105 return 0;
106}
107
Gurchetan Singh179687e2016-10-28 10:07:35 -0700108static int rockchip_init(struct driver *drv)
109{
Gurchetan Singh6b41fb52017-03-01 20:14:39 -0800110 int ret;
Gurchetan Singhbc9a87d2017-11-03 17:17:35 -0700111 uint32_t i;
112 struct drv_array *kms_items;
Gurchetan Singh6b41fb52017-03-01 20:14:39 -0800113 struct format_metadata metadata;
114
115 metadata.tiling = 0;
116 metadata.priority = 1;
Kristian H. Kristensenbc8c5932017-10-24 18:36:32 -0700117 metadata.modifier = DRM_FORMAT_MOD_LINEAR;
Gurchetan Singh6b41fb52017-03-01 20:14:39 -0800118
Gurchetan Singhd3001452017-11-03 17:18:36 -0700119 drv_add_combinations(drv, render_target_formats, ARRAY_SIZE(render_target_formats),
120 &metadata, BO_USE_RENDER_MASK);
Gurchetan Singh8ac0c9a2017-05-15 09:34:22 -0700121
Gurchetan Singhd3001452017-11-03 17:18:36 -0700122 drv_add_combinations(drv, texture_source_formats, ARRAY_SIZE(texture_source_formats),
123 &metadata, BO_USE_TEXTURE_MASK);
Gurchetan Singh6b41fb52017-03-01 20:14:39 -0800124
Hirokazu Honda3b8d4d02019-07-31 16:35:52 +0900125 /*
126 * Chrome uses DMA-buf mmap to write to YV12 buffers, which are then accessed by the
127 * Video Encoder Accelerator (VEA). It could also support NV12 potentially in the future.
128 */
129 drv_modify_combination(drv, DRM_FORMAT_YVU420, &metadata, BO_USE_HW_VIDEO_ENCODER);
130 drv_modify_combination(drv, DRM_FORMAT_NV12, &metadata, BO_USE_HW_VIDEO_ENCODER);
131
Gurchetan Singh1b1d56a2017-03-10 16:25:23 -0800132 drv_modify_combination(drv, DRM_FORMAT_XRGB8888, &metadata, BO_USE_CURSOR | BO_USE_SCANOUT);
133 drv_modify_combination(drv, DRM_FORMAT_ARGB8888, &metadata, BO_USE_CURSOR | BO_USE_SCANOUT);
Gurchetan Singh6b41fb52017-03-01 20:14:39 -0800134
Jeffy Chen55525f52017-09-19 17:15:30 +0800135 /* Camera ISP supports only NV12 output. */
136 drv_modify_combination(drv, DRM_FORMAT_NV12, &metadata,
Miguel Casasdea0ccb2018-07-02 09:40:25 -0400137 BO_USE_CAMERA_READ | BO_USE_CAMERA_WRITE | BO_USE_HW_VIDEO_DECODER);
Jeffy Chen55525f52017-09-19 17:15:30 +0800138 /*
139 * R8 format is used for Android's HAL_PIXEL_FORMAT_BLOB and is used for JPEG snapshots
140 * from camera.
141 */
Gurchetan Singhdc9b1202019-06-04 16:53:54 -0700142 drv_add_combination(drv, DRM_FORMAT_R8, &metadata,
143 BO_USE_CAMERA_READ | BO_USE_CAMERA_WRITE | BO_USE_SW_MASK |
144 BO_USE_LINEAR);
Jeffy Chen55525f52017-09-19 17:15:30 +0800145
Gurchetan Singhbc9a87d2017-11-03 17:17:35 -0700146 kms_items = drv_query_kms(drv);
147 if (!kms_items)
Gurchetan Singh6b41fb52017-03-01 20:14:39 -0800148 return 0;
149
Gurchetan Singhbc9a87d2017-11-03 17:17:35 -0700150 for (i = 0; i < drv_array_size(kms_items); i++) {
151 ret = rockchip_add_kms_item(drv, (struct kms_item *)drv_array_at_idx(kms_items, i));
Gurchetan Singh6b41fb52017-03-01 20:14:39 -0800152 if (ret) {
Gurchetan Singhbc9a87d2017-11-03 17:17:35 -0700153 drv_array_destroy(kms_items);
Gurchetan Singh6b41fb52017-03-01 20:14:39 -0800154 return ret;
155 }
156 }
157
Gurchetan Singhbc9a87d2017-11-03 17:17:35 -0700158 drv_array_destroy(kms_items);
Gurchetan Singh6b41fb52017-03-01 20:14:39 -0800159 return 0;
Gurchetan Singh179687e2016-10-28 10:07:35 -0700160}
161
Gurchetan Singh1b1d56a2017-03-10 16:25:23 -0800162static int rockchip_bo_create_with_modifiers(struct bo *bo, uint32_t width, uint32_t height,
163 uint32_t format, const uint64_t *modifiers,
Kristian H. Kristensenb1efbd82016-09-06 11:43:26 -0700164 uint32_t count)
Stéphane Marchesin25a26062014-09-12 16:18:59 -0700165{
Zach Reizner58080df2016-04-27 11:14:41 -0700166 int ret;
Gurchetan Singh42cc6d62016-08-29 18:19:19 -0700167 size_t plane;
Gurchetan Singhf64487b2016-07-14 19:54:44 -0700168 struct drm_rockchip_gem_create gem_create;
Zach Reizner58080df2016-04-27 11:14:41 -0700169
Pin-chih Lin19643412017-07-25 08:06:26 +0000170 if (format == DRM_FORMAT_NV12) {
Hirokazu Hondab892a8f2019-08-01 16:37:47 +0900171 uint32_t w_mbs = DIV_ROUND_UP(width, 16);
172 uint32_t h_mbs = DIV_ROUND_UP(height, 16);
Pin-chih Lin19643412017-07-25 08:06:26 +0000173
174 uint32_t aligned_width = w_mbs * 16;
Pin-chih Lin19643412017-07-25 08:06:26 +0000175
Hirokazu Hondab80c6b92019-08-30 11:07:53 +0900176 // TODO(b/140152839): Align height by 16 once camera HAL
177 // supports multi planar format.
178 drv_bo_from_format(bo, aligned_width, height, format);
Hirokazu Hondab892a8f2019-08-01 16:37:47 +0900179 /*
180 * drv_bo_from_format updates total_size. Add an extra data space for rockchip video
181 * driver to store motion vectors.
182 */
Gurchetan Singh298b7572019-09-19 09:55:18 -0700183 bo->meta.total_size += w_mbs * h_mbs * 128;
Pin-chih Lin19643412017-07-25 08:06:26 +0000184 } else if (width <= 2560 &&
Fritz Koenig1b9b5b92019-03-19 13:25:45 -0700185 drv_has_modifier(modifiers, count, DRM_FORMAT_MOD_CHROMEOS_ROCKCHIP_AFBC)) {
Kristian H. Kristensenb1efbd82016-09-06 11:43:26 -0700186 /* If the caller has decided they can use AFBC, always
187 * pick that */
188 afbc_bo_from_format(bo, width, height, format);
Gurchetan Singh10a11802016-09-23 15:27:07 -0700189 } else {
Fritz Koenig1b9b5b92019-03-19 13:25:45 -0700190 if (!drv_has_modifier(modifiers, count, DRM_FORMAT_MOD_LINEAR)) {
Kristian H. Kristensenb1efbd82016-09-06 11:43:26 -0700191 errno = EINVAL;
Alistair Strachan0cfaaa52018-03-19 14:03:23 -0700192 drv_log("no usable modifier found\n");
Kristian H. Kristensenb1efbd82016-09-06 11:43:26 -0700193 return -1;
194 }
Gurchetan Singh6ea14ba2017-02-08 15:09:13 -0800195
Pin-chih Lin19643412017-07-25 08:06:26 +0000196 uint32_t stride;
Gurchetan Singh6ea14ba2017-02-08 15:09:13 -0800197 /*
Pin-chih Lin19643412017-07-25 08:06:26 +0000198 * Since the ARM L1 cache line size is 64 bytes, align to that
199 * as a performance optimization. For YV12, the Mali cmem allocator
200 * requires that chroma planes are aligned to 64-bytes, so align the
201 * luma plane to 128 bytes.
Gurchetan Singh6ea14ba2017-02-08 15:09:13 -0800202 */
Gurchetan Singh6423ecb2017-03-29 08:23:40 -0700203 stride = drv_stride_from_format(format, width, 0);
Gurchetan Singh1b1d56a2017-03-10 16:25:23 -0800204 if (format == DRM_FORMAT_YVU420 || format == DRM_FORMAT_YVU420_ANDROID)
Gurchetan Singh4c3aa422017-03-23 18:47:06 -0700205 stride = ALIGN(stride, 128);
206 else
207 stride = ALIGN(stride, 64);
208
Gurchetan Singh6423ecb2017-03-29 08:23:40 -0700209 drv_bo_from_format(bo, stride, height, format);
Gurchetan Singh10a11802016-09-23 15:27:07 -0700210 }
Gurchetan Singh42cc6d62016-08-29 18:19:19 -0700211
Gurchetan Singhf64487b2016-07-14 19:54:44 -0700212 memset(&gem_create, 0, sizeof(gem_create));
Gurchetan Singh298b7572019-09-19 09:55:18 -0700213 gem_create.size = bo->meta.total_size;
Gurchetan Singhf64487b2016-07-14 19:54:44 -0700214
Gurchetan Singh1b1d56a2017-03-10 16:25:23 -0800215 ret = drmIoctl(bo->drv->fd, DRM_IOCTL_ROCKCHIP_GEM_CREATE, &gem_create);
Gurchetan Singhf64487b2016-07-14 19:54:44 -0700216
217 if (ret) {
Nicolas Boichatd7c83382019-08-29 21:46:29 +0800218 drv_log("DRM_IOCTL_ROCKCHIP_GEM_CREATE failed (size=%" PRIu64 ")\n",
219 gem_create.size);
Stéphane Marchesin6ac299f2019-03-21 12:23:29 -0700220 return -errno;
Zach Reizner58080df2016-04-27 11:14:41 -0700221 }
222
Gurchetan Singh298b7572019-09-19 09:55:18 -0700223 for (plane = 0; plane < bo->meta.num_planes; plane++)
Gurchetan Singh42cc6d62016-08-29 18:19:19 -0700224 bo->handles[plane].u32 = gem_create.handle;
225
226 return 0;
Stéphane Marchesin25a26062014-09-12 16:18:59 -0700227}
228
Gurchetan Singh1b1d56a2017-03-10 16:25:23 -0800229static int rockchip_bo_create(struct bo *bo, uint32_t width, uint32_t height, uint32_t format,
Gurchetan Singha1892b22017-09-28 16:40:52 -0700230 uint64_t use_flags)
Kristian H. Kristensenb1efbd82016-09-06 11:43:26 -0700231{
Kristian H. Kristensenbc8c5932017-10-24 18:36:32 -0700232 uint64_t modifiers[] = { DRM_FORMAT_MOD_LINEAR };
Gurchetan Singh1b1d56a2017-03-10 16:25:23 -0800233 return rockchip_bo_create_with_modifiers(bo, width, height, format, modifiers,
234 ARRAY_SIZE(modifiers));
Kristian H. Kristensenb1efbd82016-09-06 11:43:26 -0700235}
236
Gurchetan Singhee43c302017-11-14 18:20:27 -0800237static void *rockchip_bo_map(struct bo *bo, struct vma *vma, size_t plane, uint32_t map_flags)
Gurchetan Singhef920532016-08-12 16:38:25 -0700238{
239 int ret;
240 struct drm_rockchip_gem_map_off gem_map;
Gurchetan Singh469a3aa2017-08-03 18:17:34 -0700241 struct rockchip_private_map_data *priv;
Gurchetan Singhef920532016-08-12 16:38:25 -0700242
Kristian H. Kristensenb1efbd82016-09-06 11:43:26 -0700243 /* We can only map buffers created with SW access flags, which should
244 * have no modifiers (ie, not AFBC). */
Gurchetan Singh298b7572019-09-19 09:55:18 -0700245 if (bo->meta.format_modifiers[0] == DRM_FORMAT_MOD_CHROMEOS_ROCKCHIP_AFBC)
Kristian H. Kristensenb1efbd82016-09-06 11:43:26 -0700246 return MAP_FAILED;
247
Gurchetan Singhef920532016-08-12 16:38:25 -0700248 memset(&gem_map, 0, sizeof(gem_map));
249 gem_map.handle = bo->handles[0].u32;
250
Gurchetan Singh1b1d56a2017-03-10 16:25:23 -0800251 ret = drmIoctl(bo->drv->fd, DRM_IOCTL_ROCKCHIP_GEM_MAP_OFFSET, &gem_map);
Gurchetan Singhef920532016-08-12 16:38:25 -0700252 if (ret) {
Alistair Strachan0cfaaa52018-03-19 14:03:23 -0700253 drv_log("DRM_IOCTL_ROCKCHIP_GEM_MAP_OFFSET failed\n");
Gurchetan Singhef920532016-08-12 16:38:25 -0700254 return MAP_FAILED;
255 }
256
Gurchetan Singh298b7572019-09-19 09:55:18 -0700257 void *addr = mmap(0, bo->meta.total_size, drv_get_prot(map_flags), MAP_SHARED, bo->drv->fd,
Gurchetan Singhcfb88762017-09-28 17:14:50 -0700258 gem_map.offset);
Gurchetan Singh469a3aa2017-08-03 18:17:34 -0700259
Gurchetan Singh298b7572019-09-19 09:55:18 -0700260 vma->length = bo->meta.total_size;
Gurchetan Singh1a31e602016-10-06 10:58:00 -0700261
Gurchetan Singh298b7572019-09-19 09:55:18 -0700262 if (bo->meta.use_flags & BO_USE_RENDERSCRIPT) {
Gurchetan Singh469a3aa2017-08-03 18:17:34 -0700263 priv = calloc(1, sizeof(*priv));
Gurchetan Singh298b7572019-09-19 09:55:18 -0700264 priv->cached_addr = calloc(1, bo->meta.total_size);
Gurchetan Singh469a3aa2017-08-03 18:17:34 -0700265 priv->gem_addr = addr;
Gurchetan Singhee43c302017-11-14 18:20:27 -0800266 vma->priv = priv;
Gurchetan Singh469a3aa2017-08-03 18:17:34 -0700267 addr = priv->cached_addr;
268 }
269
270 return addr;
271}
272
Gurchetan Singhee43c302017-11-14 18:20:27 -0800273static int rockchip_bo_unmap(struct bo *bo, struct vma *vma)
Gurchetan Singh469a3aa2017-08-03 18:17:34 -0700274{
Gurchetan Singhee43c302017-11-14 18:20:27 -0800275 if (vma->priv) {
276 struct rockchip_private_map_data *priv = vma->priv;
277 vma->addr = priv->gem_addr;
Gurchetan Singh469a3aa2017-08-03 18:17:34 -0700278 free(priv->cached_addr);
279 free(priv);
Gurchetan Singhee43c302017-11-14 18:20:27 -0800280 vma->priv = NULL;
Gurchetan Singh469a3aa2017-08-03 18:17:34 -0700281 }
282
Gurchetan Singhee43c302017-11-14 18:20:27 -0800283 return munmap(vma->addr, vma->length);
Gurchetan Singhef920532016-08-12 16:38:25 -0700284}
285
Gurchetan Singhef262d82017-11-28 16:56:17 -0800286static int rockchip_bo_invalidate(struct bo *bo, struct mapping *mapping)
287{
288 if (mapping->vma->priv) {
289 struct rockchip_private_map_data *priv = mapping->vma->priv;
Gurchetan Singh298b7572019-09-19 09:55:18 -0700290 memcpy(priv->cached_addr, priv->gem_addr, bo->meta.total_size);
Gurchetan Singhef262d82017-11-28 16:56:17 -0800291 }
292
293 return 0;
294}
295
Gurchetan Singh47e629b2017-11-02 14:07:18 -0700296static int rockchip_bo_flush(struct bo *bo, struct mapping *mapping)
Gurchetan Singh8e02e052017-09-14 14:18:43 -0700297{
Gurchetan Singh47e629b2017-11-02 14:07:18 -0700298 struct rockchip_private_map_data *priv = mapping->vma->priv;
299 if (priv && (mapping->vma->map_flags & BO_MAP_WRITE))
Gurchetan Singh298b7572019-09-19 09:55:18 -0700300 memcpy(priv->gem_addr, priv->cached_addr, bo->meta.total_size);
Gurchetan Singh8e02e052017-09-14 14:18:43 -0700301
302 return 0;
303}
304
Gurchetan Singh0d44d482019-06-04 19:39:51 -0700305static uint32_t rockchip_resolve_format(struct driver *drv, uint32_t format, uint64_t use_flags)
Gurchetan Singhbfba8c22016-08-16 17:57:10 -0700306{
307 switch (format) {
Gurchetan Singhf3b22da2016-11-21 10:46:38 -0800308 case DRM_FORMAT_FLEX_IMPLEMENTATION_DEFINED:
Jeffy Chen55525f52017-09-19 17:15:30 +0800309 /* Camera subsystem requires NV12. */
Gurchetan Singha1892b22017-09-28 16:40:52 -0700310 if (use_flags & (BO_USE_CAMERA_READ | BO_USE_CAMERA_WRITE))
Jeffy Chen55525f52017-09-19 17:15:30 +0800311 return DRM_FORMAT_NV12;
Gurchetan Singhd6fb5772016-08-29 19:13:51 -0700312 /*HACK: See b/28671744 */
Gurchetan Singhf3b22da2016-11-21 10:46:38 -0800313 return DRM_FORMAT_XBGR8888;
314 case DRM_FORMAT_FLEX_YCbCr_420_888:
315 return DRM_FORMAT_NV12;
Gurchetan Singhd6fb5772016-08-29 19:13:51 -0700316 default:
317 return format;
Gurchetan Singhbfba8c22016-08-16 17:57:10 -0700318 }
319}
320
Gurchetan Singh3e9d3832017-10-31 10:36:25 -0700321const struct backend backend_rockchip = {
Stéphane Marchesin25a26062014-09-12 16:18:59 -0700322 .name = "rockchip",
Gurchetan Singh179687e2016-10-28 10:07:35 -0700323 .init = rockchip_init,
Gurchetan Singhd7c84fd2016-08-16 18:18:24 -0700324 .bo_create = rockchip_bo_create,
Kristian H. Kristensenb1efbd82016-09-06 11:43:26 -0700325 .bo_create_with_modifiers = rockchip_bo_create_with_modifiers,
Gurchetan Singh46faf6b2016-08-05 14:40:07 -0700326 .bo_destroy = drv_gem_bo_destroy,
Gurchetan Singh71611d62017-01-03 16:49:56 -0800327 .bo_import = drv_prime_bo_import,
Gurchetan Singhd7c84fd2016-08-16 18:18:24 -0700328 .bo_map = rockchip_bo_map,
Gurchetan Singh469a3aa2017-08-03 18:17:34 -0700329 .bo_unmap = rockchip_bo_unmap,
Gurchetan Singhef262d82017-11-28 16:56:17 -0800330 .bo_invalidate = rockchip_bo_invalidate,
Gurchetan Singh8e02e052017-09-14 14:18:43 -0700331 .bo_flush = rockchip_bo_flush,
Gurchetan Singhbfba8c22016-08-16 17:57:10 -0700332 .resolve_format = rockchip_resolve_format,
Stéphane Marchesin25a26062014-09-12 16:18:59 -0700333};
334
335#endif