When requested, prefix multipart blobs with an index structure.
An index is requested by having a with_index property in the blob or keyblock
type entries in the fdt fmap. The index structure has a 32 bit count, and then
pairs of 32 bit integers which have the offset and length of each
subcomponent. The device tree FMAP is adjusted to reflect the new offsets of
the subcomponents.
BUG=chrome-os-partner:16412
TEST=Built U-Boot with and without this change on Link and verified that it
still booted. As part of debugging, printed out the contents of the index and
the start of the RW firmware from within U-Boot and verified that they were
what we expected. Built snow firmware with and without this change and
verified that it was byte identical except for a version string which was
repeated a few times. Booted firmware built with this change on snow.
BRANCH=None
Change-Id: Ibe5ea068d63c3217e6d898c1bc0cf484cc76da56
Signed-off-by: Gabe Black <gabeblack@google.com>
Reviewed-on: https://gerrit.chromium.org/gerrit/41188
Reviewed-by: Che-Liang Chiou <clchiou@chromium.org>
Commit-Queue: Gabe Black <gabeblack@chromium.org>
Tested-by: Gabe Black <gabeblack@chromium.org>
diff --git a/host/lib/bundle_firmware.py b/host/lib/bundle_firmware.py
index 36f9bb5..2a0cfec 100644
--- a/host/lib/bundle_firmware.py
+++ b/host/lib/bundle_firmware.py
@@ -948,7 +948,7 @@
# blob_type)
else:
prop_list = spl_payload[0].split(',')
- spl_load_size = len(pack.ConcatPropContents(prop_list)[0])
+ spl_load_size = len(pack.ConcatPropContents(prop_list, False)[0])
self._out.Info("BL2/SPL contains '%s', size is %d / %#x" %
(', '.join(prop_list), spl_load_size, spl_load_size))
bl2 = self.ConfigureExynosBl2(fdt, spl_load_size, self.exynos_bl2)