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H. Peter Anvinea6e34d2002-04-30 20:51:32 +00001/* disasm.c where all the _work_ gets done in the Netwide Disassembler
2 *
3 * The Netwide Assembler is copyright (C) 1996 Simon Tatham and
4 * Julian Hall. All rights reserved. The software is
Beroset095e6a22007-12-29 09:44:23 -05005 * redistributable under the license given in the file "LICENSE"
H. Peter Anvinea6e34d2002-04-30 20:51:32 +00006 * distributed in the NASM archive.
7 *
8 * initial version 27/iii/95 by Simon Tatham
9 */
10
H. Peter Anvinfe501952007-10-02 21:53:51 -070011#include "compiler.h"
12
H. Peter Anvinea6e34d2002-04-30 20:51:32 +000013#include <stdio.h>
14#include <string.h>
H. Peter Anvin2ba7ed72007-09-11 22:13:17 +000015#include <limits.h>
Keith Kaniosb7a89542007-04-12 02:40:54 +000016#include <inttypes.h>
H. Peter Anvinea6e34d2002-04-30 20:51:32 +000017
18#include "nasm.h"
19#include "disasm.h"
20#include "sync.h"
21#include "insns.h"
22
23#include "names.c"
24
H. Peter Anvinea6e34d2002-04-30 20:51:32 +000025/*
26 * Flags that go into the `segment' field of `insn' structures
27 * during disassembly.
28 */
H. Peter Anvin0ee01422007-04-16 01:18:30 +000029#define SEG_RELATIVE 1
30#define SEG_32BIT 2
31#define SEG_RMREG 4
32#define SEG_DISP8 8
33#define SEG_DISP16 16
34#define SEG_DISP32 32
35#define SEG_NODISP 64
36#define SEG_SIGNED 128
37#define SEG_64BIT 256
H. Peter Anvinea6e34d2002-04-30 20:51:32 +000038
H. Peter Anvin232badb2002-06-06 02:41:20 +000039#include "regdis.c"
H. Peter Anvinea6e34d2002-04-30 20:51:32 +000040
H. Peter Anvin62cb6062007-09-11 22:44:03 +000041/*
42 * Prefix information
43 */
44struct prefix_info {
45 uint8_t osize; /* Operand size */
46 uint8_t asize; /* Address size */
47 uint8_t osp; /* Operand size prefix present */
48 uint8_t asp; /* Address size prefix present */
49 uint8_t rep; /* Rep prefix present */
50 uint8_t seg; /* Segment override prefix present */
51 uint8_t lock; /* Lock prefix present */
H. Peter Anvin7334e3a2008-05-05 18:47:27 -070052 uint8_t vex[3]; /* VEX prefix present */
53 uint8_t vex_m; /* VEX.M field */
54 uint8_t vex_v;
55 uint8_t vex_lp; /* VEX.LP fields */
56 uint32_t rex; /* REX prefix present */
H. Peter Anvin62cb6062007-09-11 22:44:03 +000057};
58
H. Peter Anvin0ee01422007-04-16 01:18:30 +000059#define getu8(x) (*(uint8_t *)(x))
H. Peter Anvind1fb15c2007-11-13 09:37:59 -080060#if X86_MEMORY
H. Peter Anvin0ee01422007-04-16 01:18:30 +000061/* Littleendian CPU which can handle unaligned references */
62#define getu16(x) (*(uint16_t *)(x))
63#define getu32(x) (*(uint32_t *)(x))
64#define getu64(x) (*(uint64_t *)(x))
65#else
66static uint16_t getu16(uint8_t *data)
67{
68 return (uint16_t)data[0] + ((uint16_t)data[1] << 8);
69}
70static uint32_t getu32(uint8_t *data)
71{
72 return (uint32_t)getu16(data) + ((uint32_t)getu16(data+2) << 16);
73}
74static uint64_t getu64(uint8_t *data)
75{
76 return (uint64_t)getu32(data) + ((uint64_t)getu32(data+4) << 32);
77}
78#endif
79
80#define gets8(x) ((int8_t)getu8(x))
81#define gets16(x) ((int16_t)getu16(x))
82#define gets32(x) ((int32_t)getu32(x))
83#define gets64(x) ((int64_t)getu64(x))
84
85/* Important: regval must already have been adjusted for rex extensions */
H. Peter Anvin2ba7ed72007-09-11 22:13:17 +000086static enum reg_enum whichreg(int32_t regflags, int regval, int rex)
H. Peter Anvin0ee01422007-04-16 01:18:30 +000087{
H. Peter Anvin0da6b582007-09-12 20:32:39 -070088 if (!(regflags & (REGISTER|REGMEM)))
89 return 0; /* Registers not permissible?! */
90
91 regflags |= REGISTER;
92
H. Peter Anvinea6e34d2002-04-30 20:51:32 +000093 if (!(REG_AL & ~regflags))
H. Peter Anvine2c80182005-01-15 22:15:51 +000094 return R_AL;
H. Peter Anvinea6e34d2002-04-30 20:51:32 +000095 if (!(REG_AX & ~regflags))
H. Peter Anvine2c80182005-01-15 22:15:51 +000096 return R_AX;
H. Peter Anvinea6e34d2002-04-30 20:51:32 +000097 if (!(REG_EAX & ~regflags))
H. Peter Anvine2c80182005-01-15 22:15:51 +000098 return R_EAX;
H. Peter Anvin7cf03af2007-04-16 02:39:56 +000099 if (!(REG_RAX & ~regflags))
100 return R_RAX;
H. Peter Anvin10101f22003-02-24 23:22:45 +0000101 if (!(REG_DL & ~regflags))
H. Peter Anvine2c80182005-01-15 22:15:51 +0000102 return R_DL;
H. Peter Anvinea6e34d2002-04-30 20:51:32 +0000103 if (!(REG_DX & ~regflags))
H. Peter Anvine2c80182005-01-15 22:15:51 +0000104 return R_DX;
H. Peter Anvin10101f22003-02-24 23:22:45 +0000105 if (!(REG_EDX & ~regflags))
H. Peter Anvine2c80182005-01-15 22:15:51 +0000106 return R_EDX;
H. Peter Anvin7cf03af2007-04-16 02:39:56 +0000107 if (!(REG_RDX & ~regflags))
108 return R_RDX;
H. Peter Anvinea6e34d2002-04-30 20:51:32 +0000109 if (!(REG_CL & ~regflags))
H. Peter Anvine2c80182005-01-15 22:15:51 +0000110 return R_CL;
H. Peter Anvinea6e34d2002-04-30 20:51:32 +0000111 if (!(REG_CX & ~regflags))
H. Peter Anvine2c80182005-01-15 22:15:51 +0000112 return R_CX;
H. Peter Anvinea6e34d2002-04-30 20:51:32 +0000113 if (!(REG_ECX & ~regflags))
H. Peter Anvine2c80182005-01-15 22:15:51 +0000114 return R_ECX;
H. Peter Anvin7cf03af2007-04-16 02:39:56 +0000115 if (!(REG_RCX & ~regflags))
116 return R_RCX;
H. Peter Anvinea6e34d2002-04-30 20:51:32 +0000117 if (!(FPU0 & ~regflags))
H. Peter Anvine2c80182005-01-15 22:15:51 +0000118 return R_ST0;
H. Peter Anvind7ed89e2002-04-30 20:52:08 +0000119 if (!(REG_CS & ~regflags))
H. Peter Anvin232badb2002-06-06 02:41:20 +0000120 return (regval == 1) ? R_CS : 0;
H. Peter Anvin76690a12002-04-30 20:52:49 +0000121 if (!(REG_DESS & ~regflags))
H. Peter Anvine2c80182005-01-15 22:15:51 +0000122 return (regval == 0 || regval == 2
H. Peter Anvin0ee01422007-04-16 01:18:30 +0000123 || regval == 3 ? rd_sreg[regval] : 0);
H. Peter Anvin76690a12002-04-30 20:52:49 +0000124 if (!(REG_FSGS & ~regflags))
H. Peter Anvin0ee01422007-04-16 01:18:30 +0000125 return (regval == 4 || regval == 5 ? rd_sreg[regval] : 0);
H. Peter Anvin232badb2002-06-06 02:41:20 +0000126 if (!(REG_SEG67 & ~regflags))
H. Peter Anvin0ee01422007-04-16 01:18:30 +0000127 return (regval == 6 || regval == 7 ? rd_sreg[regval] : 0);
H. Peter Anvin232badb2002-06-06 02:41:20 +0000128
H. Peter Anvin0ee01422007-04-16 01:18:30 +0000129 /* All the entries below look up regval in an 16-entry array */
130 if (regval < 0 || regval > 15)
H. Peter Anvine2c80182005-01-15 22:15:51 +0000131 return 0;
H. Peter Anvin232badb2002-06-06 02:41:20 +0000132
H. Peter Anvin0da6b582007-09-12 20:32:39 -0700133 if (!(REG8 & ~regflags)) {
H. Peter Anvin0ee01422007-04-16 01:18:30 +0000134 if (rex & REX_P)
135 return rd_reg8_rex[regval];
136 else
137 return rd_reg8[regval];
138 }
H. Peter Anvin0da6b582007-09-12 20:32:39 -0700139 if (!(REG16 & ~regflags))
H. Peter Anvin0ee01422007-04-16 01:18:30 +0000140 return rd_reg16[regval];
H. Peter Anvin0da6b582007-09-12 20:32:39 -0700141 if (!(REG32 & ~regflags))
H. Peter Anvin0ee01422007-04-16 01:18:30 +0000142 return rd_reg32[regval];
H. Peter Anvin0da6b582007-09-12 20:32:39 -0700143 if (!(REG64 & ~regflags))
H. Peter Anvinb061d592007-04-16 02:02:06 +0000144 return rd_reg64[regval];
H. Peter Anvinea6e34d2002-04-30 20:51:32 +0000145 if (!(REG_SREG & ~regflags))
H. Peter Anvin0ee01422007-04-16 01:18:30 +0000146 return rd_sreg[regval & 7]; /* Ignore REX */
H. Peter Anvinea6e34d2002-04-30 20:51:32 +0000147 if (!(REG_CREG & ~regflags))
H. Peter Anvin0ee01422007-04-16 01:18:30 +0000148 return rd_creg[regval];
H. Peter Anvinea6e34d2002-04-30 20:51:32 +0000149 if (!(REG_DREG & ~regflags))
H. Peter Anvin0ee01422007-04-16 01:18:30 +0000150 return rd_dreg[regval];
151 if (!(REG_TREG & ~regflags)) {
152 if (rex & REX_P)
153 return 0; /* TR registers are ill-defined with rex */
154 return rd_treg[regval];
155 }
H. Peter Anvinea6e34d2002-04-30 20:51:32 +0000156 if (!(FPUREG & ~regflags))
H. Peter Anvin0ee01422007-04-16 01:18:30 +0000157 return rd_fpureg[regval & 7]; /* Ignore REX */
H. Peter Anvinea6e34d2002-04-30 20:51:32 +0000158 if (!(MMXREG & ~regflags))
H. Peter Anvin0ee01422007-04-16 01:18:30 +0000159 return rd_mmxreg[regval & 7]; /* Ignore REX */
H. Peter Anvin4836e332002-04-30 20:56:43 +0000160 if (!(XMMREG & ~regflags))
H. Peter Anvin0ee01422007-04-16 01:18:30 +0000161 return rd_xmmreg[regval];
H. Peter Anvin7334e3a2008-05-05 18:47:27 -0700162 if (!(YMMREG & ~regflags))
163 return rd_ymmreg[regval];
H. Peter Anvin232badb2002-06-06 02:41:20 +0000164
H. Peter Anvinea6e34d2002-04-30 20:51:32 +0000165 return 0;
166}
167
Keith Kaniosa6dfa782007-04-13 16:47:53 +0000168static const char *whichcond(int condval)
H. Peter Anvineba20a72002-04-30 20:53:55 +0000169{
H. Peter Anvinea6e34d2002-04-30 20:51:32 +0000170 static int conds[] = {
H. Peter Anvine2c80182005-01-15 22:15:51 +0000171 C_O, C_NO, C_C, C_NC, C_Z, C_NZ, C_NA, C_A,
172 C_S, C_NS, C_PE, C_PO, C_L, C_NL, C_NG, C_G
H. Peter Anvinea6e34d2002-04-30 20:51:32 +0000173 };
174 return conditions[conds[condval]];
175}
176
177/*
H. Peter Anvin7786c362007-09-17 18:45:44 -0700178 * Process a DREX suffix
179 */
180static uint8_t *do_drex(uint8_t *data, insn *ins)
181{
182 uint8_t drex = *data++;
183 operand *dst = &ins->oprs[ins->drexdst];
184
185 if ((drex & 8) != ((ins->rex & REX_OC) ? 8 : 0))
186 return NULL; /* OC0 mismatch */
187 ins->rex = (ins->rex & ~7) | (drex & 7);
H. Peter Anvin70653092007-10-19 14:42:29 -0700188
H. Peter Anvin7786c362007-09-17 18:45:44 -0700189 dst->segment = SEG_RMREG;
190 dst->basereg = drex >> 4;
191 return data;
192}
193
194
195/*
H. Peter Anvinea6e34d2002-04-30 20:51:32 +0000196 * Process an effective address (ModRM) specification.
197 */
Keith Kaniosb7a89542007-04-12 02:40:54 +0000198static uint8_t *do_ea(uint8_t *data, int modrm, int asize,
H. Peter Anvin7786c362007-09-17 18:45:44 -0700199 int segsize, operand * op, insn *ins)
H. Peter Anvineba20a72002-04-30 20:53:55 +0000200{
H. Peter Anvinea6e34d2002-04-30 20:51:32 +0000201 int mod, rm, scale, index, base;
H. Peter Anvin7786c362007-09-17 18:45:44 -0700202 int rex;
203 uint8_t sib = 0;
H. Peter Anvinea6e34d2002-04-30 20:51:32 +0000204
205 mod = (modrm >> 6) & 03;
206 rm = modrm & 07;
207
H. Peter Anvin7786c362007-09-17 18:45:44 -0700208 if (mod != 3 && rm == 4 && asize != 16)
209 sib = *data++;
210
211 if (ins->rex & REX_D) {
212 data = do_drex(data, ins);
213 if (!data)
214 return NULL;
215 }
216 rex = ins->rex;
217
H. Peter Anvine2c80182005-01-15 22:15:51 +0000218 if (mod == 3) { /* pure register version */
H. Peter Anvin7cf03af2007-04-16 02:39:56 +0000219 op->basereg = rm+(rex & REX_B ? 8 : 0);
H. Peter Anvine2c80182005-01-15 22:15:51 +0000220 op->segment |= SEG_RMREG;
221 return data;
H. Peter Anvinea6e34d2002-04-30 20:51:32 +0000222 }
223
H. Peter Anvinde4b89b2007-10-01 15:41:25 -0700224 op->disp_size = 0;
H. Peter Anvin99c4ecd2007-08-28 23:06:00 +0000225 op->eaflags = 0;
H. Peter Anvinea6e34d2002-04-30 20:51:32 +0000226
227 if (asize == 16) {
H. Peter Anvine2c80182005-01-15 22:15:51 +0000228 /*
229 * <mod> specifies the displacement size (none, byte or
230 * word), and <rm> specifies the register combination.
231 * Exception: mod=0,rm=6 does not specify [BP] as one might
232 * expect, but instead specifies [disp16].
233 */
234 op->indexreg = op->basereg = -1;
235 op->scale = 1; /* always, in 16 bits */
236 switch (rm) {
237 case 0:
238 op->basereg = R_BX;
239 op->indexreg = R_SI;
240 break;
241 case 1:
242 op->basereg = R_BX;
243 op->indexreg = R_DI;
244 break;
245 case 2:
246 op->basereg = R_BP;
247 op->indexreg = R_SI;
248 break;
249 case 3:
250 op->basereg = R_BP;
251 op->indexreg = R_DI;
252 break;
253 case 4:
254 op->basereg = R_SI;
255 break;
256 case 5:
257 op->basereg = R_DI;
258 break;
259 case 6:
260 op->basereg = R_BP;
261 break;
262 case 7:
263 op->basereg = R_BX;
264 break;
265 }
266 if (rm == 6 && mod == 0) { /* special case */
267 op->basereg = -1;
268 if (segsize != 16)
H. Peter Anvinde4b89b2007-10-01 15:41:25 -0700269 op->disp_size = 16;
H. Peter Anvine2c80182005-01-15 22:15:51 +0000270 mod = 2; /* fake disp16 */
271 }
272 switch (mod) {
273 case 0:
274 op->segment |= SEG_NODISP;
275 break;
276 case 1:
277 op->segment |= SEG_DISP8;
H. Peter Anvin0ee01422007-04-16 01:18:30 +0000278 op->offset = (int8_t)*data++;
H. Peter Anvine2c80182005-01-15 22:15:51 +0000279 break;
280 case 2:
281 op->segment |= SEG_DISP16;
282 op->offset = *data++;
283 op->offset |= ((unsigned)*data++) << 8;
284 break;
285 }
286 return data;
H. Peter Anvinea6e34d2002-04-30 20:51:32 +0000287 } else {
H. Peter Anvine2c80182005-01-15 22:15:51 +0000288 /*
289 * Once again, <mod> specifies displacement size (this time
290 * none, byte or *dword*), while <rm> specifies the base
291 * register. Again, [EBP] is missing, replaced by a pure
H. Peter Anvin0ee01422007-04-16 01:18:30 +0000292 * disp32 (this time that's mod=0,rm=*5*) in 32-bit mode,
293 * and RIP-relative addressing in 64-bit mode.
294 *
295 * However, rm=4
H. Peter Anvine2c80182005-01-15 22:15:51 +0000296 * indicates not a single base register, but instead the
297 * presence of a SIB byte...
298 */
H. Peter Anvin0ee01422007-04-16 01:18:30 +0000299 int a64 = asize == 64;
300
H. Peter Anvine2c80182005-01-15 22:15:51 +0000301 op->indexreg = -1;
H. Peter Anvin0ee01422007-04-16 01:18:30 +0000302
303 if (a64)
304 op->basereg = rd_reg64[rm | ((rex & REX_B) ? 8 : 0)];
305 else
306 op->basereg = rd_reg32[rm | ((rex & REX_B) ? 8 : 0)];
307
H. Peter Anvine2c80182005-01-15 22:15:51 +0000308 if (rm == 5 && mod == 0) {
H. Peter Anvin0ee01422007-04-16 01:18:30 +0000309 if (segsize == 64) {
H. Peter Anvin99c4ecd2007-08-28 23:06:00 +0000310 op->eaflags |= EAF_REL;
H. Peter Anvin0ee01422007-04-16 01:18:30 +0000311 op->segment |= SEG_RELATIVE;
312 mod = 2; /* fake disp32 */
H. Peter Anvin0ee01422007-04-16 01:18:30 +0000313 }
H. Peter Anvin99c4ecd2007-08-28 23:06:00 +0000314
315 if (asize != 64)
H. Peter Anvinde4b89b2007-10-01 15:41:25 -0700316 op->disp_size = asize;
H. Peter Anvin99c4ecd2007-08-28 23:06:00 +0000317
318 op->basereg = -1;
319 mod = 2; /* fake disp32 */
H. Peter Anvine2c80182005-01-15 22:15:51 +0000320 }
H. Peter Anvin0ee01422007-04-16 01:18:30 +0000321
H. Peter Anvine2c80182005-01-15 22:15:51 +0000322 if (rm == 4) { /* process SIB */
H. Peter Anvin7786c362007-09-17 18:45:44 -0700323 scale = (sib >> 6) & 03;
324 index = (sib >> 3) & 07;
325 base = sib & 07;
H. Peter Anvinea6e34d2002-04-30 20:51:32 +0000326
H. Peter Anvine2c80182005-01-15 22:15:51 +0000327 op->scale = 1 << scale;
H. Peter Anvinea6e34d2002-04-30 20:51:32 +0000328
H. Peter Anvin0ee01422007-04-16 01:18:30 +0000329 if (index == 4)
330 op->indexreg = -1; /* ESP/RSP/R12 cannot be an index */
331 else if (a64)
332 op->indexreg = rd_reg64[index | ((rex & REX_X) ? 8 : 0)];
333 else
H. Peter Anvin9e9a2422007-12-26 19:10:20 -0800334 op->indexreg = rd_reg32[index | ((rex & REX_X) ? 8 : 0)];
H. Peter Anvin0ee01422007-04-16 01:18:30 +0000335
336 if (base == 5 && mod == 0) {
337 op->basereg = -1;
338 mod = 2; /* Fake disp32 */
339 } else if (a64)
340 op->basereg = rd_reg64[base | ((rex & REX_B) ? 8 : 0)];
341 else
342 op->basereg = rd_reg32[base | ((rex & REX_B) ? 8 : 0)];
H. Peter Anvin99c4ecd2007-08-28 23:06:00 +0000343
H. Peter Anvine8cdcdc2007-11-12 21:57:00 -0800344 if (segsize == 16)
H. Peter Anvinde4b89b2007-10-01 15:41:25 -0700345 op->disp_size = 32;
H. Peter Anvine2c80182005-01-15 22:15:51 +0000346 }
H. Peter Anvin0ee01422007-04-16 01:18:30 +0000347
H. Peter Anvine2c80182005-01-15 22:15:51 +0000348 switch (mod) {
349 case 0:
350 op->segment |= SEG_NODISP;
351 break;
352 case 1:
353 op->segment |= SEG_DISP8;
H. Peter Anvin0ee01422007-04-16 01:18:30 +0000354 op->offset = gets8(data);
355 data++;
H. Peter Anvine2c80182005-01-15 22:15:51 +0000356 break;
357 case 2:
358 op->segment |= SEG_DISP32;
H. Peter Anvin08367e22008-01-02 12:19:41 -0800359 op->offset = gets32(data);
H. Peter Anvin0ee01422007-04-16 01:18:30 +0000360 data += 4;
H. Peter Anvine2c80182005-01-15 22:15:51 +0000361 break;
362 }
363 return data;
H. Peter Anvinea6e34d2002-04-30 20:51:32 +0000364 }
365}
366
367/*
H. Peter Anvinef7468f2002-04-30 20:57:59 +0000368 * Determine whether the instruction template in t corresponds to the data
H. Peter Anvinea6e34d2002-04-30 20:51:32 +0000369 * stream in data. Return the number of bytes matched if so.
370 */
H. Peter Anvine8cdcdc2007-11-12 21:57:00 -0800371#define case4(x) case (x): case (x)+1: case (x)+2: case (x)+3
372
H. Peter Anvin62cb6062007-09-11 22:44:03 +0000373static int matches(const struct itemplate *t, uint8_t *data,
374 const struct prefix_info *prefix, int segsize, insn *ins)
H. Peter Anvineba20a72002-04-30 20:53:55 +0000375{
Keith Kaniosb7a89542007-04-12 02:40:54 +0000376 uint8_t *r = (uint8_t *)(t->code);
377 uint8_t *origdata = data;
H. Peter Anvin6867acc2007-10-10 14:58:45 -0700378 bool a_used = false, o_used = false;
H. Peter Anvin62cb6062007-09-11 22:44:03 +0000379 enum prefixes drep = 0;
380 uint8_t lock = prefix->lock;
381 int osize = prefix->osize;
382 int asize = prefix->asize;
H. Peter Anvine8cdcdc2007-11-12 21:57:00 -0800383 int i, c;
H. Peter Anvina5fb9082007-11-12 23:00:31 -0800384 struct operand *opx;
H. Peter Anvina30cc072007-11-18 21:55:26 -0800385 int s_field_for = -1; /* No 144/154 series code encountered */
H. Peter Anvin2ba7ed72007-09-11 22:13:17 +0000386
H. Peter Anvin7eb4a382007-09-17 15:49:30 -0700387 for (i = 0; i < MAX_OPERANDS; i++) {
H. Peter Anvinde4b89b2007-10-01 15:41:25 -0700388 ins->oprs[i].segment = ins->oprs[i].disp_size =
H. Peter Anvin7eb4a382007-09-17 15:49:30 -0700389 (segsize == 64 ? SEG_64BIT : segsize == 32 ? SEG_32BIT : 0);
390 }
H. Peter Anvin2ba7ed72007-09-11 22:13:17 +0000391 ins->condition = -1;
H. Peter Anvin62cb6062007-09-11 22:44:03 +0000392 ins->rex = prefix->rex;
H. Peter Anvinbb72f7f2007-11-12 22:55:27 -0800393 memset(ins->prefixes, 0, sizeof ins->prefixes);
H. Peter Anvin0ee01422007-04-16 01:18:30 +0000394
H. Peter Anvin0db11e22007-04-17 20:23:11 +0000395 if (t->flags & (segsize == 64 ? IF_NOLONG : IF_LONG))
H. Peter Anvin6867acc2007-10-10 14:58:45 -0700396 return false;
H. Peter Anvinef7468f2002-04-30 20:57:59 +0000397
H. Peter Anvin62cb6062007-09-11 22:44:03 +0000398 if (prefix->rep == 0xF2)
H. Peter Anvine2c80182005-01-15 22:15:51 +0000399 drep = P_REPNE;
H. Peter Anvin62cb6062007-09-11 22:44:03 +0000400 else if (prefix->rep == 0xF3)
H. Peter Anvine2c80182005-01-15 22:15:51 +0000401 drep = P_REP;
H. Peter Anvinea6e34d2002-04-30 20:51:32 +0000402
H. Peter Anvine8cdcdc2007-11-12 21:57:00 -0800403 while ((c = *r++) != 0) {
H. Peter Anvina5fb9082007-11-12 23:00:31 -0800404 opx = &ins->oprs[c & 3];
405
H. Peter Anvine8cdcdc2007-11-12 21:57:00 -0800406 switch (c) {
407 case 01:
408 case 02:
409 case 03:
H. Peter Anvine2c80182005-01-15 22:15:51 +0000410 while (c--)
411 if (*r++ != *data++)
H. Peter Anvin6867acc2007-10-10 14:58:45 -0700412 return false;
H. Peter Anvine8cdcdc2007-11-12 21:57:00 -0800413 break;
414
415 case 04:
H. Peter Anvine2c80182005-01-15 22:15:51 +0000416 switch (*data++) {
417 case 0x07:
418 ins->oprs[0].basereg = 0;
419 break;
420 case 0x17:
421 ins->oprs[0].basereg = 2;
422 break;
423 case 0x1F:
424 ins->oprs[0].basereg = 3;
425 break;
426 default:
H. Peter Anvin6867acc2007-10-10 14:58:45 -0700427 return false;
H. Peter Anvine2c80182005-01-15 22:15:51 +0000428 }
H. Peter Anvine8cdcdc2007-11-12 21:57:00 -0800429 break;
430
431 case 05:
H. Peter Anvine2c80182005-01-15 22:15:51 +0000432 switch (*data++) {
433 case 0xA1:
434 ins->oprs[0].basereg = 4;
435 break;
436 case 0xA9:
437 ins->oprs[0].basereg = 5;
438 break;
439 default:
H. Peter Anvin6867acc2007-10-10 14:58:45 -0700440 return false;
H. Peter Anvinb061d592007-04-16 02:02:06 +0000441 }
H. Peter Anvine8cdcdc2007-11-12 21:57:00 -0800442 break;
443
444 case 06:
H. Peter Anvine2c80182005-01-15 22:15:51 +0000445 switch (*data++) {
446 case 0x06:
447 ins->oprs[0].basereg = 0;
448 break;
449 case 0x0E:
450 ins->oprs[0].basereg = 1;
451 break;
452 case 0x16:
453 ins->oprs[0].basereg = 2;
454 break;
455 case 0x1E:
456 ins->oprs[0].basereg = 3;
457 break;
458 default:
H. Peter Anvin6867acc2007-10-10 14:58:45 -0700459 return false;
H. Peter Anvine2c80182005-01-15 22:15:51 +0000460 }
H. Peter Anvine8cdcdc2007-11-12 21:57:00 -0800461 break;
462
463 case 07:
H. Peter Anvine2c80182005-01-15 22:15:51 +0000464 switch (*data++) {
465 case 0xA0:
466 ins->oprs[0].basereg = 4;
467 break;
468 case 0xA8:
469 ins->oprs[0].basereg = 5;
470 break;
471 default:
H. Peter Anvin6867acc2007-10-10 14:58:45 -0700472 return false;
H. Peter Anvine2c80182005-01-15 22:15:51 +0000473 }
H. Peter Anvine8cdcdc2007-11-12 21:57:00 -0800474 break;
475
476 case4(010):
477 {
H. Peter Anvine2c80182005-01-15 22:15:51 +0000478 int t = *r++, d = *data++;
479 if (d < t || d > t + 7)
H. Peter Anvin6867acc2007-10-10 14:58:45 -0700480 return false;
H. Peter Anvine2c80182005-01-15 22:15:51 +0000481 else {
H. Peter Anvina5fb9082007-11-12 23:00:31 -0800482 opx->basereg = (d-t)+
H. Peter Anvin62cb6062007-09-11 22:44:03 +0000483 (ins->rex & REX_B ? 8 : 0);
H. Peter Anvina5fb9082007-11-12 23:00:31 -0800484 opx->segment |= SEG_RMREG;
H. Peter Anvine2c80182005-01-15 22:15:51 +0000485 }
H. Peter Anvine8cdcdc2007-11-12 21:57:00 -0800486 break;
487 }
488
489 case4(014):
H. Peter Anvina5fb9082007-11-12 23:00:31 -0800490 opx->offset = (int8_t)*data++;
491 opx->segment |= SEG_SIGNED;
H. Peter Anvine8cdcdc2007-11-12 21:57:00 -0800492 break;
493
494 case4(020):
H. Peter Anvina5fb9082007-11-12 23:00:31 -0800495 opx->offset = *data++;
H. Peter Anvine8cdcdc2007-11-12 21:57:00 -0800496 break;
497
498 case4(024):
H. Peter Anvina5fb9082007-11-12 23:00:31 -0800499 opx->offset = *data++;
H. Peter Anvine8cdcdc2007-11-12 21:57:00 -0800500 break;
501
502 case4(030):
H. Peter Anvina5fb9082007-11-12 23:00:31 -0800503 opx->offset = getu16(data);
H. Peter Anvin0ee01422007-04-16 01:18:30 +0000504 data += 2;
H. Peter Anvine8cdcdc2007-11-12 21:57:00 -0800505 break;
506
507 case4(034):
H. Peter Anvin0ee01422007-04-16 01:18:30 +0000508 if (osize == 32) {
H. Peter Anvina5fb9082007-11-12 23:00:31 -0800509 opx->offset = getu32(data);
H. Peter Anvin0ee01422007-04-16 01:18:30 +0000510 data += 4;
511 } else {
H. Peter Anvina5fb9082007-11-12 23:00:31 -0800512 opx->offset = getu16(data);
H. Peter Anvin0ee01422007-04-16 01:18:30 +0000513 data += 2;
514 }
H. Peter Anvine2c80182005-01-15 22:15:51 +0000515 if (segsize != asize)
H. Peter Anvina5fb9082007-11-12 23:00:31 -0800516 opx->disp_size = asize;
H. Peter Anvine8cdcdc2007-11-12 21:57:00 -0800517 break;
518
519 case4(040):
H. Peter Anvina5fb9082007-11-12 23:00:31 -0800520 opx->offset = getu32(data);
H. Peter Anvin0ee01422007-04-16 01:18:30 +0000521 data += 4;
H. Peter Anvine8cdcdc2007-11-12 21:57:00 -0800522 break;
523
524 case4(044):
H. Peter Anvinb061d592007-04-16 02:02:06 +0000525 switch (asize) {
526 case 16:
H. Peter Anvina5fb9082007-11-12 23:00:31 -0800527 opx->offset = getu16(data);
H. Peter Anvin0ee01422007-04-16 01:18:30 +0000528 data += 2;
H. Peter Anvine8cdcdc2007-11-12 21:57:00 -0800529 if (segsize != 16)
H. Peter Anvina5fb9082007-11-12 23:00:31 -0800530 opx->disp_size = 16;
H. Peter Anvinb061d592007-04-16 02:02:06 +0000531 break;
532 case 32:
H. Peter Anvina5fb9082007-11-12 23:00:31 -0800533 opx->offset = getu32(data);
H. Peter Anvinb061d592007-04-16 02:02:06 +0000534 data += 4;
H. Peter Anvine8cdcdc2007-11-12 21:57:00 -0800535 if (segsize == 16)
H. Peter Anvina5fb9082007-11-12 23:00:31 -0800536 opx->disp_size = 32;
H. Peter Anvinb061d592007-04-16 02:02:06 +0000537 break;
538 case 64:
H. Peter Anvina5fb9082007-11-12 23:00:31 -0800539 opx->offset = getu64(data);
540 opx->disp_size = 64;
H. Peter Anvinb061d592007-04-16 02:02:06 +0000541 data += 8;
542 break;
H. Peter Anvin0ee01422007-04-16 01:18:30 +0000543 }
H. Peter Anvine8cdcdc2007-11-12 21:57:00 -0800544 break;
545
546 case4(050):
H. Peter Anvina5fb9082007-11-12 23:00:31 -0800547 opx->offset = gets8(data++);
548 opx->segment |= SEG_RELATIVE;
H. Peter Anvine8cdcdc2007-11-12 21:57:00 -0800549 break;
550
551 case4(054):
H. Peter Anvina5fb9082007-11-12 23:00:31 -0800552 opx->offset = getu64(data);
H. Peter Anvin0ee01422007-04-16 01:18:30 +0000553 data += 8;
H. Peter Anvine8cdcdc2007-11-12 21:57:00 -0800554 break;
555
556 case4(060):
H. Peter Anvina5fb9082007-11-12 23:00:31 -0800557 opx->offset = gets16(data);
H. Peter Anvin0ee01422007-04-16 01:18:30 +0000558 data += 2;
H. Peter Anvina5fb9082007-11-12 23:00:31 -0800559 opx->segment |= SEG_RELATIVE;
560 opx->segment &= ~SEG_32BIT;
H. Peter Anvine8cdcdc2007-11-12 21:57:00 -0800561 break;
562
563 case4(064):
H. Peter Anvina5fb9082007-11-12 23:00:31 -0800564 opx->segment |= SEG_RELATIVE;
H. Peter Anvin7cf03af2007-04-16 02:39:56 +0000565 if (osize == 16) {
H. Peter Anvin08367e22008-01-02 12:19:41 -0800566 opx->offset = gets16(data);
H. Peter Anvin0ee01422007-04-16 01:18:30 +0000567 data += 2;
H. Peter Anvina5fb9082007-11-12 23:00:31 -0800568 opx->segment &= ~(SEG_32BIT|SEG_64BIT);
H. Peter Anvin7cf03af2007-04-16 02:39:56 +0000569 } else if (osize == 32) {
H. Peter Anvin08367e22008-01-02 12:19:41 -0800570 opx->offset = gets32(data);
H. Peter Anvin7cf03af2007-04-16 02:39:56 +0000571 data += 4;
H. Peter Anvina5fb9082007-11-12 23:00:31 -0800572 opx->segment &= ~SEG_64BIT;
573 opx->segment |= SEG_32BIT;
H. Peter Anvin70653092007-10-19 14:42:29 -0700574 }
H. Peter Anvine2c80182005-01-15 22:15:51 +0000575 if (segsize != osize) {
H. Peter Anvina5fb9082007-11-12 23:00:31 -0800576 opx->type =
577 (opx->type & ~SIZE_MASK)
H. Peter Anvine2c80182005-01-15 22:15:51 +0000578 | ((osize == 16) ? BITS16 : BITS32);
579 }
H. Peter Anvine8cdcdc2007-11-12 21:57:00 -0800580 break;
581
582 case4(070):
H. Peter Anvin08367e22008-01-02 12:19:41 -0800583 opx->offset = gets32(data);
H. Peter Anvin0ee01422007-04-16 01:18:30 +0000584 data += 4;
H. Peter Anvina5fb9082007-11-12 23:00:31 -0800585 opx->segment |= SEG_32BIT | SEG_RELATIVE;
H. Peter Anvine8cdcdc2007-11-12 21:57:00 -0800586 break;
587
588 case4(0100):
589 case4(0110):
590 case4(0120):
591 case4(0130):
592 {
593 int modrm = *data++;
H. Peter Anvina5fb9082007-11-12 23:00:31 -0800594 opx->segment |= SEG_RMREG;
H. Peter Anvine2c80182005-01-15 22:15:51 +0000595 data = do_ea(data, modrm, asize, segsize,
H. Peter Anvina5fb9082007-11-12 23:00:31 -0800596 &ins->oprs[(c >> 3) & 3], ins);
H. Peter Anvin7786c362007-09-17 18:45:44 -0700597 if (!data)
H. Peter Anvin6867acc2007-10-10 14:58:45 -0700598 return false;
H. Peter Anvina5fb9082007-11-12 23:00:31 -0800599 opx->basereg = ((modrm >> 3)&7)+
H. Peter Anvin7786c362007-09-17 18:45:44 -0700600 (ins->rex & REX_R ? 8 : 0);
H. Peter Anvine8cdcdc2007-11-12 21:57:00 -0800601 break;
602 }
603
604 case4(0140):
H. Peter Anvina30cc072007-11-18 21:55:26 -0800605 if (s_field_for == (c & 3)) {
606 opx->offset = gets8(data);
607 data++;
608 } else {
609 opx->offset = getu16(data);
610 data += 2;
611 }
612 break;
613
614 case4(0144):
615 case4(0154):
616 s_field_for = (*data & 0x02) ? c & 3 : -1;
617 if ((*data++ & ~0x02) != *r++)
618 return false;
H. Peter Anvine8cdcdc2007-11-12 21:57:00 -0800619 break;
620
621 case4(0150):
H. Peter Anvina30cc072007-11-18 21:55:26 -0800622 if (s_field_for == (c & 3)) {
623 opx->offset = gets8(data);
624 data++;
625 } else {
626 opx->offset = getu32(data);
627 data += 4;
628 }
H. Peter Anvine8cdcdc2007-11-12 21:57:00 -0800629 break;
630
631 case4(0160):
632 ins->rex |= REX_D;
H. Peter Anvin7786c362007-09-17 18:45:44 -0700633 ins->drexdst = c & 3;
H. Peter Anvine8cdcdc2007-11-12 21:57:00 -0800634 break;
635
636 case4(0164):
637 ins->rex |= REX_D|REX_OC;
638 ins->drexdst = c & 3;
639 break;
640
H. Peter Anvine8cdcdc2007-11-12 21:57:00 -0800641 case 0171:
H. Peter Anvin7786c362007-09-17 18:45:44 -0700642 data = do_drex(data, ins);
643 if (!data)
H. Peter Anvin6867acc2007-10-10 14:58:45 -0700644 return false;
H. Peter Anvine8cdcdc2007-11-12 21:57:00 -0800645 break;
646
H. Peter Anvind85d2502008-05-04 17:53:31 -0700647 case 0172:
648 {
649 uint8_t ximm = *data++;
650 c = *r++;
651 ins->oprs[c >> 3].basereg = ximm >> 4;
652 ins->oprs[c >> 3].segment |= SEG_RMREG;
653 ins->oprs[c & 7].offset = ximm & 15;
654 }
655 break;
656
H. Peter Anvind58656f2008-05-06 20:11:14 -0700657 case 0173:
658 {
659 uint8_t ximm = *data++;
660 c = *r++;
661
662 if ((c ^ ximm) & 15)
663 return false;
664
665 ins->oprs[c >> 4].basereg = ximm >> 4;
666 ins->oprs[c >> 4].segment |= SEG_RMREG;
667 }
668 break;
669
H. Peter Anvine8cdcdc2007-11-12 21:57:00 -0800670 case4(0200):
671 case4(0204):
672 case4(0210):
673 case4(0214):
674 case4(0220):
675 case4(0224):
676 case4(0230):
677 case4(0234):
678 {
H. Peter Anvine2c80182005-01-15 22:15:51 +0000679 int modrm = *data++;
680 if (((modrm >> 3) & 07) != (c & 07))
H. Peter Anvin6867acc2007-10-10 14:58:45 -0700681 return false; /* spare field doesn't match up */
H. Peter Anvine2c80182005-01-15 22:15:51 +0000682 data = do_ea(data, modrm, asize, segsize,
H. Peter Anvin7786c362007-09-17 18:45:44 -0700683 &ins->oprs[(c >> 3) & 07], ins);
684 if (!data)
H. Peter Anvin6867acc2007-10-10 14:58:45 -0700685 return false;
H. Peter Anvine8cdcdc2007-11-12 21:57:00 -0800686 break;
687 }
688
H. Peter Anvin7334e3a2008-05-05 18:47:27 -0700689 case4(0260):
690 {
691 int vexm = *r++;
692 int vexwlp = *r++;
693 ins->rex |= REX_V;
694 if ((prefix->rex & (REX_V|REX_D|REX_P)) != REX_V)
695 return false;
696
697 if ((vexm & 0x1f) != prefix->vex_m)
698 return false;
699
700 switch (vexwlp & 030) {
701 case 000:
702 if (prefix->rex & REX_W)
703 return false;
704 break;
705 case 010:
706 if (!(prefix->rex & REX_W))
707 return false;
708 break;
709 default:
710 break; /* XXX: Need to do anything special here? */
711 }
712
713 if ((vexwlp & 007) != prefix->vex_lp)
714 return false;
715
716 opx->segment |= SEG_RMREG;
717 opx->basereg = prefix->vex_v;
718 break;
719 }
720
721 case 0270:
722 {
723 int vexm = *r++;
724 int vexwlp = *r++;
725 ins->rex |= REX_V;
726 if ((prefix->rex & (REX_V|REX_D|REX_P)) != REX_V)
727 return false;
728
729 if ((vexm & 0x1f) != prefix->vex_m)
730 return false;
731
732 switch (vexwlp & 030) {
733 case 000:
734 if (ins->rex & REX_W)
735 return false;
736 break;
737 case 010:
738 if (!(ins->rex & REX_W))
739 return false;
740 break;
741 default:
742 break; /* Need to do anything special here? */
743 }
744
745 if ((vexwlp & 007) != prefix->vex_lp)
746 return false;
747
748 if (prefix->vex_v != 0)
749 return false;
750
751 break;
752 }
753
H. Peter Anvine8cdcdc2007-11-12 21:57:00 -0800754 case 0310:
H. Peter Anvin0ee01422007-04-16 01:18:30 +0000755 if (asize != 16)
H. Peter Anvin6867acc2007-10-10 14:58:45 -0700756 return false;
H. Peter Anvine2c80182005-01-15 22:15:51 +0000757 else
H. Peter Anvin6867acc2007-10-10 14:58:45 -0700758 a_used = true;
H. Peter Anvine8cdcdc2007-11-12 21:57:00 -0800759 break;
760
761 case 0311:
H. Peter Anvine2c80182005-01-15 22:15:51 +0000762 if (asize == 16)
H. Peter Anvin6867acc2007-10-10 14:58:45 -0700763 return false;
H. Peter Anvine2c80182005-01-15 22:15:51 +0000764 else
H. Peter Anvin6867acc2007-10-10 14:58:45 -0700765 a_used = true;
H. Peter Anvine8cdcdc2007-11-12 21:57:00 -0800766 break;
767
768 case 0312:
H. Peter Anvine2c80182005-01-15 22:15:51 +0000769 if (asize != segsize)
H. Peter Anvin6867acc2007-10-10 14:58:45 -0700770 return false;
H. Peter Anvine2c80182005-01-15 22:15:51 +0000771 else
H. Peter Anvin6867acc2007-10-10 14:58:45 -0700772 a_used = true;
H. Peter Anvine8cdcdc2007-11-12 21:57:00 -0800773 break;
774
775 case 0313:
H. Peter Anvince2b3972007-05-30 22:21:11 +0000776 if (asize != 64)
H. Peter Anvin6867acc2007-10-10 14:58:45 -0700777 return false;
H. Peter Anvince2b3972007-05-30 22:21:11 +0000778 else
H. Peter Anvin6867acc2007-10-10 14:58:45 -0700779 a_used = true;
H. Peter Anvine8cdcdc2007-11-12 21:57:00 -0800780 break;
781
782 case 0314:
H. Peter Anvin23440102007-11-12 21:02:33 -0800783 if (prefix->rex & REX_B)
784 return false;
H. Peter Anvine8cdcdc2007-11-12 21:57:00 -0800785 break;
786
787 case 0315:
H. Peter Anvin23440102007-11-12 21:02:33 -0800788 if (prefix->rex & REX_X)
789 return false;
H. Peter Anvine8cdcdc2007-11-12 21:57:00 -0800790 break;
791
792 case 0316:
H. Peter Anvin23440102007-11-12 21:02:33 -0800793 if (prefix->rex & REX_R)
794 return false;
H. Peter Anvine8cdcdc2007-11-12 21:57:00 -0800795 break;
796
797 case 0317:
H. Peter Anvin23440102007-11-12 21:02:33 -0800798 if (prefix->rex & REX_W)
799 return false;
H. Peter Anvine8cdcdc2007-11-12 21:57:00 -0800800 break;
801
802 case 0320:
H. Peter Anvin0ee01422007-04-16 01:18:30 +0000803 if (osize != 16)
H. Peter Anvin6867acc2007-10-10 14:58:45 -0700804 return false;
H. Peter Anvine2c80182005-01-15 22:15:51 +0000805 else
H. Peter Anvin6867acc2007-10-10 14:58:45 -0700806 o_used = true;
H. Peter Anvine8cdcdc2007-11-12 21:57:00 -0800807 break;
808
809 case 0321:
H. Peter Anvinb061d592007-04-16 02:02:06 +0000810 if (osize != 32)
H. Peter Anvin6867acc2007-10-10 14:58:45 -0700811 return false;
H. Peter Anvine2c80182005-01-15 22:15:51 +0000812 else
H. Peter Anvin6867acc2007-10-10 14:58:45 -0700813 o_used = true;
H. Peter Anvine8cdcdc2007-11-12 21:57:00 -0800814 break;
815
816 case 0322:
H. Peter Anvin0ee01422007-04-16 01:18:30 +0000817 if (osize != (segsize == 16) ? 16 : 32)
H. Peter Anvin6867acc2007-10-10 14:58:45 -0700818 return false;
H. Peter Anvine2c80182005-01-15 22:15:51 +0000819 else
H. Peter Anvin6867acc2007-10-10 14:58:45 -0700820 o_used = true;
H. Peter Anvine8cdcdc2007-11-12 21:57:00 -0800821 break;
822
823 case 0323:
H. Peter Anvin62cb6062007-09-11 22:44:03 +0000824 ins->rex |= REX_W; /* 64-bit only instruction */
H. Peter Anvin0ee01422007-04-16 01:18:30 +0000825 osize = 64;
H. Peter Anvinbb72f7f2007-11-12 22:55:27 -0800826 o_used = true;
H. Peter Anvine8cdcdc2007-11-12 21:57:00 -0800827 break;
828
829 case 0324:
H. Peter Anvin62cb6062007-09-11 22:44:03 +0000830 if (!(ins->rex & (REX_P|REX_W)) || osize != 64)
H. Peter Anvin6867acc2007-10-10 14:58:45 -0700831 return false;
H. Peter Anvinbb72f7f2007-11-12 22:55:27 -0800832 o_used = true;
H. Peter Anvine8cdcdc2007-11-12 21:57:00 -0800833 break;
834
835 case 0330:
836 {
H. Peter Anvine2c80182005-01-15 22:15:51 +0000837 int t = *r++, d = *data++;
838 if (d < t || d > t + 15)
H. Peter Anvin6867acc2007-10-10 14:58:45 -0700839 return false;
H. Peter Anvine2c80182005-01-15 22:15:51 +0000840 else
841 ins->condition = d - t;
H. Peter Anvine8cdcdc2007-11-12 21:57:00 -0800842 break;
843 }
844
845 case 0331:
H. Peter Anvin62cb6062007-09-11 22:44:03 +0000846 if (prefix->rep)
H. Peter Anvin6867acc2007-10-10 14:58:45 -0700847 return false;
H. Peter Anvine8cdcdc2007-11-12 21:57:00 -0800848 break;
849
850 case 0332:
H. Peter Anvincb9b6902007-09-12 21:58:51 -0700851 if (prefix->rep != 0xF2)
H. Peter Anvin6867acc2007-10-10 14:58:45 -0700852 return false;
H. Peter Anvina30cc072007-11-18 21:55:26 -0800853 drep = 0;
H. Peter Anvine8cdcdc2007-11-12 21:57:00 -0800854 break;
855
856 case 0333:
H. Peter Anvin62cb6062007-09-11 22:44:03 +0000857 if (prefix->rep != 0xF3)
H. Peter Anvin6867acc2007-10-10 14:58:45 -0700858 return false;
H. Peter Anvine2c80182005-01-15 22:15:51 +0000859 drep = 0;
H. Peter Anvine8cdcdc2007-11-12 21:57:00 -0800860 break;
861
862 case 0334:
H. Peter Anvin0db11e22007-04-17 20:23:11 +0000863 if (lock) {
H. Peter Anvin62cb6062007-09-11 22:44:03 +0000864 ins->rex |= REX_R;
H. Peter Anvin0db11e22007-04-17 20:23:11 +0000865 lock = 0;
866 }
H. Peter Anvine8cdcdc2007-11-12 21:57:00 -0800867 break;
868
869 case 0335:
H. Peter Anvincb9b6902007-09-12 21:58:51 -0700870 if (drep == P_REP)
871 drep = P_REPE;
H. Peter Anvine8cdcdc2007-11-12 21:57:00 -0800872 break;
873
874 case 0340:
875 return false;
876
877 case 0364:
H. Peter Anvin62cb6062007-09-11 22:44:03 +0000878 if (prefix->osp)
H. Peter Anvin6867acc2007-10-10 14:58:45 -0700879 return false;
H. Peter Anvine8cdcdc2007-11-12 21:57:00 -0800880 break;
881
882 case 0365:
H. Peter Anvin62cb6062007-09-11 22:44:03 +0000883 if (prefix->asp)
H. Peter Anvin6867acc2007-10-10 14:58:45 -0700884 return false;
H. Peter Anvine8cdcdc2007-11-12 21:57:00 -0800885 break;
886
887 case 0366:
H. Peter Anvin62cb6062007-09-11 22:44:03 +0000888 if (!prefix->osp)
H. Peter Anvin6867acc2007-10-10 14:58:45 -0700889 return false;
890 o_used = true;
H. Peter Anvine8cdcdc2007-11-12 21:57:00 -0800891 break;
892
893 case 0367:
H. Peter Anvin62cb6062007-09-11 22:44:03 +0000894 if (!prefix->asp)
H. Peter Anvin6867acc2007-10-10 14:58:45 -0700895 return false;
H. Peter Anvinbb72f7f2007-11-12 22:55:27 -0800896 a_used = true;
H. Peter Anvine8cdcdc2007-11-12 21:57:00 -0800897 break;
898
899 default:
900 return false; /* Unknown code */
H. Peter Anvin0db11e22007-04-17 20:23:11 +0000901 }
H. Peter Anvinea6e34d2002-04-30 20:51:32 +0000902 }
903
H. Peter Anvin7334e3a2008-05-05 18:47:27 -0700904 /* REX cannot be combined with DREX or VEX */
905 if ((ins->rex & (REX_D|REX_V)) && (prefix->rex & REX_P))
H. Peter Anvin6867acc2007-10-10 14:58:45 -0700906 return false;
H. Peter Anvin7786c362007-09-17 18:45:44 -0700907
H. Peter Anvinea6e34d2002-04-30 20:51:32 +0000908 /*
H. Peter Anvinef7468f2002-04-30 20:57:59 +0000909 * Check for unused rep or a/o prefixes.
H. Peter Anvinea6e34d2002-04-30 20:51:32 +0000910 */
H. Peter Anvinc5b9ce02007-09-22 21:49:51 -0700911 for (i = 0; i < t->operands; i++) {
912 if (ins->oprs[i].segment != SEG_RMREG)
H. Peter Anvin6867acc2007-10-10 14:58:45 -0700913 a_used = true;
H. Peter Anvinc5b9ce02007-09-22 21:49:51 -0700914 }
915
H. Peter Anvinde4b89b2007-10-01 15:41:25 -0700916 if (lock) {
917 if (ins->prefixes[PPS_LREP])
918 return false;
919 ins->prefixes[PPS_LREP] = P_LOCK;
920 }
921 if (drep) {
922 if (ins->prefixes[PPS_LREP])
923 return false;
924 ins->prefixes[PPS_LREP] = drep;
925 }
H. Peter Anvinbb72f7f2007-11-12 22:55:27 -0800926 if (!o_used) {
927 if (osize != ((segsize == 16) ? 16 : 32)) {
928 enum prefixes pfx = 0;
929
930 switch (osize) {
931 case 16:
932 pfx = P_O16;
933 break;
934 case 32:
935 pfx = P_O32;
936 break;
937 case 64:
938 pfx = P_O64;
939 break;
940 }
941
942 if (ins->prefixes[PPS_OSIZE])
943 return false;
944 ins->prefixes[PPS_OSIZE] = pfx;
945 }
H. Peter Anvinde4b89b2007-10-01 15:41:25 -0700946 }
947 if (!a_used && asize != segsize) {
948 if (ins->prefixes[PPS_ASIZE])
949 return false;
950 ins->prefixes[PPS_ASIZE] = asize == 16 ? P_A16 : P_A32;
951 }
H. Peter Anvinea6e34d2002-04-30 20:51:32 +0000952
H. Peter Anvin0ee01422007-04-16 01:18:30 +0000953 /* Fix: check for redundant REX prefixes */
954
H. Peter Anvinea6e34d2002-04-30 20:51:32 +0000955 return data - origdata;
956}
957
Keith Kaniosa6dfa782007-04-13 16:47:53 +0000958int32_t disasm(uint8_t *data, char *output, int outbufsize, int segsize,
Keith Kaniosb7a89542007-04-12 02:40:54 +0000959 int32_t offset, int autosync, uint32_t prefer)
H. Peter Anvineba20a72002-04-30 20:53:55 +0000960{
H. Peter Anvin3360d792007-09-11 04:16:57 +0000961 const struct itemplate * const *p, * const *best_p;
H. Peter Anvin19e20102007-09-18 15:08:20 -0700962 const struct disasm_index *ix;
963 uint8_t *dp;
H. Peter Anvin4836e332002-04-30 20:56:43 +0000964 int length, best_length = 0;
Keith Kaniosa6dfa782007-04-13 16:47:53 +0000965 char *segover;
H. Peter Anvin19e20102007-09-18 15:08:20 -0700966 int i, slen, colon, n;
Keith Kaniosb7a89542007-04-12 02:40:54 +0000967 uint8_t *origdata;
H. Peter Anvinea6e34d2002-04-30 20:51:32 +0000968 int works;
H. Peter Anvinef7468f2002-04-30 20:57:59 +0000969 insn tmp_ins, ins;
Keith Kaniosb7a89542007-04-12 02:40:54 +0000970 uint32_t goodness, best;
H. Peter Anvin62cb6062007-09-11 22:44:03 +0000971 int best_pref;
972 struct prefix_info prefix;
H. Peter Anvine8cdcdc2007-11-12 21:57:00 -0800973 bool end_prefix;
H. Peter Anvinea6e34d2002-04-30 20:51:32 +0000974
H. Peter Anvinbfb888c2007-09-11 04:26:44 +0000975 memset(&ins, 0, sizeof ins);
976
H. Peter Anvinea6e34d2002-04-30 20:51:32 +0000977 /*
978 * Scan for prefixes.
979 */
H. Peter Anvin62cb6062007-09-11 22:44:03 +0000980 memset(&prefix, 0, sizeof prefix);
981 prefix.asize = segsize;
982 prefix.osize = (segsize == 64) ? 32 : segsize;
H. Peter Anvinea6e34d2002-04-30 20:51:32 +0000983 segover = NULL;
H. Peter Anvinea6e34d2002-04-30 20:51:32 +0000984 origdata = data;
H. Peter Anvine8cdcdc2007-11-12 21:57:00 -0800985
H. Peter Anvin7334e3a2008-05-05 18:47:27 -0700986 end_prefix = false;
987 while (!end_prefix) {
H. Peter Anvine8cdcdc2007-11-12 21:57:00 -0800988 switch (*data) {
989 case 0xF2:
990 case 0xF3:
H. Peter Anvin62cb6062007-09-11 22:44:03 +0000991 prefix.rep = *data++;
H. Peter Anvine8cdcdc2007-11-12 21:57:00 -0800992 break;
993 case 0xF0:
H. Peter Anvin62cb6062007-09-11 22:44:03 +0000994 prefix.lock = *data++;
H. Peter Anvine8cdcdc2007-11-12 21:57:00 -0800995 break;
996 case 0x2E:
H. Peter Anvin62cb6062007-09-11 22:44:03 +0000997 segover = "cs", prefix.seg = *data++;
H. Peter Anvine8cdcdc2007-11-12 21:57:00 -0800998 break;
999 case 0x36:
H. Peter Anvin62cb6062007-09-11 22:44:03 +00001000 segover = "ss", prefix.seg = *data++;
H. Peter Anvine8cdcdc2007-11-12 21:57:00 -08001001 break;
1002 case 0x3E:
H. Peter Anvin62cb6062007-09-11 22:44:03 +00001003 segover = "ds", prefix.seg = *data++;
H. Peter Anvine8cdcdc2007-11-12 21:57:00 -08001004 break;
1005 case 0x26:
H. Peter Anvin62cb6062007-09-11 22:44:03 +00001006 segover = "es", prefix.seg = *data++;
H. Peter Anvine8cdcdc2007-11-12 21:57:00 -08001007 break;
1008 case 0x64:
H. Peter Anvin62cb6062007-09-11 22:44:03 +00001009 segover = "fs", prefix.seg = *data++;
H. Peter Anvine8cdcdc2007-11-12 21:57:00 -08001010 break;
1011 case 0x65:
H. Peter Anvin62cb6062007-09-11 22:44:03 +00001012 segover = "gs", prefix.seg = *data++;
H. Peter Anvine8cdcdc2007-11-12 21:57:00 -08001013 break;
1014 case 0x66:
H. Peter Anvin62cb6062007-09-11 22:44:03 +00001015 prefix.osize = (segsize == 16) ? 32 : 16;
1016 prefix.osp = *data++;
H. Peter Anvine8cdcdc2007-11-12 21:57:00 -08001017 break;
1018 case 0x67:
H. Peter Anvin62cb6062007-09-11 22:44:03 +00001019 prefix.asize = (segsize == 32) ? 16 : 32;
1020 prefix.asp = *data++;
H. Peter Anvine8cdcdc2007-11-12 21:57:00 -08001021 break;
H. Peter Anvin7334e3a2008-05-05 18:47:27 -07001022 case 0xC4:
1023 case 0xC5:
1024 if (segsize == 64 || (data[1] & 0xc0) == 0xc0) {
1025 prefix.vex[0] = *data++;
1026 prefix.vex[1] = *data++;
1027 if (prefix.vex[0] == 0xc4)
1028 prefix.vex[2] = *data++;
1029 }
1030 prefix.rex = REX_V;
1031 if (prefix.vex[0] == 0xc4) {
1032 prefix.rex |= (~prefix.vex[1] >> 5) & 7; /* REX_RXB */
1033 prefix.rex |= (prefix.vex[2] >> (7-3)) & REX_W;
1034 prefix.vex_m = prefix.vex[1] & 0x1f;
1035 prefix.vex_v = (~prefix.vex[2] >> 3) & 15;
1036 prefix.vex_lp = prefix.vex[2] & 7;
1037 } else {
1038 prefix.rex |= (~prefix.vex[1] >> (7-2)) & REX_R;
1039 prefix.vex_m = 1;
1040 prefix.vex_v = (~prefix.vex[1] >> 3) & 15;
1041 prefix.vex_lp = prefix.vex[1] & 7;
1042 }
1043 end_prefix = true;
1044 break;
1045 case REX_P + 0x0:
1046 case REX_P + 0x1:
1047 case REX_P + 0x2:
1048 case REX_P + 0x3:
1049 case REX_P + 0x4:
1050 case REX_P + 0x5:
1051 case REX_P + 0x6:
1052 case REX_P + 0x7:
1053 case REX_P + 0x8:
1054 case REX_P + 0x9:
1055 case REX_P + 0xA:
1056 case REX_P + 0xB:
1057 case REX_P + 0xC:
1058 case REX_P + 0xD:
1059 case REX_P + 0xE:
1060 case REX_P + 0xF:
1061 if (segsize == 64) {
H. Peter Anvine8cdcdc2007-11-12 21:57:00 -08001062 prefix.rex = *data++;
1063 if (prefix.rex & REX_W)
1064 prefix.osize = 64;
H. Peter Anvine8cdcdc2007-11-12 21:57:00 -08001065 }
H. Peter Anvin7334e3a2008-05-05 18:47:27 -07001066 end_prefix = true;
1067 break;
1068 default:
1069 end_prefix = true;
1070 break;
H. Peter Anvin0ee01422007-04-16 01:18:30 +00001071 }
H. Peter Anvinea6e34d2002-04-30 20:51:32 +00001072 }
1073
H. Peter Anvin0ee01422007-04-16 01:18:30 +00001074 best = -1; /* Worst possible */
H. Peter Anvin4836e332002-04-30 20:56:43 +00001075 best_p = NULL;
H. Peter Anvin2ba7ed72007-09-11 22:13:17 +00001076 best_pref = INT_MAX;
1077
H. Peter Anvin19e20102007-09-18 15:08:20 -07001078 dp = data;
1079 ix = itable + *dp++;
Charles Crayne46b31b02007-10-18 21:17:20 -07001080 while (ix->n == -1) {
H. Peter Anvin19e20102007-09-18 15:08:20 -07001081 ix = (const struct disasm_index *)ix->p + *dp++;
1082 }
1083
1084 p = (const struct itemplate * const *)ix->p;
1085 for (n = ix->n; n; n--, p++) {
H. Peter Anvin62cb6062007-09-11 22:44:03 +00001086 if ((length = matches(*p, data, &prefix, segsize, &tmp_ins))) {
H. Peter Anvin6867acc2007-10-10 14:58:45 -07001087 works = true;
H. Peter Anvine2c80182005-01-15 22:15:51 +00001088 /*
1089 * Final check to make sure the types of r/m match up.
H. Peter Anvindbf130e2007-05-30 00:18:26 +00001090 * XXX: Need to make sure this is actually correct.
H. Peter Anvine2c80182005-01-15 22:15:51 +00001091 */
1092 for (i = 0; i < (*p)->operands; i++) {
H. Peter Anvin7786c362007-09-17 18:45:44 -07001093 if (!((*p)->opd[i] & SAME_AS) &&
1094 (
H. Peter Anvine8cdcdc2007-11-12 21:57:00 -08001095 /* If it's a mem-only EA but we have a
1096 register, die. */
H. Peter Anvin7786c362007-09-17 18:45:44 -07001097 ((tmp_ins.oprs[i].segment & SEG_RMREG) &&
1098 !(MEMORY & ~(*p)->opd[i])) ||
H. Peter Anvine8cdcdc2007-11-12 21:57:00 -08001099 /* If it's a reg-only EA but we have a memory
1100 ref, die. */
H. Peter Anvin7786c362007-09-17 18:45:44 -07001101 (!(tmp_ins.oprs[i].segment & SEG_RMREG) &&
1102 !(REG_EA & ~(*p)->opd[i]) &&
1103 !((*p)->opd[i] & REG_SMASK)) ||
H. Peter Anvine8cdcdc2007-11-12 21:57:00 -08001104 /* Register type mismatch (eg FS vs REG_DESS):
1105 die. */
H. Peter Anvin7786c362007-09-17 18:45:44 -07001106 ((((*p)->opd[i] & (REGISTER | FPUREG)) ||
1107 (tmp_ins.oprs[i].segment & SEG_RMREG)) &&
1108 !whichreg((*p)->opd[i],
1109 tmp_ins.oprs[i].basereg, tmp_ins.rex))
1110 )) {
H. Peter Anvin6867acc2007-10-10 14:58:45 -07001111 works = false;
H. Peter Anvine2c80182005-01-15 22:15:51 +00001112 break;
1113 }
1114 }
1115
H. Peter Anvin2ba7ed72007-09-11 22:13:17 +00001116 /*
1117 * Note: we always prefer instructions which incorporate
1118 * prefixes in the instructions themselves. This is to allow
1119 * e.g. PAUSE to be preferred to REP NOP, and deal with
1120 * MMX/SSE instructions where prefixes are used to select
1121 * between MMX and SSE register sets or outright opcode
1122 * selection.
1123 */
H. Peter Anvine2c80182005-01-15 22:15:51 +00001124 if (works) {
H. Peter Anvinde4b89b2007-10-01 15:41:25 -07001125 int i, nprefix;
H. Peter Anvine2c80182005-01-15 22:15:51 +00001126 goodness = ((*p)->flags & IF_PFMASK) ^ prefer;
H. Peter Anvinde4b89b2007-10-01 15:41:25 -07001127 nprefix = 0;
1128 for (i = 0; i < MAXPREFIX; i++)
1129 if (tmp_ins.prefixes[i])
1130 nprefix++;
1131 if (nprefix < best_pref ||
1132 (nprefix == best_pref && goodness < best)) {
H. Peter Anvine2c80182005-01-15 22:15:51 +00001133 /* This is the best one found so far */
1134 best = goodness;
1135 best_p = p;
H. Peter Anvinde4b89b2007-10-01 15:41:25 -07001136 best_pref = nprefix;
H. Peter Anvine2c80182005-01-15 22:15:51 +00001137 best_length = length;
1138 ins = tmp_ins;
1139 }
1140 }
1141 }
H. Peter Anvin4836e332002-04-30 20:56:43 +00001142 }
H. Peter Anvineba20a72002-04-30 20:53:55 +00001143
H. Peter Anvinef7468f2002-04-30 20:57:59 +00001144 if (!best_p)
H. Peter Anvine2c80182005-01-15 22:15:51 +00001145 return 0; /* no instruction was matched */
H. Peter Anvinea6e34d2002-04-30 20:51:32 +00001146
H. Peter Anvin4836e332002-04-30 20:56:43 +00001147 /* Pick the best match */
H. Peter Anvine2c80182005-01-15 22:15:51 +00001148 p = best_p;
H. Peter Anvin4836e332002-04-30 20:56:43 +00001149 length = best_length;
1150
H. Peter Anvinea6e34d2002-04-30 20:51:32 +00001151 slen = 0;
1152
Ed Beroset64ab5192004-12-15 23:32:57 +00001153 /* TODO: snprintf returns the value that the string would have if
H. Peter Anvin70653092007-10-19 14:42:29 -07001154 * the buffer were long enough, and not the actual length of
H. Peter Anvine2c80182005-01-15 22:15:51 +00001155 * the returned string, so each instance of using the return
1156 * value of snprintf should actually be checked to assure that
1157 * the return value is "sane." Maybe a macro wrapper could
1158 * be used for that purpose.
1159 */
H. Peter Anvinde4b89b2007-10-01 15:41:25 -07001160 for (i = 0; i < MAXPREFIX; i++)
H. Peter Anvine2c80182005-01-15 22:15:51 +00001161 switch (ins.prefixes[i]) {
H. Peter Anvin0db11e22007-04-17 20:23:11 +00001162 case P_LOCK:
1163 slen += snprintf(output + slen, outbufsize - slen, "lock ");
1164 break;
H. Peter Anvine2c80182005-01-15 22:15:51 +00001165 case P_REP:
1166 slen += snprintf(output + slen, outbufsize - slen, "rep ");
1167 break;
1168 case P_REPE:
1169 slen += snprintf(output + slen, outbufsize - slen, "repe ");
1170 break;
1171 case P_REPNE:
1172 slen += snprintf(output + slen, outbufsize - slen, "repne ");
1173 break;
1174 case P_A16:
1175 slen += snprintf(output + slen, outbufsize - slen, "a16 ");
1176 break;
1177 case P_A32:
1178 slen += snprintf(output + slen, outbufsize - slen, "a32 ");
1179 break;
H. Peter Anvinbb72f7f2007-11-12 22:55:27 -08001180 case P_A64:
1181 slen += snprintf(output + slen, outbufsize - slen, "a64 ");
1182 break;
H. Peter Anvine2c80182005-01-15 22:15:51 +00001183 case P_O16:
1184 slen += snprintf(output + slen, outbufsize - slen, "o16 ");
1185 break;
1186 case P_O32:
1187 slen += snprintf(output + slen, outbufsize - slen, "o32 ");
1188 break;
H. Peter Anvinbb72f7f2007-11-12 22:55:27 -08001189 case P_O64:
1190 slen += snprintf(output + slen, outbufsize - slen, "o64 ");
1191 break;
H. Peter Anvin2ba7ed72007-09-11 22:13:17 +00001192 default:
1193 break;
H. Peter Anvine2c80182005-01-15 22:15:51 +00001194 }
H. Peter Anvinea6e34d2002-04-30 20:51:32 +00001195
H. Peter Anvin2ba7ed72007-09-11 22:13:17 +00001196 for (i = 0; i < (int)elements(ico); i++)
H. Peter Anvine2c80182005-01-15 22:15:51 +00001197 if ((*p)->opcode == ico[i]) {
1198 slen +=
1199 snprintf(output + slen, outbufsize - slen, "%s%s", icn[i],
1200 whichcond(ins.condition));
1201 break;
1202 }
H. Peter Anvin2ba7ed72007-09-11 22:13:17 +00001203 if (i >= (int)elements(ico))
H. Peter Anvine2c80182005-01-15 22:15:51 +00001204 slen +=
1205 snprintf(output + slen, outbufsize - slen, "%s",
1206 insn_names[(*p)->opcode]);
H. Peter Anvin6867acc2007-10-10 14:58:45 -07001207 colon = false;
H. Peter Anvine2c80182005-01-15 22:15:51 +00001208 length += data - origdata; /* fix up for prefixes */
1209 for (i = 0; i < (*p)->operands; i++) {
H. Peter Anvin7786c362007-09-17 18:45:44 -07001210 opflags_t t = (*p)->opd[i];
1211 const operand *o = &ins.oprs[i];
1212 int64_t offs;
1213
1214 if (t & SAME_AS) {
1215 o = &ins.oprs[t & ~SAME_AS];
1216 t = (*p)->opd[t & ~SAME_AS];
1217 }
1218
H. Peter Anvine2c80182005-01-15 22:15:51 +00001219 output[slen++] = (colon ? ':' : i == 0 ? ' ' : ',');
H. Peter Anvinea6e34d2002-04-30 20:51:32 +00001220
H. Peter Anvin7786c362007-09-17 18:45:44 -07001221 offs = o->offset;
1222 if (o->segment & SEG_RELATIVE) {
1223 offs += offset + length;
H. Peter Anvine2c80182005-01-15 22:15:51 +00001224 /*
1225 * sort out wraparound
1226 */
H. Peter Anvin7786c362007-09-17 18:45:44 -07001227 if (!(o->segment & (SEG_32BIT|SEG_64BIT)))
1228 offs &= 0xffff;
H. Peter Anvin08367e22008-01-02 12:19:41 -08001229 else if (segsize != 64)
1230 offs &= 0xffffffff;
1231
H. Peter Anvine2c80182005-01-15 22:15:51 +00001232 /*
1233 * add sync marker, if autosync is on
1234 */
1235 if (autosync)
H. Peter Anvin7786c362007-09-17 18:45:44 -07001236 add_sync(offs, 0L);
H. Peter Anvine2c80182005-01-15 22:15:51 +00001237 }
H. Peter Anvinea6e34d2002-04-30 20:51:32 +00001238
H. Peter Anvin7786c362007-09-17 18:45:44 -07001239 if (t & COLON)
H. Peter Anvin6867acc2007-10-10 14:58:45 -07001240 colon = true;
H. Peter Anvine2c80182005-01-15 22:15:51 +00001241 else
H. Peter Anvin6867acc2007-10-10 14:58:45 -07001242 colon = false;
H. Peter Anvinea6e34d2002-04-30 20:51:32 +00001243
H. Peter Anvin7786c362007-09-17 18:45:44 -07001244 if ((t & (REGISTER | FPUREG)) ||
1245 (o->segment & SEG_RMREG)) {
1246 enum reg_enum reg;
1247 reg = whichreg(t, o->basereg, ins.rex);
1248 if (t & TO)
H. Peter Anvine2c80182005-01-15 22:15:51 +00001249 slen += snprintf(output + slen, outbufsize - slen, "to ");
1250 slen += snprintf(output + slen, outbufsize - slen, "%s",
H. Peter Anvin7786c362007-09-17 18:45:44 -07001251 reg_names[reg - EXPR_REG_START]);
1252 } else if (!(UNITY & ~t)) {
H. Peter Anvine2c80182005-01-15 22:15:51 +00001253 output[slen++] = '1';
H. Peter Anvin7786c362007-09-17 18:45:44 -07001254 } else if (t & IMMEDIATE) {
1255 if (t & BITS8) {
H. Peter Anvine2c80182005-01-15 22:15:51 +00001256 slen +=
1257 snprintf(output + slen, outbufsize - slen, "byte ");
H. Peter Anvin7786c362007-09-17 18:45:44 -07001258 if (o->segment & SEG_SIGNED) {
1259 if (offs < 0) {
1260 offs *= -1;
H. Peter Anvine2c80182005-01-15 22:15:51 +00001261 output[slen++] = '-';
1262 } else
1263 output[slen++] = '+';
1264 }
H. Peter Anvin7786c362007-09-17 18:45:44 -07001265 } else if (t & BITS16) {
H. Peter Anvine2c80182005-01-15 22:15:51 +00001266 slen +=
1267 snprintf(output + slen, outbufsize - slen, "word ");
H. Peter Anvin7786c362007-09-17 18:45:44 -07001268 } else if (t & BITS32) {
H. Peter Anvine2c80182005-01-15 22:15:51 +00001269 slen +=
1270 snprintf(output + slen, outbufsize - slen, "dword ");
H. Peter Anvin7786c362007-09-17 18:45:44 -07001271 } else if (t & BITS64) {
H. Peter Anvin0ee01422007-04-16 01:18:30 +00001272 slen +=
1273 snprintf(output + slen, outbufsize - slen, "qword ");
H. Peter Anvin7786c362007-09-17 18:45:44 -07001274 } else if (t & NEAR) {
H. Peter Anvine2c80182005-01-15 22:15:51 +00001275 slen +=
1276 snprintf(output + slen, outbufsize - slen, "near ");
H. Peter Anvin7786c362007-09-17 18:45:44 -07001277 } else if (t & SHORT) {
H. Peter Anvine2c80182005-01-15 22:15:51 +00001278 slen +=
1279 snprintf(output + slen, outbufsize - slen, "short ");
1280 }
1281 slen +=
Keith Kanios93f2e9a2007-04-14 00:10:59 +00001282 snprintf(output + slen, outbufsize - slen, "0x%"PRIx64"",
H. Peter Anvin7786c362007-09-17 18:45:44 -07001283 offs);
1284 } else if (!(MEM_OFFS & ~t)) {
H. Peter Anvine2c80182005-01-15 22:15:51 +00001285 slen +=
H. Peter Anvine8cdcdc2007-11-12 21:57:00 -08001286 snprintf(output + slen, outbufsize - slen,
1287 "[%s%s%s0x%"PRIx64"]",
H. Peter Anvin62cb6062007-09-11 22:44:03 +00001288 (segover ? segover : ""),
1289 (segover ? ":" : ""),
H. Peter Anvine8cdcdc2007-11-12 21:57:00 -08001290 (o->disp_size == 64 ? "qword " :
1291 o->disp_size == 32 ? "dword " :
1292 o->disp_size == 16 ? "word " : ""), offs);
H. Peter Anvine2c80182005-01-15 22:15:51 +00001293 segover = NULL;
H. Peter Anvin7786c362007-09-17 18:45:44 -07001294 } else if (!(REGMEM & ~t)) {
H. Peter Anvin6867acc2007-10-10 14:58:45 -07001295 int started = false;
H. Peter Anvin7786c362007-09-17 18:45:44 -07001296 if (t & BITS8)
H. Peter Anvine2c80182005-01-15 22:15:51 +00001297 slen +=
1298 snprintf(output + slen, outbufsize - slen, "byte ");
H. Peter Anvin7786c362007-09-17 18:45:44 -07001299 if (t & BITS16)
H. Peter Anvine2c80182005-01-15 22:15:51 +00001300 slen +=
1301 snprintf(output + slen, outbufsize - slen, "word ");
H. Peter Anvin7786c362007-09-17 18:45:44 -07001302 if (t & BITS32)
H. Peter Anvine2c80182005-01-15 22:15:51 +00001303 slen +=
1304 snprintf(output + slen, outbufsize - slen, "dword ");
H. Peter Anvin7786c362007-09-17 18:45:44 -07001305 if (t & BITS64)
H. Peter Anvine2c80182005-01-15 22:15:51 +00001306 slen +=
1307 snprintf(output + slen, outbufsize - slen, "qword ");
H. Peter Anvin7786c362007-09-17 18:45:44 -07001308 if (t & BITS80)
H. Peter Anvine2c80182005-01-15 22:15:51 +00001309 slen +=
1310 snprintf(output + slen, outbufsize - slen, "tword ");
H. Peter Anvine8cdcdc2007-11-12 21:57:00 -08001311 if (t & BITS128)
1312 slen +=
1313 snprintf(output + slen, outbufsize - slen, "oword ");
H. Peter Anvin7786c362007-09-17 18:45:44 -07001314 if (t & FAR)
H. Peter Anvine2c80182005-01-15 22:15:51 +00001315 slen += snprintf(output + slen, outbufsize - slen, "far ");
H. Peter Anvin7786c362007-09-17 18:45:44 -07001316 if (t & NEAR)
H. Peter Anvine2c80182005-01-15 22:15:51 +00001317 slen +=
1318 snprintf(output + slen, outbufsize - slen, "near ");
1319 output[slen++] = '[';
H. Peter Anvinde4b89b2007-10-01 15:41:25 -07001320 if (o->disp_size)
H. Peter Anvine2c80182005-01-15 22:15:51 +00001321 slen += snprintf(output + slen, outbufsize - slen, "%s",
H. Peter Anvinde4b89b2007-10-01 15:41:25 -07001322 (o->disp_size == 64 ? "qword " :
1323 o->disp_size == 32 ? "dword " :
1324 o->disp_size == 16 ? "word " :
H. Peter Anvin0ee01422007-04-16 01:18:30 +00001325 ""));
H. Peter Anvin7786c362007-09-17 18:45:44 -07001326 if (o->eaflags & EAF_REL)
H. Peter Anvin99c4ecd2007-08-28 23:06:00 +00001327 slen += snprintf(output + slen, outbufsize - slen, "rel ");
H. Peter Anvine2c80182005-01-15 22:15:51 +00001328 if (segover) {
1329 slen +=
1330 snprintf(output + slen, outbufsize - slen, "%s:",
1331 segover);
1332 segover = NULL;
1333 }
H. Peter Anvin7786c362007-09-17 18:45:44 -07001334 if (o->basereg != -1) {
H. Peter Anvine2c80182005-01-15 22:15:51 +00001335 slen += snprintf(output + slen, outbufsize - slen, "%s",
H. Peter Anvin7786c362007-09-17 18:45:44 -07001336 reg_names[(o->basereg -
H. Peter Anvine2c80182005-01-15 22:15:51 +00001337 EXPR_REG_START)]);
H. Peter Anvin6867acc2007-10-10 14:58:45 -07001338 started = true;
H. Peter Anvine2c80182005-01-15 22:15:51 +00001339 }
H. Peter Anvin7786c362007-09-17 18:45:44 -07001340 if (o->indexreg != -1) {
H. Peter Anvine2c80182005-01-15 22:15:51 +00001341 if (started)
1342 output[slen++] = '+';
1343 slen += snprintf(output + slen, outbufsize - slen, "%s",
H. Peter Anvin7786c362007-09-17 18:45:44 -07001344 reg_names[(o->indexreg -
H. Peter Anvine2c80182005-01-15 22:15:51 +00001345 EXPR_REG_START)]);
H. Peter Anvin7786c362007-09-17 18:45:44 -07001346 if (o->scale > 1)
H. Peter Anvine2c80182005-01-15 22:15:51 +00001347 slen +=
1348 snprintf(output + slen, outbufsize - slen, "*%d",
H. Peter Anvin7786c362007-09-17 18:45:44 -07001349 o->scale);
H. Peter Anvin6867acc2007-10-10 14:58:45 -07001350 started = true;
H. Peter Anvine2c80182005-01-15 22:15:51 +00001351 }
H. Peter Anvine8cdcdc2007-11-12 21:57:00 -08001352
1353
H. Peter Anvin7786c362007-09-17 18:45:44 -07001354 if (o->segment & SEG_DISP8) {
H. Peter Anvine8cdcdc2007-11-12 21:57:00 -08001355 const char *prefix;
1356 uint8_t offset = offs;
1357 if ((int8_t)offset < 0) {
1358 prefix = "-";
H. Peter Anvin0ee01422007-04-16 01:18:30 +00001359 offset = -offset;
H. Peter Anvine8cdcdc2007-11-12 21:57:00 -08001360 } else {
1361 prefix = "+";
H. Peter Anvin0ee01422007-04-16 01:18:30 +00001362 }
H. Peter Anvine2c80182005-01-15 22:15:51 +00001363 slen +=
H. Peter Anvin0ee01422007-04-16 01:18:30 +00001364 snprintf(output + slen, outbufsize - slen, "%s0x%"PRIx8"",
H. Peter Anvine8cdcdc2007-11-12 21:57:00 -08001365 prefix, offset);
H. Peter Anvin7786c362007-09-17 18:45:44 -07001366 } else if (o->segment & SEG_DISP16) {
H. Peter Anvine8cdcdc2007-11-12 21:57:00 -08001367 const char *prefix;
1368 uint16_t offset = offs;
1369 if ((int16_t)offset < 0 && started) {
H. Peter Anvin0ee01422007-04-16 01:18:30 +00001370 offset = -offset;
H. Peter Anvine8cdcdc2007-11-12 21:57:00 -08001371 prefix = "-";
1372 } else {
1373 prefix = started ? "+" : "";
H. Peter Anvin0ee01422007-04-16 01:18:30 +00001374 }
H. Peter Anvine2c80182005-01-15 22:15:51 +00001375 slen +=
H. Peter Anvine8cdcdc2007-11-12 21:57:00 -08001376 snprintf(output + slen, outbufsize - slen,
1377 "%s0x%"PRIx16"", prefix, offset);
H. Peter Anvin7786c362007-09-17 18:45:44 -07001378 } else if (o->segment & SEG_DISP32) {
H. Peter Anvine8cdcdc2007-11-12 21:57:00 -08001379 if (prefix.asize == 64) {
1380 const char *prefix;
1381 uint64_t offset = (int64_t)(int32_t)offs;
1382 if ((int32_t)offs < 0 && started) {
1383 offset = -offset;
1384 prefix = "-";
1385 } else {
1386 prefix = started ? "+" : "";
1387 }
1388 slen +=
1389 snprintf(output + slen, outbufsize - slen,
1390 "%s0x%"PRIx64"", prefix, offset);
1391 } else {
1392 const char *prefix;
1393 uint32_t offset = offs;
1394 if ((int32_t) offset < 0 && started) {
H. Peter Anvin0ee01422007-04-16 01:18:30 +00001395 offset = -offset;
1396 prefix = "-";
1397 } else {
1398 prefix = started ? "+" : "";
1399 }
1400 slen +=
1401 snprintf(output + slen, outbufsize - slen,
1402 "%s0x%"PRIx32"", prefix, offset);
H. Peter Anvine8cdcdc2007-11-12 21:57:00 -08001403 }
H. Peter Anvine2c80182005-01-15 22:15:51 +00001404 }
1405 output[slen++] = ']';
1406 } else {
1407 slen +=
1408 snprintf(output + slen, outbufsize - slen, "<operand%d>",
1409 i);
1410 }
H. Peter Anvinea6e34d2002-04-30 20:51:32 +00001411 }
1412 output[slen] = '\0';
H. Peter Anvine2c80182005-01-15 22:15:51 +00001413 if (segover) { /* unused segment override */
Keith Kaniosa6dfa782007-04-13 16:47:53 +00001414 char *p = output;
H. Peter Anvine2c80182005-01-15 22:15:51 +00001415 int count = slen + 1;
1416 while (count--)
1417 p[count + 3] = p[count];
1418 strncpy(output, segover, 2);
1419 output[2] = ' ';
H. Peter Anvinea6e34d2002-04-30 20:51:32 +00001420 }
1421 return length;
1422}
1423
Keith Kaniosa6dfa782007-04-13 16:47:53 +00001424int32_t eatbyte(uint8_t *data, char *output, int outbufsize)
H. Peter Anvineba20a72002-04-30 20:53:55 +00001425{
Ed Beroset92348172004-12-15 18:27:50 +00001426 snprintf(output, outbufsize, "db 0x%02X", *data);
H. Peter Anvinea6e34d2002-04-30 20:51:32 +00001427 return 1;
1428}