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H. Peter Anvin9e6747c2009-06-28 17:13:04 -07001/* ----------------------------------------------------------------------- *
2 *
H. Peter Anvin7023d632010-08-16 22:13:14 -07003 * Copyright 1996-2010 The NASM Authors - All Rights Reserved
H. Peter Anvin9e6747c2009-06-28 17:13:04 -07004 * See the file AUTHORS included with the NASM distribution for
5 * the specific copyright holders.
H. Peter Anvinea6e34d2002-04-30 20:51:32 +00006 *
H. Peter Anvin9e6747c2009-06-28 17:13:04 -07007 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following
9 * conditions are met:
10 *
11 * * Redistributions of source code must retain the above copyright
12 * notice, this list of conditions and the following disclaimer.
13 * * Redistributions in binary form must reproduce the above
14 * copyright notice, this list of conditions and the following
15 * disclaimer in the documentation and/or other materials provided
16 * with the distribution.
17 *
18 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND
19 * CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
20 * INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
21 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
22 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
23 * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
24 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
25 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
26 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
27 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
28 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
29 * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
30 * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
31 *
32 * ----------------------------------------------------------------------- */
33
34/*
35 * disasm.c where all the _work_ gets done in the Netwide Disassembler
H. Peter Anvinea6e34d2002-04-30 20:51:32 +000036 */
37
H. Peter Anvinfe501952007-10-02 21:53:51 -070038#include "compiler.h"
39
H. Peter Anvinea6e34d2002-04-30 20:51:32 +000040#include <stdio.h>
41#include <string.h>
H. Peter Anvin2ba7ed72007-09-11 22:13:17 +000042#include <limits.h>
Keith Kaniosb7a89542007-04-12 02:40:54 +000043#include <inttypes.h>
H. Peter Anvinea6e34d2002-04-30 20:51:32 +000044
45#include "nasm.h"
46#include "disasm.h"
47#include "sync.h"
48#include "insns.h"
H. Peter Anvina4835d42008-05-20 14:21:29 -070049#include "tables.h"
50#include "regdis.h"
H. Peter Anvinea6e34d2002-04-30 20:51:32 +000051
H. Peter Anvinea6e34d2002-04-30 20:51:32 +000052/*
53 * Flags that go into the `segment' field of `insn' structures
54 * during disassembly.
55 */
H. Peter Anvin0ee01422007-04-16 01:18:30 +000056#define SEG_RELATIVE 1
57#define SEG_32BIT 2
58#define SEG_RMREG 4
59#define SEG_DISP8 8
60#define SEG_DISP16 16
61#define SEG_DISP32 32
62#define SEG_NODISP 64
63#define SEG_SIGNED 128
64#define SEG_64BIT 256
H. Peter Anvinea6e34d2002-04-30 20:51:32 +000065
H. Peter Anvin62cb6062007-09-11 22:44:03 +000066/*
67 * Prefix information
68 */
69struct prefix_info {
70 uint8_t osize; /* Operand size */
71 uint8_t asize; /* Address size */
72 uint8_t osp; /* Operand size prefix present */
73 uint8_t asp; /* Address size prefix present */
74 uint8_t rep; /* Rep prefix present */
75 uint8_t seg; /* Segment override prefix present */
H. Peter Anvinc2acf7b2009-02-21 18:22:56 -080076 uint8_t wait; /* WAIT "prefix" present */
H. Peter Anvin62cb6062007-09-11 22:44:03 +000077 uint8_t lock; /* Lock prefix present */
H. Peter Anvin7334e3a2008-05-05 18:47:27 -070078 uint8_t vex[3]; /* VEX prefix present */
H. Peter Anvina04019c2009-05-03 21:42:34 -070079 uint8_t vex_c; /* VEX "class" (VEX, XOP, ...) */
H. Peter Anvin7334e3a2008-05-05 18:47:27 -070080 uint8_t vex_m; /* VEX.M field */
81 uint8_t vex_v;
82 uint8_t vex_lp; /* VEX.LP fields */
83 uint32_t rex; /* REX prefix present */
H. Peter Anvin62cb6062007-09-11 22:44:03 +000084};
85
H. Peter Anvin0ee01422007-04-16 01:18:30 +000086#define getu8(x) (*(uint8_t *)(x))
H. Peter Anvind1fb15c2007-11-13 09:37:59 -080087#if X86_MEMORY
H. Peter Anvin0ee01422007-04-16 01:18:30 +000088/* Littleendian CPU which can handle unaligned references */
89#define getu16(x) (*(uint16_t *)(x))
90#define getu32(x) (*(uint32_t *)(x))
91#define getu64(x) (*(uint64_t *)(x))
92#else
93static uint16_t getu16(uint8_t *data)
94{
95 return (uint16_t)data[0] + ((uint16_t)data[1] << 8);
96}
97static uint32_t getu32(uint8_t *data)
98{
99 return (uint32_t)getu16(data) + ((uint32_t)getu16(data+2) << 16);
100}
101static uint64_t getu64(uint8_t *data)
102{
103 return (uint64_t)getu32(data) + ((uint64_t)getu32(data+4) << 32);
104}
105#endif
106
107#define gets8(x) ((int8_t)getu8(x))
108#define gets16(x) ((int16_t)getu16(x))
109#define gets32(x) ((int32_t)getu32(x))
110#define gets64(x) ((int64_t)getu64(x))
111
112/* Important: regval must already have been adjusted for rex extensions */
H. Peter Anvinf8563f72009-10-13 12:28:14 -0700113static enum reg_enum whichreg(opflags_t regflags, int regval, int rex)
H. Peter Anvin0ee01422007-04-16 01:18:30 +0000114{
H. Peter Anvin0da6b582007-09-12 20:32:39 -0700115 if (!(regflags & (REGISTER|REGMEM)))
116 return 0; /* Registers not permissible?! */
117
118 regflags |= REGISTER;
119
H. Peter Anvinea6e34d2002-04-30 20:51:32 +0000120 if (!(REG_AL & ~regflags))
H. Peter Anvine2c80182005-01-15 22:15:51 +0000121 return R_AL;
H. Peter Anvinea6e34d2002-04-30 20:51:32 +0000122 if (!(REG_AX & ~regflags))
H. Peter Anvine2c80182005-01-15 22:15:51 +0000123 return R_AX;
H. Peter Anvinea6e34d2002-04-30 20:51:32 +0000124 if (!(REG_EAX & ~regflags))
H. Peter Anvine2c80182005-01-15 22:15:51 +0000125 return R_EAX;
H. Peter Anvin7cf03af2007-04-16 02:39:56 +0000126 if (!(REG_RAX & ~regflags))
127 return R_RAX;
H. Peter Anvin10101f22003-02-24 23:22:45 +0000128 if (!(REG_DL & ~regflags))
H. Peter Anvine2c80182005-01-15 22:15:51 +0000129 return R_DL;
H. Peter Anvinea6e34d2002-04-30 20:51:32 +0000130 if (!(REG_DX & ~regflags))
H. Peter Anvine2c80182005-01-15 22:15:51 +0000131 return R_DX;
H. Peter Anvin10101f22003-02-24 23:22:45 +0000132 if (!(REG_EDX & ~regflags))
H. Peter Anvine2c80182005-01-15 22:15:51 +0000133 return R_EDX;
H. Peter Anvin7cf03af2007-04-16 02:39:56 +0000134 if (!(REG_RDX & ~regflags))
135 return R_RDX;
H. Peter Anvinea6e34d2002-04-30 20:51:32 +0000136 if (!(REG_CL & ~regflags))
H. Peter Anvine2c80182005-01-15 22:15:51 +0000137 return R_CL;
H. Peter Anvinea6e34d2002-04-30 20:51:32 +0000138 if (!(REG_CX & ~regflags))
H. Peter Anvine2c80182005-01-15 22:15:51 +0000139 return R_CX;
H. Peter Anvinea6e34d2002-04-30 20:51:32 +0000140 if (!(REG_ECX & ~regflags))
H. Peter Anvine2c80182005-01-15 22:15:51 +0000141 return R_ECX;
H. Peter Anvin7cf03af2007-04-16 02:39:56 +0000142 if (!(REG_RCX & ~regflags))
143 return R_RCX;
H. Peter Anvinea6e34d2002-04-30 20:51:32 +0000144 if (!(FPU0 & ~regflags))
H. Peter Anvine2c80182005-01-15 22:15:51 +0000145 return R_ST0;
H. Peter Anvin39d6ac62008-05-21 10:33:19 -0700146 if (!(XMM0 & ~regflags))
147 return R_XMM0;
148 if (!(YMM0 & ~regflags))
149 return R_YMM0;
H. Peter Anvind7ed89e2002-04-30 20:52:08 +0000150 if (!(REG_CS & ~regflags))
H. Peter Anvin232badb2002-06-06 02:41:20 +0000151 return (regval == 1) ? R_CS : 0;
H. Peter Anvin76690a12002-04-30 20:52:49 +0000152 if (!(REG_DESS & ~regflags))
H. Peter Anvine2c80182005-01-15 22:15:51 +0000153 return (regval == 0 || regval == 2
H. Peter Anvina4835d42008-05-20 14:21:29 -0700154 || regval == 3 ? nasm_rd_sreg[regval] : 0);
H. Peter Anvin76690a12002-04-30 20:52:49 +0000155 if (!(REG_FSGS & ~regflags))
H. Peter Anvina4835d42008-05-20 14:21:29 -0700156 return (regval == 4 || regval == 5 ? nasm_rd_sreg[regval] : 0);
H. Peter Anvin232badb2002-06-06 02:41:20 +0000157 if (!(REG_SEG67 & ~regflags))
H. Peter Anvina4835d42008-05-20 14:21:29 -0700158 return (regval == 6 || regval == 7 ? nasm_rd_sreg[regval] : 0);
H. Peter Anvin232badb2002-06-06 02:41:20 +0000159
H. Peter Anvin0ee01422007-04-16 01:18:30 +0000160 /* All the entries below look up regval in an 16-entry array */
161 if (regval < 0 || regval > 15)
H. Peter Anvine2c80182005-01-15 22:15:51 +0000162 return 0;
H. Peter Anvin232badb2002-06-06 02:41:20 +0000163
H. Peter Anvin0da6b582007-09-12 20:32:39 -0700164 if (!(REG8 & ~regflags)) {
H. Peter Anvin9472dab2009-06-24 21:38:29 -0700165 if (rex & (REX_P|REX_NH))
H. Peter Anvina4835d42008-05-20 14:21:29 -0700166 return nasm_rd_reg8_rex[regval];
H. Peter Anvin0ee01422007-04-16 01:18:30 +0000167 else
H. Peter Anvina4835d42008-05-20 14:21:29 -0700168 return nasm_rd_reg8[regval];
H. Peter Anvin0ee01422007-04-16 01:18:30 +0000169 }
H. Peter Anvin0da6b582007-09-12 20:32:39 -0700170 if (!(REG16 & ~regflags))
H. Peter Anvina4835d42008-05-20 14:21:29 -0700171 return nasm_rd_reg16[regval];
H. Peter Anvin0da6b582007-09-12 20:32:39 -0700172 if (!(REG32 & ~regflags))
H. Peter Anvina4835d42008-05-20 14:21:29 -0700173 return nasm_rd_reg32[regval];
H. Peter Anvin0da6b582007-09-12 20:32:39 -0700174 if (!(REG64 & ~regflags))
H. Peter Anvina4835d42008-05-20 14:21:29 -0700175 return nasm_rd_reg64[regval];
H. Peter Anvinea6e34d2002-04-30 20:51:32 +0000176 if (!(REG_SREG & ~regflags))
H. Peter Anvina4835d42008-05-20 14:21:29 -0700177 return nasm_rd_sreg[regval & 7]; /* Ignore REX */
H. Peter Anvinea6e34d2002-04-30 20:51:32 +0000178 if (!(REG_CREG & ~regflags))
H. Peter Anvina4835d42008-05-20 14:21:29 -0700179 return nasm_rd_creg[regval];
H. Peter Anvinea6e34d2002-04-30 20:51:32 +0000180 if (!(REG_DREG & ~regflags))
H. Peter Anvina4835d42008-05-20 14:21:29 -0700181 return nasm_rd_dreg[regval];
H. Peter Anvin0ee01422007-04-16 01:18:30 +0000182 if (!(REG_TREG & ~regflags)) {
H. Peter Anvin9472dab2009-06-24 21:38:29 -0700183 if (regval > 7)
H. Peter Anvin0ee01422007-04-16 01:18:30 +0000184 return 0; /* TR registers are ill-defined with rex */
H. Peter Anvina4835d42008-05-20 14:21:29 -0700185 return nasm_rd_treg[regval];
H. Peter Anvin0ee01422007-04-16 01:18:30 +0000186 }
H. Peter Anvinea6e34d2002-04-30 20:51:32 +0000187 if (!(FPUREG & ~regflags))
H. Peter Anvina4835d42008-05-20 14:21:29 -0700188 return nasm_rd_fpureg[regval & 7]; /* Ignore REX */
H. Peter Anvinea6e34d2002-04-30 20:51:32 +0000189 if (!(MMXREG & ~regflags))
H. Peter Anvina4835d42008-05-20 14:21:29 -0700190 return nasm_rd_mmxreg[regval & 7]; /* Ignore REX */
H. Peter Anvin4836e332002-04-30 20:56:43 +0000191 if (!(XMMREG & ~regflags))
H. Peter Anvina4835d42008-05-20 14:21:29 -0700192 return nasm_rd_xmmreg[regval];
H. Peter Anvin7334e3a2008-05-05 18:47:27 -0700193 if (!(YMMREG & ~regflags))
H. Peter Anvina4835d42008-05-20 14:21:29 -0700194 return nasm_rd_ymmreg[regval];
H. Peter Anvin232badb2002-06-06 02:41:20 +0000195
H. Peter Anvinea6e34d2002-04-30 20:51:32 +0000196 return 0;
197}
198
H. Peter Anvinea6e34d2002-04-30 20:51:32 +0000199/*
H. Peter Anvin7786c362007-09-17 18:45:44 -0700200 * Process a DREX suffix
201 */
202static uint8_t *do_drex(uint8_t *data, insn *ins)
203{
204 uint8_t drex = *data++;
205 operand *dst = &ins->oprs[ins->drexdst];
206
207 if ((drex & 8) != ((ins->rex & REX_OC) ? 8 : 0))
208 return NULL; /* OC0 mismatch */
209 ins->rex = (ins->rex & ~7) | (drex & 7);
H. Peter Anvin70653092007-10-19 14:42:29 -0700210
H. Peter Anvin7786c362007-09-17 18:45:44 -0700211 dst->segment = SEG_RMREG;
212 dst->basereg = drex >> 4;
213 return data;
214}
215
216
217/*
H. Peter Anvinea6e34d2002-04-30 20:51:32 +0000218 * Process an effective address (ModRM) specification.
219 */
Keith Kaniosb7a89542007-04-12 02:40:54 +0000220static uint8_t *do_ea(uint8_t *data, int modrm, int asize,
H. Peter Anvin7786c362007-09-17 18:45:44 -0700221 int segsize, operand * op, insn *ins)
H. Peter Anvineba20a72002-04-30 20:53:55 +0000222{
H. Peter Anvinea6e34d2002-04-30 20:51:32 +0000223 int mod, rm, scale, index, base;
H. Peter Anvin7786c362007-09-17 18:45:44 -0700224 int rex;
225 uint8_t sib = 0;
H. Peter Anvinea6e34d2002-04-30 20:51:32 +0000226
227 mod = (modrm >> 6) & 03;
228 rm = modrm & 07;
229
H. Peter Anvin7786c362007-09-17 18:45:44 -0700230 if (mod != 3 && rm == 4 && asize != 16)
231 sib = *data++;
232
233 if (ins->rex & REX_D) {
234 data = do_drex(data, ins);
235 if (!data)
236 return NULL;
237 }
238 rex = ins->rex;
239
H. Peter Anvine2c80182005-01-15 22:15:51 +0000240 if (mod == 3) { /* pure register version */
H. Peter Anvin7cf03af2007-04-16 02:39:56 +0000241 op->basereg = rm+(rex & REX_B ? 8 : 0);
H. Peter Anvine2c80182005-01-15 22:15:51 +0000242 op->segment |= SEG_RMREG;
243 return data;
H. Peter Anvinea6e34d2002-04-30 20:51:32 +0000244 }
245
H. Peter Anvinde4b89b2007-10-01 15:41:25 -0700246 op->disp_size = 0;
H. Peter Anvin99c4ecd2007-08-28 23:06:00 +0000247 op->eaflags = 0;
H. Peter Anvinea6e34d2002-04-30 20:51:32 +0000248
249 if (asize == 16) {
H. Peter Anvine2c80182005-01-15 22:15:51 +0000250 /*
251 * <mod> specifies the displacement size (none, byte or
252 * word), and <rm> specifies the register combination.
253 * Exception: mod=0,rm=6 does not specify [BP] as one might
254 * expect, but instead specifies [disp16].
255 */
256 op->indexreg = op->basereg = -1;
257 op->scale = 1; /* always, in 16 bits */
258 switch (rm) {
259 case 0:
260 op->basereg = R_BX;
261 op->indexreg = R_SI;
262 break;
263 case 1:
264 op->basereg = R_BX;
265 op->indexreg = R_DI;
266 break;
267 case 2:
268 op->basereg = R_BP;
269 op->indexreg = R_SI;
270 break;
271 case 3:
272 op->basereg = R_BP;
273 op->indexreg = R_DI;
274 break;
275 case 4:
276 op->basereg = R_SI;
277 break;
278 case 5:
279 op->basereg = R_DI;
280 break;
281 case 6:
282 op->basereg = R_BP;
283 break;
284 case 7:
285 op->basereg = R_BX;
286 break;
287 }
288 if (rm == 6 && mod == 0) { /* special case */
289 op->basereg = -1;
290 if (segsize != 16)
H. Peter Anvinde4b89b2007-10-01 15:41:25 -0700291 op->disp_size = 16;
H. Peter Anvine2c80182005-01-15 22:15:51 +0000292 mod = 2; /* fake disp16 */
293 }
294 switch (mod) {
295 case 0:
296 op->segment |= SEG_NODISP;
297 break;
298 case 1:
299 op->segment |= SEG_DISP8;
H. Peter Anvin0ee01422007-04-16 01:18:30 +0000300 op->offset = (int8_t)*data++;
H. Peter Anvine2c80182005-01-15 22:15:51 +0000301 break;
302 case 2:
303 op->segment |= SEG_DISP16;
304 op->offset = *data++;
305 op->offset |= ((unsigned)*data++) << 8;
306 break;
307 }
308 return data;
H. Peter Anvinea6e34d2002-04-30 20:51:32 +0000309 } else {
H. Peter Anvine2c80182005-01-15 22:15:51 +0000310 /*
311 * Once again, <mod> specifies displacement size (this time
312 * none, byte or *dword*), while <rm> specifies the base
313 * register. Again, [EBP] is missing, replaced by a pure
H. Peter Anvin0ee01422007-04-16 01:18:30 +0000314 * disp32 (this time that's mod=0,rm=*5*) in 32-bit mode,
315 * and RIP-relative addressing in 64-bit mode.
316 *
317 * However, rm=4
H. Peter Anvine2c80182005-01-15 22:15:51 +0000318 * indicates not a single base register, but instead the
319 * presence of a SIB byte...
320 */
H. Peter Anvin0ee01422007-04-16 01:18:30 +0000321 int a64 = asize == 64;
322
H. Peter Anvine2c80182005-01-15 22:15:51 +0000323 op->indexreg = -1;
H. Peter Anvin0ee01422007-04-16 01:18:30 +0000324
325 if (a64)
H. Peter Anvina4835d42008-05-20 14:21:29 -0700326 op->basereg = nasm_rd_reg64[rm | ((rex & REX_B) ? 8 : 0)];
H. Peter Anvin0ee01422007-04-16 01:18:30 +0000327 else
H. Peter Anvina4835d42008-05-20 14:21:29 -0700328 op->basereg = nasm_rd_reg32[rm | ((rex & REX_B) ? 8 : 0)];
H. Peter Anvin0ee01422007-04-16 01:18:30 +0000329
H. Peter Anvine2c80182005-01-15 22:15:51 +0000330 if (rm == 5 && mod == 0) {
H. Peter Anvin0ee01422007-04-16 01:18:30 +0000331 if (segsize == 64) {
H. Peter Anvin99c4ecd2007-08-28 23:06:00 +0000332 op->eaflags |= EAF_REL;
H. Peter Anvin0ee01422007-04-16 01:18:30 +0000333 op->segment |= SEG_RELATIVE;
334 mod = 2; /* fake disp32 */
H. Peter Anvin0ee01422007-04-16 01:18:30 +0000335 }
H. Peter Anvin99c4ecd2007-08-28 23:06:00 +0000336
337 if (asize != 64)
H. Peter Anvinde4b89b2007-10-01 15:41:25 -0700338 op->disp_size = asize;
H. Peter Anvin99c4ecd2007-08-28 23:06:00 +0000339
340 op->basereg = -1;
341 mod = 2; /* fake disp32 */
H. Peter Anvine2c80182005-01-15 22:15:51 +0000342 }
H. Peter Anvin0ee01422007-04-16 01:18:30 +0000343
H. Peter Anvine2c80182005-01-15 22:15:51 +0000344 if (rm == 4) { /* process SIB */
H. Peter Anvin7786c362007-09-17 18:45:44 -0700345 scale = (sib >> 6) & 03;
346 index = (sib >> 3) & 07;
347 base = sib & 07;
H. Peter Anvinea6e34d2002-04-30 20:51:32 +0000348
H. Peter Anvine2c80182005-01-15 22:15:51 +0000349 op->scale = 1 << scale;
H. Peter Anvinea6e34d2002-04-30 20:51:32 +0000350
H. Peter Anvin83b2e4f2008-08-20 09:42:47 -0700351 if (index == 4 && !(rex & REX_X))
352 op->indexreg = -1; /* ESP/RSP cannot be an index */
H. Peter Anvin0ee01422007-04-16 01:18:30 +0000353 else if (a64)
H. Peter Anvina4835d42008-05-20 14:21:29 -0700354 op->indexreg = nasm_rd_reg64[index | ((rex & REX_X) ? 8 : 0)];
H. Peter Anvin0ee01422007-04-16 01:18:30 +0000355 else
H. Peter Anvina4835d42008-05-20 14:21:29 -0700356 op->indexreg = nasm_rd_reg32[index | ((rex & REX_X) ? 8 : 0)];
H. Peter Anvin0ee01422007-04-16 01:18:30 +0000357
358 if (base == 5 && mod == 0) {
359 op->basereg = -1;
360 mod = 2; /* Fake disp32 */
361 } else if (a64)
H. Peter Anvina4835d42008-05-20 14:21:29 -0700362 op->basereg = nasm_rd_reg64[base | ((rex & REX_B) ? 8 : 0)];
H. Peter Anvin0ee01422007-04-16 01:18:30 +0000363 else
H. Peter Anvina4835d42008-05-20 14:21:29 -0700364 op->basereg = nasm_rd_reg32[base | ((rex & REX_B) ? 8 : 0)];
H. Peter Anvin99c4ecd2007-08-28 23:06:00 +0000365
H. Peter Anvine8cdcdc2007-11-12 21:57:00 -0800366 if (segsize == 16)
H. Peter Anvinde4b89b2007-10-01 15:41:25 -0700367 op->disp_size = 32;
H. Peter Anvine2c80182005-01-15 22:15:51 +0000368 }
H. Peter Anvin0ee01422007-04-16 01:18:30 +0000369
H. Peter Anvine2c80182005-01-15 22:15:51 +0000370 switch (mod) {
371 case 0:
372 op->segment |= SEG_NODISP;
373 break;
374 case 1:
375 op->segment |= SEG_DISP8;
H. Peter Anvin0ee01422007-04-16 01:18:30 +0000376 op->offset = gets8(data);
377 data++;
H. Peter Anvine2c80182005-01-15 22:15:51 +0000378 break;
379 case 2:
380 op->segment |= SEG_DISP32;
H. Peter Anvin08367e22008-01-02 12:19:41 -0800381 op->offset = gets32(data);
H. Peter Anvin0ee01422007-04-16 01:18:30 +0000382 data += 4;
H. Peter Anvine2c80182005-01-15 22:15:51 +0000383 break;
384 }
385 return data;
H. Peter Anvinea6e34d2002-04-30 20:51:32 +0000386 }
387}
388
389/*
H. Peter Anvinef7468f2002-04-30 20:57:59 +0000390 * Determine whether the instruction template in t corresponds to the data
H. Peter Anvinea6e34d2002-04-30 20:51:32 +0000391 * stream in data. Return the number of bytes matched if so.
392 */
H. Peter Anvine8cdcdc2007-11-12 21:57:00 -0800393#define case4(x) case (x): case (x)+1: case (x)+2: case (x)+3
394
H. Peter Anvin62cb6062007-09-11 22:44:03 +0000395static int matches(const struct itemplate *t, uint8_t *data,
396 const struct prefix_info *prefix, int segsize, insn *ins)
H. Peter Anvineba20a72002-04-30 20:53:55 +0000397{
Keith Kaniosb7a89542007-04-12 02:40:54 +0000398 uint8_t *r = (uint8_t *)(t->code);
399 uint8_t *origdata = data;
H. Peter Anvin6867acc2007-10-10 14:58:45 -0700400 bool a_used = false, o_used = false;
H. Peter Anvin62cb6062007-09-11 22:44:03 +0000401 enum prefixes drep = 0;
H. Peter Anvinc2acf7b2009-02-21 18:22:56 -0800402 enum prefixes dwait = 0;
H. Peter Anvin62cb6062007-09-11 22:44:03 +0000403 uint8_t lock = prefix->lock;
404 int osize = prefix->osize;
405 int asize = prefix->asize;
H. Peter Anvine8cdcdc2007-11-12 21:57:00 -0800406 int i, c;
H. Peter Anvin941fcbb2008-10-15 11:51:24 -0700407 int op1, op2;
H. Peter Anvin92d36122008-10-25 00:42:51 -0700408 struct operand *opx, *opy;
H. Peter Anvin941fcbb2008-10-15 11:51:24 -0700409 uint8_t opex = 0;
H. Peter Anvina30cc072007-11-18 21:55:26 -0800410 int s_field_for = -1; /* No 144/154 series code encountered */
H. Peter Anvin6b3b7bc2008-05-20 23:36:36 -0700411 bool vex_ok = false;
H. Peter Anvin94352832008-05-26 12:03:55 -0700412 int regmask = (segsize == 64) ? 15 : 7;
H. Peter Anvin2ba7ed72007-09-11 22:13:17 +0000413
H. Peter Anvin7eb4a382007-09-17 15:49:30 -0700414 for (i = 0; i < MAX_OPERANDS; i++) {
H. Peter Anvinde4b89b2007-10-01 15:41:25 -0700415 ins->oprs[i].segment = ins->oprs[i].disp_size =
H. Peter Anvin7eb4a382007-09-17 15:49:30 -0700416 (segsize == 64 ? SEG_64BIT : segsize == 32 ? SEG_32BIT : 0);
417 }
H. Peter Anvin2ba7ed72007-09-11 22:13:17 +0000418 ins->condition = -1;
H. Peter Anvin62cb6062007-09-11 22:44:03 +0000419 ins->rex = prefix->rex;
H. Peter Anvinbb72f7f2007-11-12 22:55:27 -0800420 memset(ins->prefixes, 0, sizeof ins->prefixes);
H. Peter Anvin0ee01422007-04-16 01:18:30 +0000421
H. Peter Anvin0db11e22007-04-17 20:23:11 +0000422 if (t->flags & (segsize == 64 ? IF_NOLONG : IF_LONG))
H. Peter Anvin6867acc2007-10-10 14:58:45 -0700423 return false;
H. Peter Anvinef7468f2002-04-30 20:57:59 +0000424
H. Peter Anvin62cb6062007-09-11 22:44:03 +0000425 if (prefix->rep == 0xF2)
H. Peter Anvine2c80182005-01-15 22:15:51 +0000426 drep = P_REPNE;
H. Peter Anvin62cb6062007-09-11 22:44:03 +0000427 else if (prefix->rep == 0xF3)
H. Peter Anvine2c80182005-01-15 22:15:51 +0000428 drep = P_REP;
H. Peter Anvinea6e34d2002-04-30 20:51:32 +0000429
H. Peter Anvinc2acf7b2009-02-21 18:22:56 -0800430 dwait = prefix->wait ? P_WAIT : 0;
431
H. Peter Anvine8cdcdc2007-11-12 21:57:00 -0800432 while ((c = *r++) != 0) {
H. Peter Anvin941fcbb2008-10-15 11:51:24 -0700433 op1 = (c & 3) + ((opex & 1) << 2);
434 op2 = ((c >> 3) & 3) + ((opex & 2) << 1);
435 opx = &ins->oprs[op1];
H. Peter Anvin92d36122008-10-25 00:42:51 -0700436 opy = &ins->oprs[op2];
H. Peter Anvin941fcbb2008-10-15 11:51:24 -0700437 opex = 0;
H. Peter Anvina5fb9082007-11-12 23:00:31 -0800438
H. Peter Anvine8cdcdc2007-11-12 21:57:00 -0800439 switch (c) {
440 case 01:
441 case 02:
442 case 03:
H. Peter Anvindcffe4b2008-10-10 22:10:31 -0700443 case 04:
H. Peter Anvine2c80182005-01-15 22:15:51 +0000444 while (c--)
445 if (*r++ != *data++)
H. Peter Anvin6867acc2007-10-10 14:58:45 -0700446 return false;
H. Peter Anvine8cdcdc2007-11-12 21:57:00 -0800447 break;
448
H. Peter Anvin941fcbb2008-10-15 11:51:24 -0700449 case 05:
450 case 06:
451 case 07:
452 opex = c;
453 break;
454
H. Peter Anvine8cdcdc2007-11-12 21:57:00 -0800455 case4(010):
456 {
H. Peter Anvine2c80182005-01-15 22:15:51 +0000457 int t = *r++, d = *data++;
458 if (d < t || d > t + 7)
H. Peter Anvin6867acc2007-10-10 14:58:45 -0700459 return false;
H. Peter Anvine2c80182005-01-15 22:15:51 +0000460 else {
H. Peter Anvina5fb9082007-11-12 23:00:31 -0800461 opx->basereg = (d-t)+
H. Peter Anvin62cb6062007-09-11 22:44:03 +0000462 (ins->rex & REX_B ? 8 : 0);
H. Peter Anvina5fb9082007-11-12 23:00:31 -0800463 opx->segment |= SEG_RMREG;
H. Peter Anvine2c80182005-01-15 22:15:51 +0000464 }
H. Peter Anvine8cdcdc2007-11-12 21:57:00 -0800465 break;
466 }
467
468 case4(014):
H. Peter Anvinc1377e92008-10-06 23:40:31 -0700469 case4(0274):
H. Peter Anvina5fb9082007-11-12 23:00:31 -0800470 opx->offset = (int8_t)*data++;
471 opx->segment |= SEG_SIGNED;
H. Peter Anvine8cdcdc2007-11-12 21:57:00 -0800472 break;
473
474 case4(020):
H. Peter Anvina5fb9082007-11-12 23:00:31 -0800475 opx->offset = *data++;
H. Peter Anvine8cdcdc2007-11-12 21:57:00 -0800476 break;
477
478 case4(024):
H. Peter Anvina5fb9082007-11-12 23:00:31 -0800479 opx->offset = *data++;
H. Peter Anvine8cdcdc2007-11-12 21:57:00 -0800480 break;
481
482 case4(030):
H. Peter Anvina5fb9082007-11-12 23:00:31 -0800483 opx->offset = getu16(data);
H. Peter Anvin0ee01422007-04-16 01:18:30 +0000484 data += 2;
H. Peter Anvine8cdcdc2007-11-12 21:57:00 -0800485 break;
486
487 case4(034):
H. Peter Anvin0ee01422007-04-16 01:18:30 +0000488 if (osize == 32) {
H. Peter Anvina5fb9082007-11-12 23:00:31 -0800489 opx->offset = getu32(data);
H. Peter Anvin0ee01422007-04-16 01:18:30 +0000490 data += 4;
491 } else {
H. Peter Anvina5fb9082007-11-12 23:00:31 -0800492 opx->offset = getu16(data);
H. Peter Anvin0ee01422007-04-16 01:18:30 +0000493 data += 2;
494 }
H. Peter Anvine2c80182005-01-15 22:15:51 +0000495 if (segsize != asize)
H. Peter Anvina5fb9082007-11-12 23:00:31 -0800496 opx->disp_size = asize;
H. Peter Anvine8cdcdc2007-11-12 21:57:00 -0800497 break;
498
499 case4(040):
H. Peter Anvin588df782008-10-07 10:05:10 -0700500 case4(0254):
H. Peter Anvina5fb9082007-11-12 23:00:31 -0800501 opx->offset = getu32(data);
H. Peter Anvin0ee01422007-04-16 01:18:30 +0000502 data += 4;
H. Peter Anvine8cdcdc2007-11-12 21:57:00 -0800503 break;
504
505 case4(044):
H. Peter Anvinb061d592007-04-16 02:02:06 +0000506 switch (asize) {
507 case 16:
H. Peter Anvina5fb9082007-11-12 23:00:31 -0800508 opx->offset = getu16(data);
H. Peter Anvin0ee01422007-04-16 01:18:30 +0000509 data += 2;
H. Peter Anvine8cdcdc2007-11-12 21:57:00 -0800510 if (segsize != 16)
H. Peter Anvina5fb9082007-11-12 23:00:31 -0800511 opx->disp_size = 16;
H. Peter Anvinb061d592007-04-16 02:02:06 +0000512 break;
513 case 32:
H. Peter Anvina5fb9082007-11-12 23:00:31 -0800514 opx->offset = getu32(data);
H. Peter Anvinb061d592007-04-16 02:02:06 +0000515 data += 4;
H. Peter Anvine8cdcdc2007-11-12 21:57:00 -0800516 if (segsize == 16)
H. Peter Anvina5fb9082007-11-12 23:00:31 -0800517 opx->disp_size = 32;
H. Peter Anvinb061d592007-04-16 02:02:06 +0000518 break;
519 case 64:
H. Peter Anvina5fb9082007-11-12 23:00:31 -0800520 opx->offset = getu64(data);
521 opx->disp_size = 64;
H. Peter Anvinb061d592007-04-16 02:02:06 +0000522 data += 8;
523 break;
H. Peter Anvin0ee01422007-04-16 01:18:30 +0000524 }
H. Peter Anvine8cdcdc2007-11-12 21:57:00 -0800525 break;
526
527 case4(050):
H. Peter Anvina5fb9082007-11-12 23:00:31 -0800528 opx->offset = gets8(data++);
529 opx->segment |= SEG_RELATIVE;
H. Peter Anvine8cdcdc2007-11-12 21:57:00 -0800530 break;
531
532 case4(054):
H. Peter Anvina5fb9082007-11-12 23:00:31 -0800533 opx->offset = getu64(data);
H. Peter Anvin0ee01422007-04-16 01:18:30 +0000534 data += 8;
H. Peter Anvine8cdcdc2007-11-12 21:57:00 -0800535 break;
536
537 case4(060):
H. Peter Anvina5fb9082007-11-12 23:00:31 -0800538 opx->offset = gets16(data);
H. Peter Anvin0ee01422007-04-16 01:18:30 +0000539 data += 2;
H. Peter Anvina5fb9082007-11-12 23:00:31 -0800540 opx->segment |= SEG_RELATIVE;
541 opx->segment &= ~SEG_32BIT;
H. Peter Anvine8cdcdc2007-11-12 21:57:00 -0800542 break;
543
544 case4(064):
H. Peter Anvina5fb9082007-11-12 23:00:31 -0800545 opx->segment |= SEG_RELATIVE;
H. Peter Anvin7cf03af2007-04-16 02:39:56 +0000546 if (osize == 16) {
H. Peter Anvin08367e22008-01-02 12:19:41 -0800547 opx->offset = gets16(data);
H. Peter Anvin0ee01422007-04-16 01:18:30 +0000548 data += 2;
H. Peter Anvina5fb9082007-11-12 23:00:31 -0800549 opx->segment &= ~(SEG_32BIT|SEG_64BIT);
H. Peter Anvin7cf03af2007-04-16 02:39:56 +0000550 } else if (osize == 32) {
H. Peter Anvin08367e22008-01-02 12:19:41 -0800551 opx->offset = gets32(data);
H. Peter Anvin7cf03af2007-04-16 02:39:56 +0000552 data += 4;
H. Peter Anvina5fb9082007-11-12 23:00:31 -0800553 opx->segment &= ~SEG_64BIT;
554 opx->segment |= SEG_32BIT;
H. Peter Anvin70653092007-10-19 14:42:29 -0700555 }
H. Peter Anvine2c80182005-01-15 22:15:51 +0000556 if (segsize != osize) {
H. Peter Anvina5fb9082007-11-12 23:00:31 -0800557 opx->type =
558 (opx->type & ~SIZE_MASK)
H. Peter Anvine2c80182005-01-15 22:15:51 +0000559 | ((osize == 16) ? BITS16 : BITS32);
560 }
H. Peter Anvine8cdcdc2007-11-12 21:57:00 -0800561 break;
562
563 case4(070):
H. Peter Anvin08367e22008-01-02 12:19:41 -0800564 opx->offset = gets32(data);
H. Peter Anvin0ee01422007-04-16 01:18:30 +0000565 data += 4;
H. Peter Anvina5fb9082007-11-12 23:00:31 -0800566 opx->segment |= SEG_32BIT | SEG_RELATIVE;
H. Peter Anvine8cdcdc2007-11-12 21:57:00 -0800567 break;
568
569 case4(0100):
570 case4(0110):
571 case4(0120):
572 case4(0130):
573 {
574 int modrm = *data++;
H. Peter Anvina5fb9082007-11-12 23:00:31 -0800575 opx->segment |= SEG_RMREG;
H. Peter Anvin92d36122008-10-25 00:42:51 -0700576 data = do_ea(data, modrm, asize, segsize, opy, ins);
H. Peter Anvin7786c362007-09-17 18:45:44 -0700577 if (!data)
H. Peter Anvin6867acc2007-10-10 14:58:45 -0700578 return false;
H. Peter Anvin941fcbb2008-10-15 11:51:24 -0700579 opx->basereg = ((modrm >> 3) & 7) + (ins->rex & REX_R ? 8 : 0);
H. Peter Anvine8cdcdc2007-11-12 21:57:00 -0800580 break;
581 }
582
583 case4(0140):
H. Peter Anvin941fcbb2008-10-15 11:51:24 -0700584 if (s_field_for == op1) {
H. Peter Anvina30cc072007-11-18 21:55:26 -0800585 opx->offset = gets8(data);
586 data++;
587 } else {
588 opx->offset = getu16(data);
589 data += 2;
590 }
591 break;
592
593 case4(0144):
594 case4(0154):
H. Peter Anvin941fcbb2008-10-15 11:51:24 -0700595 s_field_for = (*data & 0x02) ? op1 : -1;
H. Peter Anvina30cc072007-11-18 21:55:26 -0800596 if ((*data++ & ~0x02) != *r++)
597 return false;
H. Peter Anvine8cdcdc2007-11-12 21:57:00 -0800598 break;
599
600 case4(0150):
H. Peter Anvin941fcbb2008-10-15 11:51:24 -0700601 if (s_field_for == op1) {
H. Peter Anvina30cc072007-11-18 21:55:26 -0800602 opx->offset = gets8(data);
603 data++;
604 } else {
605 opx->offset = getu32(data);
606 data += 4;
607 }
H. Peter Anvine8cdcdc2007-11-12 21:57:00 -0800608 break;
609
610 case4(0160):
611 ins->rex |= REX_D;
H. Peter Anvin941fcbb2008-10-15 11:51:24 -0700612 ins->drexdst = op1;
H. Peter Anvine8cdcdc2007-11-12 21:57:00 -0800613 break;
614
615 case4(0164):
616 ins->rex |= REX_D|REX_OC;
H. Peter Anvin941fcbb2008-10-15 11:51:24 -0700617 ins->drexdst = op1;
H. Peter Anvine8cdcdc2007-11-12 21:57:00 -0800618 break;
619
H. Peter Anvine8cdcdc2007-11-12 21:57:00 -0800620 case 0171:
H. Peter Anvin7786c362007-09-17 18:45:44 -0700621 data = do_drex(data, ins);
622 if (!data)
H. Peter Anvin6867acc2007-10-10 14:58:45 -0700623 return false;
H. Peter Anvine8cdcdc2007-11-12 21:57:00 -0800624 break;
625
H. Peter Anvind85d2502008-05-04 17:53:31 -0700626 case 0172:
627 {
628 uint8_t ximm = *data++;
629 c = *r++;
H. Peter Anvin94352832008-05-26 12:03:55 -0700630 ins->oprs[c >> 3].basereg = (ximm >> 4) & regmask;
H. Peter Anvind85d2502008-05-04 17:53:31 -0700631 ins->oprs[c >> 3].segment |= SEG_RMREG;
632 ins->oprs[c & 7].offset = ximm & 15;
633 }
634 break;
635
H. Peter Anvind58656f2008-05-06 20:11:14 -0700636 case 0173:
637 {
638 uint8_t ximm = *data++;
639 c = *r++;
640
641 if ((c ^ ximm) & 15)
642 return false;
643
H. Peter Anvin94352832008-05-26 12:03:55 -0700644 ins->oprs[c >> 4].basereg = (ximm >> 4) & regmask;
H. Peter Anvind58656f2008-05-06 20:11:14 -0700645 ins->oprs[c >> 4].segment |= SEG_RMREG;
646 }
647 break;
648
H. Peter Anvin52dc3532008-05-20 19:29:04 -0700649 case 0174:
650 {
651 uint8_t ximm = *data++;
652 c = *r++;
653
H. Peter Anvin94352832008-05-26 12:03:55 -0700654 ins->oprs[c].basereg = (ximm >> 4) & regmask;
H. Peter Anvin52dc3532008-05-20 19:29:04 -0700655 ins->oprs[c].segment |= SEG_RMREG;
656 }
657 break;
658
H. Peter Anvine8cdcdc2007-11-12 21:57:00 -0800659 case4(0200):
660 case4(0204):
661 case4(0210):
662 case4(0214):
663 case4(0220):
664 case4(0224):
665 case4(0230):
666 case4(0234):
667 {
H. Peter Anvine2c80182005-01-15 22:15:51 +0000668 int modrm = *data++;
669 if (((modrm >> 3) & 07) != (c & 07))
H. Peter Anvin6867acc2007-10-10 14:58:45 -0700670 return false; /* spare field doesn't match up */
H. Peter Anvin92d36122008-10-25 00:42:51 -0700671 data = do_ea(data, modrm, asize, segsize, opy, ins);
H. Peter Anvin7786c362007-09-17 18:45:44 -0700672 if (!data)
H. Peter Anvin6867acc2007-10-10 14:58:45 -0700673 return false;
H. Peter Anvine8cdcdc2007-11-12 21:57:00 -0800674 break;
675 }
676
H. Peter Anvin7023d632010-08-16 22:13:14 -0700677 case4(0250):
678 if (s_field_for == op1) {
679 opx->offset = gets8(data);
680 data++;
681 } else {
682 opx->offset = gets32(data);
683 data += 4;
684 }
685 break;
686
H. Peter Anvin7334e3a2008-05-05 18:47:27 -0700687 case4(0260):
688 {
689 int vexm = *r++;
690 int vexwlp = *r++;
H. Peter Anvin421059c2010-08-16 14:56:33 -0700691
H. Peter Anvin7334e3a2008-05-05 18:47:27 -0700692 ins->rex |= REX_V;
693 if ((prefix->rex & (REX_V|REX_D|REX_P)) != REX_V)
694 return false;
695
696 if ((vexm & 0x1f) != prefix->vex_m)
697 return false;
698
H. Peter Anvin421059c2010-08-16 14:56:33 -0700699 switch (vexwlp & 060) {
H. Peter Anvin7334e3a2008-05-05 18:47:27 -0700700 case 000:
701 if (prefix->rex & REX_W)
702 return false;
703 break;
H. Peter Anvin421059c2010-08-16 14:56:33 -0700704 case 020:
H. Peter Anvin7334e3a2008-05-05 18:47:27 -0700705 if (!(prefix->rex & REX_W))
706 return false;
H. Peter Anvinbd420c72008-05-22 11:24:35 -0700707 ins->rex &= ~REX_W;
H. Peter Anvin7334e3a2008-05-05 18:47:27 -0700708 break;
H. Peter Anvin421059c2010-08-16 14:56:33 -0700709 case 040: /* VEX.W is a don't care */
H. Peter Anvinbd420c72008-05-22 11:24:35 -0700710 ins->rex &= ~REX_W;
711 break;
H. Peter Anvin421059c2010-08-16 14:56:33 -0700712 case 060:
H. Peter Anvinbd420c72008-05-22 11:24:35 -0700713 break;
H. Peter Anvin7334e3a2008-05-05 18:47:27 -0700714 }
715
H. Peter Anvin421059c2010-08-16 14:56:33 -0700716 /* The 010 bit of vexwlp is set if VEX.L is ignored */
717 if ((vexwlp ^ prefix->vex_lp) & ((vexwlp & 010) ? 03 : 07))
H. Peter Anvin7334e3a2008-05-05 18:47:27 -0700718 return false;
719
720 opx->segment |= SEG_RMREG;
721 opx->basereg = prefix->vex_v;
H. Peter Anvin6b3b7bc2008-05-20 23:36:36 -0700722 vex_ok = true;
H. Peter Anvin7334e3a2008-05-05 18:47:27 -0700723 break;
724 }
725
726 case 0270:
727 {
728 int vexm = *r++;
729 int vexwlp = *r++;
730 ins->rex |= REX_V;
731 if ((prefix->rex & (REX_V|REX_D|REX_P)) != REX_V)
732 return false;
733
734 if ((vexm & 0x1f) != prefix->vex_m)
735 return false;
736
737 switch (vexwlp & 030) {
738 case 000:
739 if (ins->rex & REX_W)
740 return false;
741 break;
742 case 010:
743 if (!(ins->rex & REX_W))
744 return false;
745 break;
746 default:
747 break; /* Need to do anything special here? */
748 }
749
750 if ((vexwlp & 007) != prefix->vex_lp)
751 return false;
752
753 if (prefix->vex_v != 0)
754 return false;
755
H. Peter Anvin6b3b7bc2008-05-20 23:36:36 -0700756 vex_ok = true;
H. Peter Anvin7334e3a2008-05-05 18:47:27 -0700757 break;
758 }
759
H. Peter Anvine8cdcdc2007-11-12 21:57:00 -0800760 case 0310:
H. Peter Anvin0ee01422007-04-16 01:18:30 +0000761 if (asize != 16)
H. Peter Anvin6867acc2007-10-10 14:58:45 -0700762 return false;
H. Peter Anvine2c80182005-01-15 22:15:51 +0000763 else
H. Peter Anvin6867acc2007-10-10 14:58:45 -0700764 a_used = true;
H. Peter Anvine8cdcdc2007-11-12 21:57:00 -0800765 break;
766
767 case 0311:
H. Peter Anvind28f07f2009-06-26 16:18:00 -0700768 if (asize != 32)
H. Peter Anvin6867acc2007-10-10 14:58:45 -0700769 return false;
H. Peter Anvine2c80182005-01-15 22:15:51 +0000770 else
H. Peter Anvin6867acc2007-10-10 14:58:45 -0700771 a_used = true;
H. Peter Anvine8cdcdc2007-11-12 21:57:00 -0800772 break;
773
774 case 0312:
H. Peter Anvine2c80182005-01-15 22:15:51 +0000775 if (asize != segsize)
H. Peter Anvin6867acc2007-10-10 14:58:45 -0700776 return false;
H. Peter Anvine2c80182005-01-15 22:15:51 +0000777 else
H. Peter Anvin6867acc2007-10-10 14:58:45 -0700778 a_used = true;
H. Peter Anvine8cdcdc2007-11-12 21:57:00 -0800779 break;
780
781 case 0313:
H. Peter Anvince2b3972007-05-30 22:21:11 +0000782 if (asize != 64)
H. Peter Anvin6867acc2007-10-10 14:58:45 -0700783 return false;
H. Peter Anvince2b3972007-05-30 22:21:11 +0000784 else
H. Peter Anvin6867acc2007-10-10 14:58:45 -0700785 a_used = true;
H. Peter Anvine8cdcdc2007-11-12 21:57:00 -0800786 break;
787
788 case 0314:
H. Peter Anvin23440102007-11-12 21:02:33 -0800789 if (prefix->rex & REX_B)
790 return false;
H. Peter Anvine8cdcdc2007-11-12 21:57:00 -0800791 break;
792
793 case 0315:
H. Peter Anvin23440102007-11-12 21:02:33 -0800794 if (prefix->rex & REX_X)
795 return false;
H. Peter Anvine8cdcdc2007-11-12 21:57:00 -0800796 break;
797
798 case 0316:
H. Peter Anvin23440102007-11-12 21:02:33 -0800799 if (prefix->rex & REX_R)
800 return false;
H. Peter Anvine8cdcdc2007-11-12 21:57:00 -0800801 break;
802
803 case 0317:
H. Peter Anvin23440102007-11-12 21:02:33 -0800804 if (prefix->rex & REX_W)
805 return false;
H. Peter Anvine8cdcdc2007-11-12 21:57:00 -0800806 break;
807
808 case 0320:
H. Peter Anvin0ee01422007-04-16 01:18:30 +0000809 if (osize != 16)
H. Peter Anvin6867acc2007-10-10 14:58:45 -0700810 return false;
H. Peter Anvine2c80182005-01-15 22:15:51 +0000811 else
H. Peter Anvin6867acc2007-10-10 14:58:45 -0700812 o_used = true;
H. Peter Anvine8cdcdc2007-11-12 21:57:00 -0800813 break;
814
815 case 0321:
H. Peter Anvinb061d592007-04-16 02:02:06 +0000816 if (osize != 32)
H. Peter Anvin6867acc2007-10-10 14:58:45 -0700817 return false;
H. Peter Anvine2c80182005-01-15 22:15:51 +0000818 else
H. Peter Anvin6867acc2007-10-10 14:58:45 -0700819 o_used = true;
H. Peter Anvine8cdcdc2007-11-12 21:57:00 -0800820 break;
821
822 case 0322:
H. Peter Anvin0ee01422007-04-16 01:18:30 +0000823 if (osize != (segsize == 16) ? 16 : 32)
H. Peter Anvin6867acc2007-10-10 14:58:45 -0700824 return false;
H. Peter Anvine2c80182005-01-15 22:15:51 +0000825 else
H. Peter Anvin6867acc2007-10-10 14:58:45 -0700826 o_used = true;
H. Peter Anvine8cdcdc2007-11-12 21:57:00 -0800827 break;
828
829 case 0323:
H. Peter Anvin62cb6062007-09-11 22:44:03 +0000830 ins->rex |= REX_W; /* 64-bit only instruction */
H. Peter Anvin0ee01422007-04-16 01:18:30 +0000831 osize = 64;
H. Peter Anvinbb72f7f2007-11-12 22:55:27 -0800832 o_used = true;
H. Peter Anvine8cdcdc2007-11-12 21:57:00 -0800833 break;
834
835 case 0324:
H. Peter Anvin7023d632010-08-16 22:13:14 -0700836 if (osize != 64)
H. Peter Anvin6867acc2007-10-10 14:58:45 -0700837 return false;
H. Peter Anvinbb72f7f2007-11-12 22:55:27 -0800838 o_used = true;
H. Peter Anvine8cdcdc2007-11-12 21:57:00 -0800839 break;
840
H. Peter Anvin9472dab2009-06-24 21:38:29 -0700841 case 0325:
842 ins->rex |= REX_NH;
843 break;
844
H. Peter Anvine8cdcdc2007-11-12 21:57:00 -0800845 case 0330:
846 {
H. Peter Anvine2c80182005-01-15 22:15:51 +0000847 int t = *r++, d = *data++;
848 if (d < t || d > t + 15)
H. Peter Anvin6867acc2007-10-10 14:58:45 -0700849 return false;
H. Peter Anvine2c80182005-01-15 22:15:51 +0000850 else
851 ins->condition = d - t;
H. Peter Anvine8cdcdc2007-11-12 21:57:00 -0800852 break;
853 }
854
855 case 0331:
H. Peter Anvin62cb6062007-09-11 22:44:03 +0000856 if (prefix->rep)
H. Peter Anvin6867acc2007-10-10 14:58:45 -0700857 return false;
H. Peter Anvine8cdcdc2007-11-12 21:57:00 -0800858 break;
859
860 case 0332:
H. Peter Anvincb9b6902007-09-12 21:58:51 -0700861 if (prefix->rep != 0xF2)
H. Peter Anvin6867acc2007-10-10 14:58:45 -0700862 return false;
H. Peter Anvina30cc072007-11-18 21:55:26 -0800863 drep = 0;
H. Peter Anvine8cdcdc2007-11-12 21:57:00 -0800864 break;
865
866 case 0333:
H. Peter Anvin62cb6062007-09-11 22:44:03 +0000867 if (prefix->rep != 0xF3)
H. Peter Anvin6867acc2007-10-10 14:58:45 -0700868 return false;
H. Peter Anvine2c80182005-01-15 22:15:51 +0000869 drep = 0;
H. Peter Anvine8cdcdc2007-11-12 21:57:00 -0800870 break;
871
872 case 0334:
H. Peter Anvin0db11e22007-04-17 20:23:11 +0000873 if (lock) {
H. Peter Anvin62cb6062007-09-11 22:44:03 +0000874 ins->rex |= REX_R;
H. Peter Anvin0db11e22007-04-17 20:23:11 +0000875 lock = 0;
876 }
H. Peter Anvine8cdcdc2007-11-12 21:57:00 -0800877 break;
878
879 case 0335:
H. Peter Anvincb9b6902007-09-12 21:58:51 -0700880 if (drep == P_REP)
881 drep = P_REPE;
H. Peter Anvine8cdcdc2007-11-12 21:57:00 -0800882 break;
883
H. Peter Anvin962e3052008-08-28 17:47:16 -0700884 case 0336:
885 case 0337:
886 break;
887
H. Peter Anvine8cdcdc2007-11-12 21:57:00 -0800888 case 0340:
889 return false;
890
H. Peter Anvinc2acf7b2009-02-21 18:22:56 -0800891 case 0341:
892 if (prefix->wait != 0x9B)
893 return false;
894 dwait = 0;
895 break;
896
H. Peter Anvinfa3833d2008-10-09 14:15:36 -0700897 case4(0344):
898 ins->oprs[0].basereg = (*data++ >> 3) & 7;
H. Peter Anvinff6e12d2008-10-08 21:17:32 -0700899 break;
900
H. Peter Anvinfff5a472008-05-20 09:46:24 -0700901 case 0360:
902 if (prefix->osp || prefix->rep)
903 return false;
904 break;
905
906 case 0361:
907 if (!prefix->osp || prefix->rep)
908 return false;
H. Peter Anvin39d6ac62008-05-21 10:33:19 -0700909 o_used = true;
H. Peter Anvinfff5a472008-05-20 09:46:24 -0700910 break;
911
912 case 0362:
913 if (prefix->osp || prefix->rep != 0xf2)
914 return false;
H. Peter Anvin39d6ac62008-05-21 10:33:19 -0700915 drep = 0;
H. Peter Anvinfff5a472008-05-20 09:46:24 -0700916 break;
917
918 case 0363:
919 if (prefix->osp || prefix->rep != 0xf3)
920 return false;
H. Peter Anvin39d6ac62008-05-21 10:33:19 -0700921 drep = 0;
H. Peter Anvinfff5a472008-05-20 09:46:24 -0700922 break;
923
H. Peter Anvine8cdcdc2007-11-12 21:57:00 -0800924 case 0364:
H. Peter Anvin62cb6062007-09-11 22:44:03 +0000925 if (prefix->osp)
H. Peter Anvin6867acc2007-10-10 14:58:45 -0700926 return false;
H. Peter Anvine8cdcdc2007-11-12 21:57:00 -0800927 break;
928
929 case 0365:
H. Peter Anvin62cb6062007-09-11 22:44:03 +0000930 if (prefix->asp)
H. Peter Anvin6867acc2007-10-10 14:58:45 -0700931 return false;
H. Peter Anvine8cdcdc2007-11-12 21:57:00 -0800932 break;
933
934 case 0366:
H. Peter Anvin62cb6062007-09-11 22:44:03 +0000935 if (!prefix->osp)
H. Peter Anvin6867acc2007-10-10 14:58:45 -0700936 return false;
937 o_used = true;
H. Peter Anvine8cdcdc2007-11-12 21:57:00 -0800938 break;
939
940 case 0367:
H. Peter Anvin62cb6062007-09-11 22:44:03 +0000941 if (!prefix->asp)
H. Peter Anvin6867acc2007-10-10 14:58:45 -0700942 return false;
H. Peter Anvinbb72f7f2007-11-12 22:55:27 -0800943 a_used = true;
H. Peter Anvine8cdcdc2007-11-12 21:57:00 -0800944 break;
945
946 default:
947 return false; /* Unknown code */
H. Peter Anvin0db11e22007-04-17 20:23:11 +0000948 }
H. Peter Anvinea6e34d2002-04-30 20:51:32 +0000949 }
950
H. Peter Anvin6b3b7bc2008-05-20 23:36:36 -0700951 if (!vex_ok && (ins->rex & REX_V))
952 return false;
953
H. Peter Anvin7334e3a2008-05-05 18:47:27 -0700954 /* REX cannot be combined with DREX or VEX */
955 if ((ins->rex & (REX_D|REX_V)) && (prefix->rex & REX_P))
H. Peter Anvin6867acc2007-10-10 14:58:45 -0700956 return false;
H. Peter Anvin7786c362007-09-17 18:45:44 -0700957
H. Peter Anvinea6e34d2002-04-30 20:51:32 +0000958 /*
H. Peter Anvinef7468f2002-04-30 20:57:59 +0000959 * Check for unused rep or a/o prefixes.
H. Peter Anvinea6e34d2002-04-30 20:51:32 +0000960 */
H. Peter Anvinc5b9ce02007-09-22 21:49:51 -0700961 for (i = 0; i < t->operands; i++) {
962 if (ins->oprs[i].segment != SEG_RMREG)
H. Peter Anvin6867acc2007-10-10 14:58:45 -0700963 a_used = true;
H. Peter Anvinc5b9ce02007-09-22 21:49:51 -0700964 }
965
H. Peter Anvinde4b89b2007-10-01 15:41:25 -0700966 if (lock) {
967 if (ins->prefixes[PPS_LREP])
968 return false;
969 ins->prefixes[PPS_LREP] = P_LOCK;
970 }
971 if (drep) {
972 if (ins->prefixes[PPS_LREP])
973 return false;
974 ins->prefixes[PPS_LREP] = drep;
975 }
H. Peter Anvinc2acf7b2009-02-21 18:22:56 -0800976 ins->prefixes[PPS_WAIT] = dwait;
H. Peter Anvinbb72f7f2007-11-12 22:55:27 -0800977 if (!o_used) {
978 if (osize != ((segsize == 16) ? 16 : 32)) {
979 enum prefixes pfx = 0;
980
981 switch (osize) {
982 case 16:
983 pfx = P_O16;
984 break;
985 case 32:
986 pfx = P_O32;
987 break;
988 case 64:
989 pfx = P_O64;
990 break;
991 }
992
993 if (ins->prefixes[PPS_OSIZE])
994 return false;
995 ins->prefixes[PPS_OSIZE] = pfx;
996 }
H. Peter Anvinde4b89b2007-10-01 15:41:25 -0700997 }
998 if (!a_used && asize != segsize) {
999 if (ins->prefixes[PPS_ASIZE])
1000 return false;
1001 ins->prefixes[PPS_ASIZE] = asize == 16 ? P_A16 : P_A32;
1002 }
H. Peter Anvinea6e34d2002-04-30 20:51:32 +00001003
H. Peter Anvin0ee01422007-04-16 01:18:30 +00001004 /* Fix: check for redundant REX prefixes */
1005
H. Peter Anvinea6e34d2002-04-30 20:51:32 +00001006 return data - origdata;
1007}
1008
H. Peter Anvina4835d42008-05-20 14:21:29 -07001009/* Condition names for disassembly, sorted by x86 code */
1010static const char * const condition_name[16] = {
1011 "o", "no", "c", "nc", "z", "nz", "na", "a",
1012 "s", "ns", "pe", "po", "l", "nl", "ng", "g"
1013};
1014
Keith Kaniosa6dfa782007-04-13 16:47:53 +00001015int32_t disasm(uint8_t *data, char *output, int outbufsize, int segsize,
Keith Kaniosb7a89542007-04-12 02:40:54 +00001016 int32_t offset, int autosync, uint32_t prefer)
H. Peter Anvineba20a72002-04-30 20:53:55 +00001017{
H. Peter Anvin3360d792007-09-11 04:16:57 +00001018 const struct itemplate * const *p, * const *best_p;
H. Peter Anvin19e20102007-09-18 15:08:20 -07001019 const struct disasm_index *ix;
1020 uint8_t *dp;
H. Peter Anvin4836e332002-04-30 20:56:43 +00001021 int length, best_length = 0;
Keith Kaniosa6dfa782007-04-13 16:47:53 +00001022 char *segover;
H. Peter Anvin19e20102007-09-18 15:08:20 -07001023 int i, slen, colon, n;
Keith Kaniosb7a89542007-04-12 02:40:54 +00001024 uint8_t *origdata;
H. Peter Anvinea6e34d2002-04-30 20:51:32 +00001025 int works;
H. Peter Anvinef7468f2002-04-30 20:57:59 +00001026 insn tmp_ins, ins;
Keith Kaniosb7a89542007-04-12 02:40:54 +00001027 uint32_t goodness, best;
H. Peter Anvin62cb6062007-09-11 22:44:03 +00001028 int best_pref;
1029 struct prefix_info prefix;
H. Peter Anvine8cdcdc2007-11-12 21:57:00 -08001030 bool end_prefix;
H. Peter Anvinea6e34d2002-04-30 20:51:32 +00001031
H. Peter Anvinbfb888c2007-09-11 04:26:44 +00001032 memset(&ins, 0, sizeof ins);
1033
H. Peter Anvinea6e34d2002-04-30 20:51:32 +00001034 /*
1035 * Scan for prefixes.
1036 */
H. Peter Anvin62cb6062007-09-11 22:44:03 +00001037 memset(&prefix, 0, sizeof prefix);
1038 prefix.asize = segsize;
1039 prefix.osize = (segsize == 64) ? 32 : segsize;
H. Peter Anvinea6e34d2002-04-30 20:51:32 +00001040 segover = NULL;
H. Peter Anvinea6e34d2002-04-30 20:51:32 +00001041 origdata = data;
H. Peter Anvine8cdcdc2007-11-12 21:57:00 -08001042
H. Peter Anvin2fb033a2008-05-21 11:05:39 -07001043 ix = itable;
1044
H. Peter Anvin7334e3a2008-05-05 18:47:27 -07001045 end_prefix = false;
1046 while (!end_prefix) {
H. Peter Anvine8cdcdc2007-11-12 21:57:00 -08001047 switch (*data) {
1048 case 0xF2:
1049 case 0xF3:
H. Peter Anvin62cb6062007-09-11 22:44:03 +00001050 prefix.rep = *data++;
H. Peter Anvine8cdcdc2007-11-12 21:57:00 -08001051 break;
H. Peter Anvin2fb033a2008-05-21 11:05:39 -07001052
H. Peter Anvinc2acf7b2009-02-21 18:22:56 -08001053 case 0x9B:
1054 prefix.wait = *data++;
1055 break;
1056
H. Peter Anvine8cdcdc2007-11-12 21:57:00 -08001057 case 0xF0:
H. Peter Anvin62cb6062007-09-11 22:44:03 +00001058 prefix.lock = *data++;
H. Peter Anvine8cdcdc2007-11-12 21:57:00 -08001059 break;
H. Peter Anvin2fb033a2008-05-21 11:05:39 -07001060
H. Peter Anvine8cdcdc2007-11-12 21:57:00 -08001061 case 0x2E:
H. Peter Anvin62cb6062007-09-11 22:44:03 +00001062 segover = "cs", prefix.seg = *data++;
H. Peter Anvine8cdcdc2007-11-12 21:57:00 -08001063 break;
1064 case 0x36:
H. Peter Anvin62cb6062007-09-11 22:44:03 +00001065 segover = "ss", prefix.seg = *data++;
H. Peter Anvine8cdcdc2007-11-12 21:57:00 -08001066 break;
1067 case 0x3E:
H. Peter Anvin62cb6062007-09-11 22:44:03 +00001068 segover = "ds", prefix.seg = *data++;
H. Peter Anvine8cdcdc2007-11-12 21:57:00 -08001069 break;
1070 case 0x26:
H. Peter Anvin62cb6062007-09-11 22:44:03 +00001071 segover = "es", prefix.seg = *data++;
H. Peter Anvine8cdcdc2007-11-12 21:57:00 -08001072 break;
1073 case 0x64:
H. Peter Anvin62cb6062007-09-11 22:44:03 +00001074 segover = "fs", prefix.seg = *data++;
H. Peter Anvine8cdcdc2007-11-12 21:57:00 -08001075 break;
1076 case 0x65:
H. Peter Anvin62cb6062007-09-11 22:44:03 +00001077 segover = "gs", prefix.seg = *data++;
H. Peter Anvine8cdcdc2007-11-12 21:57:00 -08001078 break;
H. Peter Anvin2fb033a2008-05-21 11:05:39 -07001079
H. Peter Anvine8cdcdc2007-11-12 21:57:00 -08001080 case 0x66:
H. Peter Anvin62cb6062007-09-11 22:44:03 +00001081 prefix.osize = (segsize == 16) ? 32 : 16;
1082 prefix.osp = *data++;
H. Peter Anvine8cdcdc2007-11-12 21:57:00 -08001083 break;
1084 case 0x67:
H. Peter Anvin62cb6062007-09-11 22:44:03 +00001085 prefix.asize = (segsize == 32) ? 16 : 32;
1086 prefix.asp = *data++;
H. Peter Anvine8cdcdc2007-11-12 21:57:00 -08001087 break;
H. Peter Anvin2fb033a2008-05-21 11:05:39 -07001088
H. Peter Anvin7334e3a2008-05-05 18:47:27 -07001089 case 0xC4:
1090 case 0xC5:
1091 if (segsize == 64 || (data[1] & 0xc0) == 0xc0) {
1092 prefix.vex[0] = *data++;
1093 prefix.vex[1] = *data++;
H. Peter Anvin2fb033a2008-05-21 11:05:39 -07001094
H. Peter Anvinf7d863b2008-07-30 17:30:12 -07001095 prefix.rex = REX_V;
H. Peter Anvin40b81a42009-05-08 18:01:21 -07001096 prefix.vex_c = RV_VEX;
H. Peter Anvinf7d863b2008-07-30 17:30:12 -07001097
1098 if (prefix.vex[0] == 0xc4) {
1099 prefix.vex[2] = *data++;
1100 prefix.rex |= (~prefix.vex[1] >> 5) & 7; /* REX_RXB */
1101 prefix.rex |= (prefix.vex[2] >> (7-3)) & REX_W;
1102 prefix.vex_m = prefix.vex[1] & 0x1f;
1103 prefix.vex_v = (~prefix.vex[2] >> 3) & 15;
1104 prefix.vex_lp = prefix.vex[2] & 7;
1105 } else {
1106 prefix.rex |= (~prefix.vex[1] >> (7-2)) & REX_R;
1107 prefix.vex_m = 1;
1108 prefix.vex_v = (~prefix.vex[1] >> 3) & 15;
1109 prefix.vex_lp = prefix.vex[1] & 7;
1110 }
1111
H. Peter Anvin40b81a42009-05-08 18:01:21 -07001112 ix = itable_vex[RV_VEX][prefix.vex_m][prefix.vex_lp];
H. Peter Anvina04019c2009-05-03 21:42:34 -07001113 }
1114 end_prefix = true;
1115 break;
1116
1117 case 0x8F:
1118 if ((data[1] & 030) != 0 &&
1119 (segsize == 64 || (data[1] & 0xc0) == 0xc0)) {
1120 prefix.vex[0] = *data++;
1121 prefix.vex[1] = *data++;
1122 prefix.vex[2] = *data++;
1123
1124 prefix.rex = REX_V;
H. Peter Anvin40b81a42009-05-08 18:01:21 -07001125 prefix.vex_c = RV_XOP;
H. Peter Anvina04019c2009-05-03 21:42:34 -07001126
1127 prefix.rex |= (~prefix.vex[1] >> 5) & 7; /* REX_RXB */
1128 prefix.rex |= (prefix.vex[2] >> (7-3)) & REX_W;
1129 prefix.vex_m = prefix.vex[1] & 0x1f;
1130 prefix.vex_v = (~prefix.vex[2] >> 3) & 15;
1131 prefix.vex_lp = prefix.vex[2] & 7;
1132
H. Peter Anvin40b81a42009-05-08 18:01:21 -07001133 ix = itable_vex[RV_XOP][prefix.vex_m][prefix.vex_lp];
H. Peter Anvinf7d863b2008-07-30 17:30:12 -07001134 }
H. Peter Anvin7334e3a2008-05-05 18:47:27 -07001135 end_prefix = true;
1136 break;
H. Peter Anvin2fb033a2008-05-21 11:05:39 -07001137
H. Peter Anvin7334e3a2008-05-05 18:47:27 -07001138 case REX_P + 0x0:
1139 case REX_P + 0x1:
1140 case REX_P + 0x2:
1141 case REX_P + 0x3:
1142 case REX_P + 0x4:
1143 case REX_P + 0x5:
1144 case REX_P + 0x6:
1145 case REX_P + 0x7:
1146 case REX_P + 0x8:
1147 case REX_P + 0x9:
1148 case REX_P + 0xA:
1149 case REX_P + 0xB:
1150 case REX_P + 0xC:
1151 case REX_P + 0xD:
1152 case REX_P + 0xE:
1153 case REX_P + 0xF:
1154 if (segsize == 64) {
H. Peter Anvine8cdcdc2007-11-12 21:57:00 -08001155 prefix.rex = *data++;
1156 if (prefix.rex & REX_W)
1157 prefix.osize = 64;
H. Peter Anvine8cdcdc2007-11-12 21:57:00 -08001158 }
H. Peter Anvin7334e3a2008-05-05 18:47:27 -07001159 end_prefix = true;
1160 break;
H. Peter Anvin2fb033a2008-05-21 11:05:39 -07001161
H. Peter Anvin7334e3a2008-05-05 18:47:27 -07001162 default:
1163 end_prefix = true;
1164 break;
H. Peter Anvin0ee01422007-04-16 01:18:30 +00001165 }
H. Peter Anvinea6e34d2002-04-30 20:51:32 +00001166 }
1167
H. Peter Anvin0ee01422007-04-16 01:18:30 +00001168 best = -1; /* Worst possible */
H. Peter Anvin4836e332002-04-30 20:56:43 +00001169 best_p = NULL;
H. Peter Anvin2ba7ed72007-09-11 22:13:17 +00001170 best_pref = INT_MAX;
1171
H. Peter Anvin2fb033a2008-05-21 11:05:39 -07001172 if (!ix)
1173 return 0; /* No instruction table at all... */
1174
H. Peter Anvin19e20102007-09-18 15:08:20 -07001175 dp = data;
H. Peter Anvin2fb033a2008-05-21 11:05:39 -07001176 ix += *dp++;
Charles Crayne46b31b02007-10-18 21:17:20 -07001177 while (ix->n == -1) {
H. Peter Anvin19e20102007-09-18 15:08:20 -07001178 ix = (const struct disasm_index *)ix->p + *dp++;
1179 }
1180
1181 p = (const struct itemplate * const *)ix->p;
1182 for (n = ix->n; n; n--, p++) {
H. Peter Anvin62cb6062007-09-11 22:44:03 +00001183 if ((length = matches(*p, data, &prefix, segsize, &tmp_ins))) {
H. Peter Anvin6867acc2007-10-10 14:58:45 -07001184 works = true;
H. Peter Anvine2c80182005-01-15 22:15:51 +00001185 /*
1186 * Final check to make sure the types of r/m match up.
H. Peter Anvindbf130e2007-05-30 00:18:26 +00001187 * XXX: Need to make sure this is actually correct.
H. Peter Anvine2c80182005-01-15 22:15:51 +00001188 */
1189 for (i = 0; i < (*p)->operands; i++) {
H. Peter Anvin7786c362007-09-17 18:45:44 -07001190 if (!((*p)->opd[i] & SAME_AS) &&
1191 (
H. Peter Anvine8cdcdc2007-11-12 21:57:00 -08001192 /* If it's a mem-only EA but we have a
1193 register, die. */
H. Peter Anvin7786c362007-09-17 18:45:44 -07001194 ((tmp_ins.oprs[i].segment & SEG_RMREG) &&
Cyrill Gorcunove4f526b2009-10-18 12:41:14 +04001195 is_class(MEMORY, (*p)->opd[i])) ||
H. Peter Anvine8cdcdc2007-11-12 21:57:00 -08001196 /* If it's a reg-only EA but we have a memory
1197 ref, die. */
H. Peter Anvin7786c362007-09-17 18:45:44 -07001198 (!(tmp_ins.oprs[i].segment & SEG_RMREG) &&
1199 !(REG_EA & ~(*p)->opd[i]) &&
1200 !((*p)->opd[i] & REG_SMASK)) ||
H. Peter Anvine8cdcdc2007-11-12 21:57:00 -08001201 /* Register type mismatch (eg FS vs REG_DESS):
1202 die. */
H. Peter Anvin7786c362007-09-17 18:45:44 -07001203 ((((*p)->opd[i] & (REGISTER | FPUREG)) ||
1204 (tmp_ins.oprs[i].segment & SEG_RMREG)) &&
1205 !whichreg((*p)->opd[i],
1206 tmp_ins.oprs[i].basereg, tmp_ins.rex))
1207 )) {
H. Peter Anvin6867acc2007-10-10 14:58:45 -07001208 works = false;
H. Peter Anvine2c80182005-01-15 22:15:51 +00001209 break;
1210 }
1211 }
1212
H. Peter Anvin2ba7ed72007-09-11 22:13:17 +00001213 /*
1214 * Note: we always prefer instructions which incorporate
1215 * prefixes in the instructions themselves. This is to allow
1216 * e.g. PAUSE to be preferred to REP NOP, and deal with
1217 * MMX/SSE instructions where prefixes are used to select
1218 * between MMX and SSE register sets or outright opcode
1219 * selection.
1220 */
H. Peter Anvine2c80182005-01-15 22:15:51 +00001221 if (works) {
H. Peter Anvinde4b89b2007-10-01 15:41:25 -07001222 int i, nprefix;
H. Peter Anvine2c80182005-01-15 22:15:51 +00001223 goodness = ((*p)->flags & IF_PFMASK) ^ prefer;
H. Peter Anvinde4b89b2007-10-01 15:41:25 -07001224 nprefix = 0;
1225 for (i = 0; i < MAXPREFIX; i++)
1226 if (tmp_ins.prefixes[i])
1227 nprefix++;
1228 if (nprefix < best_pref ||
1229 (nprefix == best_pref && goodness < best)) {
H. Peter Anvine2c80182005-01-15 22:15:51 +00001230 /* This is the best one found so far */
1231 best = goodness;
1232 best_p = p;
H. Peter Anvinde4b89b2007-10-01 15:41:25 -07001233 best_pref = nprefix;
H. Peter Anvine2c80182005-01-15 22:15:51 +00001234 best_length = length;
1235 ins = tmp_ins;
1236 }
1237 }
1238 }
H. Peter Anvin4836e332002-04-30 20:56:43 +00001239 }
H. Peter Anvineba20a72002-04-30 20:53:55 +00001240
H. Peter Anvinef7468f2002-04-30 20:57:59 +00001241 if (!best_p)
H. Peter Anvine2c80182005-01-15 22:15:51 +00001242 return 0; /* no instruction was matched */
H. Peter Anvinea6e34d2002-04-30 20:51:32 +00001243
H. Peter Anvin4836e332002-04-30 20:56:43 +00001244 /* Pick the best match */
H. Peter Anvine2c80182005-01-15 22:15:51 +00001245 p = best_p;
H. Peter Anvin4836e332002-04-30 20:56:43 +00001246 length = best_length;
1247
H. Peter Anvinea6e34d2002-04-30 20:51:32 +00001248 slen = 0;
1249
Ed Beroset64ab5192004-12-15 23:32:57 +00001250 /* TODO: snprintf returns the value that the string would have if
H. Peter Anvin70653092007-10-19 14:42:29 -07001251 * the buffer were long enough, and not the actual length of
H. Peter Anvine2c80182005-01-15 22:15:51 +00001252 * the returned string, so each instance of using the return
1253 * value of snprintf should actually be checked to assure that
1254 * the return value is "sane." Maybe a macro wrapper could
1255 * be used for that purpose.
1256 */
H. Peter Anvinc2acf7b2009-02-21 18:22:56 -08001257 for (i = 0; i < MAXPREFIX; i++) {
1258 const char *prefix = prefix_name(ins.prefixes[i]);
1259 if (prefix)
1260 slen += snprintf(output+slen, outbufsize-slen, "%s ", prefix);
1261 }
H. Peter Anvinea6e34d2002-04-30 20:51:32 +00001262
H. Peter Anvin0ab96a12008-05-20 17:07:57 -07001263 i = (*p)->opcode;
H. Peter Anvina69ce1d2008-05-21 15:09:31 -07001264 if (i >= FIRST_COND_OPCODE)
H. Peter Anvin0ab96a12008-05-20 17:07:57 -07001265 slen += snprintf(output + slen, outbufsize - slen, "%s%s",
H. Peter Anvina69ce1d2008-05-21 15:09:31 -07001266 nasm_insn_names[i], condition_name[ins.condition]);
1267 else
H. Peter Anvin0ab96a12008-05-20 17:07:57 -07001268 slen += snprintf(output + slen, outbufsize - slen, "%s",
1269 nasm_insn_names[i]);
H. Peter Anvina69ce1d2008-05-21 15:09:31 -07001270
H. Peter Anvin6867acc2007-10-10 14:58:45 -07001271 colon = false;
H. Peter Anvine2c80182005-01-15 22:15:51 +00001272 length += data - origdata; /* fix up for prefixes */
1273 for (i = 0; i < (*p)->operands; i++) {
H. Peter Anvin7786c362007-09-17 18:45:44 -07001274 opflags_t t = (*p)->opd[i];
1275 const operand *o = &ins.oprs[i];
1276 int64_t offs;
1277
1278 if (t & SAME_AS) {
1279 o = &ins.oprs[t & ~SAME_AS];
1280 t = (*p)->opd[t & ~SAME_AS];
1281 }
1282
H. Peter Anvine2c80182005-01-15 22:15:51 +00001283 output[slen++] = (colon ? ':' : i == 0 ? ' ' : ',');
H. Peter Anvinea6e34d2002-04-30 20:51:32 +00001284
H. Peter Anvin7786c362007-09-17 18:45:44 -07001285 offs = o->offset;
1286 if (o->segment & SEG_RELATIVE) {
1287 offs += offset + length;
H. Peter Anvine2c80182005-01-15 22:15:51 +00001288 /*
1289 * sort out wraparound
1290 */
H. Peter Anvin7786c362007-09-17 18:45:44 -07001291 if (!(o->segment & (SEG_32BIT|SEG_64BIT)))
1292 offs &= 0xffff;
H. Peter Anvin08367e22008-01-02 12:19:41 -08001293 else if (segsize != 64)
1294 offs &= 0xffffffff;
1295
H. Peter Anvine2c80182005-01-15 22:15:51 +00001296 /*
1297 * add sync marker, if autosync is on
1298 */
1299 if (autosync)
H. Peter Anvin7786c362007-09-17 18:45:44 -07001300 add_sync(offs, 0L);
H. Peter Anvine2c80182005-01-15 22:15:51 +00001301 }
H. Peter Anvinea6e34d2002-04-30 20:51:32 +00001302
H. Peter Anvin7786c362007-09-17 18:45:44 -07001303 if (t & COLON)
H. Peter Anvin6867acc2007-10-10 14:58:45 -07001304 colon = true;
H. Peter Anvine2c80182005-01-15 22:15:51 +00001305 else
H. Peter Anvin6867acc2007-10-10 14:58:45 -07001306 colon = false;
H. Peter Anvinea6e34d2002-04-30 20:51:32 +00001307
H. Peter Anvin7786c362007-09-17 18:45:44 -07001308 if ((t & (REGISTER | FPUREG)) ||
1309 (o->segment & SEG_RMREG)) {
1310 enum reg_enum reg;
1311 reg = whichreg(t, o->basereg, ins.rex);
1312 if (t & TO)
H. Peter Anvine2c80182005-01-15 22:15:51 +00001313 slen += snprintf(output + slen, outbufsize - slen, "to ");
1314 slen += snprintf(output + slen, outbufsize - slen, "%s",
H. Peter Anvina4835d42008-05-20 14:21:29 -07001315 nasm_reg_names[reg-EXPR_REG_START]);
H. Peter Anvin7786c362007-09-17 18:45:44 -07001316 } else if (!(UNITY & ~t)) {
H. Peter Anvine2c80182005-01-15 22:15:51 +00001317 output[slen++] = '1';
H. Peter Anvin7786c362007-09-17 18:45:44 -07001318 } else if (t & IMMEDIATE) {
1319 if (t & BITS8) {
H. Peter Anvine2c80182005-01-15 22:15:51 +00001320 slen +=
1321 snprintf(output + slen, outbufsize - slen, "byte ");
H. Peter Anvin7786c362007-09-17 18:45:44 -07001322 if (o->segment & SEG_SIGNED) {
1323 if (offs < 0) {
1324 offs *= -1;
H. Peter Anvine2c80182005-01-15 22:15:51 +00001325 output[slen++] = '-';
1326 } else
1327 output[slen++] = '+';
1328 }
H. Peter Anvin7786c362007-09-17 18:45:44 -07001329 } else if (t & BITS16) {
H. Peter Anvine2c80182005-01-15 22:15:51 +00001330 slen +=
1331 snprintf(output + slen, outbufsize - slen, "word ");
H. Peter Anvin7786c362007-09-17 18:45:44 -07001332 } else if (t & BITS32) {
H. Peter Anvine2c80182005-01-15 22:15:51 +00001333 slen +=
1334 snprintf(output + slen, outbufsize - slen, "dword ");
H. Peter Anvin7786c362007-09-17 18:45:44 -07001335 } else if (t & BITS64) {
H. Peter Anvin0ee01422007-04-16 01:18:30 +00001336 slen +=
1337 snprintf(output + slen, outbufsize - slen, "qword ");
H. Peter Anvin7786c362007-09-17 18:45:44 -07001338 } else if (t & NEAR) {
H. Peter Anvine2c80182005-01-15 22:15:51 +00001339 slen +=
1340 snprintf(output + slen, outbufsize - slen, "near ");
H. Peter Anvin7786c362007-09-17 18:45:44 -07001341 } else if (t & SHORT) {
H. Peter Anvine2c80182005-01-15 22:15:51 +00001342 slen +=
1343 snprintf(output + slen, outbufsize - slen, "short ");
1344 }
1345 slen +=
Keith Kanios93f2e9a2007-04-14 00:10:59 +00001346 snprintf(output + slen, outbufsize - slen, "0x%"PRIx64"",
H. Peter Anvin7786c362007-09-17 18:45:44 -07001347 offs);
1348 } else if (!(MEM_OFFS & ~t)) {
H. Peter Anvine2c80182005-01-15 22:15:51 +00001349 slen +=
H. Peter Anvine8cdcdc2007-11-12 21:57:00 -08001350 snprintf(output + slen, outbufsize - slen,
1351 "[%s%s%s0x%"PRIx64"]",
H. Peter Anvin62cb6062007-09-11 22:44:03 +00001352 (segover ? segover : ""),
1353 (segover ? ":" : ""),
H. Peter Anvine8cdcdc2007-11-12 21:57:00 -08001354 (o->disp_size == 64 ? "qword " :
1355 o->disp_size == 32 ? "dword " :
1356 o->disp_size == 16 ? "word " : ""), offs);
H. Peter Anvine2c80182005-01-15 22:15:51 +00001357 segover = NULL;
Cyrill Gorcunove4f526b2009-10-18 12:41:14 +04001358 } else if (is_class(REGMEM, t)) {
H. Peter Anvin6867acc2007-10-10 14:58:45 -07001359 int started = false;
H. Peter Anvin7786c362007-09-17 18:45:44 -07001360 if (t & BITS8)
H. Peter Anvine2c80182005-01-15 22:15:51 +00001361 slen +=
1362 snprintf(output + slen, outbufsize - slen, "byte ");
H. Peter Anvin7786c362007-09-17 18:45:44 -07001363 if (t & BITS16)
H. Peter Anvine2c80182005-01-15 22:15:51 +00001364 slen +=
1365 snprintf(output + slen, outbufsize - slen, "word ");
H. Peter Anvin7786c362007-09-17 18:45:44 -07001366 if (t & BITS32)
H. Peter Anvine2c80182005-01-15 22:15:51 +00001367 slen +=
1368 snprintf(output + slen, outbufsize - slen, "dword ");
H. Peter Anvin7786c362007-09-17 18:45:44 -07001369 if (t & BITS64)
H. Peter Anvine2c80182005-01-15 22:15:51 +00001370 slen +=
1371 snprintf(output + slen, outbufsize - slen, "qword ");
H. Peter Anvin7786c362007-09-17 18:45:44 -07001372 if (t & BITS80)
H. Peter Anvine2c80182005-01-15 22:15:51 +00001373 slen +=
1374 snprintf(output + slen, outbufsize - slen, "tword ");
H. Peter Anvine8cdcdc2007-11-12 21:57:00 -08001375 if (t & BITS128)
1376 slen +=
1377 snprintf(output + slen, outbufsize - slen, "oword ");
H. Peter Anvindfb91802008-05-20 11:43:53 -07001378 if (t & BITS256)
1379 slen +=
1380 snprintf(output + slen, outbufsize - slen, "yword ");
H. Peter Anvin7786c362007-09-17 18:45:44 -07001381 if (t & FAR)
H. Peter Anvine2c80182005-01-15 22:15:51 +00001382 slen += snprintf(output + slen, outbufsize - slen, "far ");
H. Peter Anvin7786c362007-09-17 18:45:44 -07001383 if (t & NEAR)
H. Peter Anvine2c80182005-01-15 22:15:51 +00001384 slen +=
1385 snprintf(output + slen, outbufsize - slen, "near ");
1386 output[slen++] = '[';
H. Peter Anvinde4b89b2007-10-01 15:41:25 -07001387 if (o->disp_size)
H. Peter Anvine2c80182005-01-15 22:15:51 +00001388 slen += snprintf(output + slen, outbufsize - slen, "%s",
H. Peter Anvinde4b89b2007-10-01 15:41:25 -07001389 (o->disp_size == 64 ? "qword " :
1390 o->disp_size == 32 ? "dword " :
1391 o->disp_size == 16 ? "word " :
H. Peter Anvin0ee01422007-04-16 01:18:30 +00001392 ""));
H. Peter Anvin7786c362007-09-17 18:45:44 -07001393 if (o->eaflags & EAF_REL)
H. Peter Anvin99c4ecd2007-08-28 23:06:00 +00001394 slen += snprintf(output + slen, outbufsize - slen, "rel ");
H. Peter Anvine2c80182005-01-15 22:15:51 +00001395 if (segover) {
1396 slen +=
1397 snprintf(output + slen, outbufsize - slen, "%s:",
1398 segover);
1399 segover = NULL;
1400 }
H. Peter Anvin7786c362007-09-17 18:45:44 -07001401 if (o->basereg != -1) {
H. Peter Anvine2c80182005-01-15 22:15:51 +00001402 slen += snprintf(output + slen, outbufsize - slen, "%s",
H. Peter Anvina4835d42008-05-20 14:21:29 -07001403 nasm_reg_names[(o->basereg-EXPR_REG_START)]);
H. Peter Anvin6867acc2007-10-10 14:58:45 -07001404 started = true;
H. Peter Anvine2c80182005-01-15 22:15:51 +00001405 }
H. Peter Anvin7786c362007-09-17 18:45:44 -07001406 if (o->indexreg != -1) {
H. Peter Anvine2c80182005-01-15 22:15:51 +00001407 if (started)
1408 output[slen++] = '+';
1409 slen += snprintf(output + slen, outbufsize - slen, "%s",
H. Peter Anvina4835d42008-05-20 14:21:29 -07001410 nasm_reg_names[(o->indexreg-EXPR_REG_START)]);
H. Peter Anvin7786c362007-09-17 18:45:44 -07001411 if (o->scale > 1)
H. Peter Anvine2c80182005-01-15 22:15:51 +00001412 slen +=
1413 snprintf(output + slen, outbufsize - slen, "*%d",
H. Peter Anvin7786c362007-09-17 18:45:44 -07001414 o->scale);
H. Peter Anvin6867acc2007-10-10 14:58:45 -07001415 started = true;
H. Peter Anvine2c80182005-01-15 22:15:51 +00001416 }
H. Peter Anvine8cdcdc2007-11-12 21:57:00 -08001417
1418
H. Peter Anvin7786c362007-09-17 18:45:44 -07001419 if (o->segment & SEG_DISP8) {
H. Peter Anvine8cdcdc2007-11-12 21:57:00 -08001420 const char *prefix;
1421 uint8_t offset = offs;
1422 if ((int8_t)offset < 0) {
1423 prefix = "-";
H. Peter Anvin0ee01422007-04-16 01:18:30 +00001424 offset = -offset;
H. Peter Anvine8cdcdc2007-11-12 21:57:00 -08001425 } else {
1426 prefix = "+";
H. Peter Anvin0ee01422007-04-16 01:18:30 +00001427 }
H. Peter Anvine2c80182005-01-15 22:15:51 +00001428 slen +=
H. Peter Anvin0ee01422007-04-16 01:18:30 +00001429 snprintf(output + slen, outbufsize - slen, "%s0x%"PRIx8"",
H. Peter Anvine8cdcdc2007-11-12 21:57:00 -08001430 prefix, offset);
H. Peter Anvin7786c362007-09-17 18:45:44 -07001431 } else if (o->segment & SEG_DISP16) {
H. Peter Anvine8cdcdc2007-11-12 21:57:00 -08001432 const char *prefix;
1433 uint16_t offset = offs;
1434 if ((int16_t)offset < 0 && started) {
H. Peter Anvin0ee01422007-04-16 01:18:30 +00001435 offset = -offset;
H. Peter Anvine8cdcdc2007-11-12 21:57:00 -08001436 prefix = "-";
1437 } else {
1438 prefix = started ? "+" : "";
H. Peter Anvin0ee01422007-04-16 01:18:30 +00001439 }
H. Peter Anvine2c80182005-01-15 22:15:51 +00001440 slen +=
H. Peter Anvine8cdcdc2007-11-12 21:57:00 -08001441 snprintf(output + slen, outbufsize - slen,
1442 "%s0x%"PRIx16"", prefix, offset);
H. Peter Anvin7786c362007-09-17 18:45:44 -07001443 } else if (o->segment & SEG_DISP32) {
H. Peter Anvine8cdcdc2007-11-12 21:57:00 -08001444 if (prefix.asize == 64) {
1445 const char *prefix;
1446 uint64_t offset = (int64_t)(int32_t)offs;
1447 if ((int32_t)offs < 0 && started) {
1448 offset = -offset;
1449 prefix = "-";
1450 } else {
1451 prefix = started ? "+" : "";
1452 }
1453 slen +=
1454 snprintf(output + slen, outbufsize - slen,
1455 "%s0x%"PRIx64"", prefix, offset);
1456 } else {
1457 const char *prefix;
1458 uint32_t offset = offs;
1459 if ((int32_t) offset < 0 && started) {
H. Peter Anvin0ee01422007-04-16 01:18:30 +00001460 offset = -offset;
1461 prefix = "-";
1462 } else {
1463 prefix = started ? "+" : "";
1464 }
1465 slen +=
1466 snprintf(output + slen, outbufsize - slen,
1467 "%s0x%"PRIx32"", prefix, offset);
H. Peter Anvine8cdcdc2007-11-12 21:57:00 -08001468 }
H. Peter Anvine2c80182005-01-15 22:15:51 +00001469 }
1470 output[slen++] = ']';
1471 } else {
1472 slen +=
1473 snprintf(output + slen, outbufsize - slen, "<operand%d>",
1474 i);
1475 }
H. Peter Anvinea6e34d2002-04-30 20:51:32 +00001476 }
1477 output[slen] = '\0';
H. Peter Anvine2c80182005-01-15 22:15:51 +00001478 if (segover) { /* unused segment override */
Keith Kaniosa6dfa782007-04-13 16:47:53 +00001479 char *p = output;
H. Peter Anvine2c80182005-01-15 22:15:51 +00001480 int count = slen + 1;
1481 while (count--)
1482 p[count + 3] = p[count];
1483 strncpy(output, segover, 2);
1484 output[2] = ' ';
H. Peter Anvinea6e34d2002-04-30 20:51:32 +00001485 }
1486 return length;
1487}
1488
H. Peter Anvined37aa82009-03-18 23:10:19 -07001489/*
1490 * This is called when we don't have a complete instruction. If it
1491 * is a standalone *single-byte* prefix show it as such, otherwise
1492 * print it as a literal.
1493 */
1494int32_t eatbyte(uint8_t *data, char *output, int outbufsize, int segsize)
H. Peter Anvineba20a72002-04-30 20:53:55 +00001495{
H. Peter Anvined37aa82009-03-18 23:10:19 -07001496 uint8_t byte = *data;
1497 const char *str = NULL;
1498
1499 switch (byte) {
1500 case 0xF2:
H. Peter Anvin1d7d7c62009-03-19 06:52:07 -07001501 str = "repne";
H. Peter Anvined37aa82009-03-18 23:10:19 -07001502 break;
1503 case 0xF3:
H. Peter Anvin1d7d7c62009-03-19 06:52:07 -07001504 str = "rep";
H. Peter Anvined37aa82009-03-18 23:10:19 -07001505 break;
1506 case 0x9B:
1507 str = "wait";
1508 break;
1509 case 0xF0:
1510 str = "lock";
1511 break;
1512 case 0x2E:
1513 str = "cs";
1514 break;
1515 case 0x36:
1516 str = "ss";
1517 break;
1518 case 0x3E:
1519 str = "ss";
1520 break;
1521 case 0x26:
1522 str = "es";
1523 break;
1524 case 0x64:
1525 str = "fs";
1526 break;
1527 case 0x65:
1528 str = "gs";
1529 break;
1530 case 0x66:
1531 str = (segsize == 16) ? "o32" : "o16";
1532 break;
1533 case 0x67:
1534 str = (segsize == 32) ? "a16" : "a32";
1535 break;
1536 case REX_P + 0x0:
1537 case REX_P + 0x1:
1538 case REX_P + 0x2:
1539 case REX_P + 0x3:
1540 case REX_P + 0x4:
1541 case REX_P + 0x5:
1542 case REX_P + 0x6:
1543 case REX_P + 0x7:
1544 case REX_P + 0x8:
1545 case REX_P + 0x9:
1546 case REX_P + 0xA:
1547 case REX_P + 0xB:
1548 case REX_P + 0xC:
1549 case REX_P + 0xD:
1550 case REX_P + 0xE:
1551 case REX_P + 0xF:
1552 if (segsize == 64) {
1553 snprintf(output, outbufsize, "rex%s%s%s%s%s",
1554 (byte == REX_P) ? "" : ".",
1555 (byte & REX_W) ? "w" : "",
1556 (byte & REX_R) ? "r" : "",
1557 (byte & REX_X) ? "x" : "",
1558 (byte & REX_B) ? "b" : "");
1559 break;
1560 }
1561 /* else fall through */
1562 default:
1563 snprintf(output, outbufsize, "db 0x%02x", byte);
1564 break;
1565 }
1566
1567 if (str)
Cyrill Gorcunov0a45cc82009-08-09 19:25:29 +04001568 snprintf(output, outbufsize, "%s", str);
H. Peter Anvined37aa82009-03-18 23:10:19 -07001569
H. Peter Anvinea6e34d2002-04-30 20:51:32 +00001570 return 1;
1571}