commit 28d5bf811b02b4ffa61b4100df11bc0872ea84bf
author Jin Kyu Song <jin.kyu.song@intel.com> Tue Nov 19 18:44:13 2013 -0800
committer Jin Kyu Song <jin.kyu.song@intel.com> Wed Nov 20 11:29:42 2013 -0800
tree 1c630bac1476e2d5d0a52060b6ae0a2877d7571a
parent 5f80dace3a2b15ecc07d07d8ce37bac6cb5f1d4c

disasm: Add suport for bnd registers

MPX uses a new bnd registers and a new mib syntax.

Signed-off-by: Jin Kyu Song <jin.kyu.song@intel.com>

disasm.c

diff --git a/disasm.c b/disasm.c
index 50a49c5..72a0261 100644
--- a/disasm.c
+++ b/disasm.c
@@ -192,6 +192,8 @@
         return nasm_rd_zmmreg[regval];
     if (!(OPMASKREG & ~regflags))
         return nasm_rd_opmaskreg[regval];
+    if (!(BNDREG & ~regflags))
+        return nasm_rd_bndreg[regval];
 
     return 0;
 }
@@ -614,6 +616,11 @@
             break;
         }
 
+        case4(014):
+            /* this is an separate index reg position of MIB operand (ICC) */
+            /* Disassembler uses NASM's split EA form only                 */
+            break;
+
         case4(0274):
             opx->offset = (int8_t)*data++;
             opx->segment |= SEG_SIGNED;